TI DS14185WMX/NOPB

DS14185
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SNLS093C – APRIL 1999 – REVISED APRIL 2013
DS14185 EIA/TIA-232 3 Driver x 5 Receiver
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FEATURES
DESCRIPTION
•
•
•
•
•
•
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The DS14185 is a three driver, five receiver device
which conforms to the EIA/TIA-232-E standard.
1
2
Replaces One 1488 and Two 1489s
Conforms to EIA/TIA-232-E
3 Drivers and 5 Receivers
Flow Through Pinout
Failsafe Receiver Outputs
20-pin SOIC Package
LapLink Compatible −200 kbps Data Rate
The flow-through pinout facilitates simple noncrossover board layout. The DS14185 provides a
one-chip solution for the common 9-pin serial RS-232
interface between data terminal and data
communications equipment.
Connection Diagram
Figure 1. SOIC
See Package DW0020B
Functional Diagram
Figure 2.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2013, Texas Instruments Incorporated
DS14185
SNLS093C – APRIL 1999 – REVISED APRIL 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2)
Supply Voltage (VCC)
+7V
Supply Voltage (V+)
+15V
Supply Voltage (V−)
−15V
Driver Input Voltage
0V to VCC
Driver Output (3) Voltage (Power Off)
±15V
Receiver Input Voltage
±25V
Receiver Output Voltage (ROUT)
Maximum Package Power Dissipation @
+25°C
0V to VCC
DW Package
1488 mW
Derate DW Package
11.9 mW/°C above +25°C
−65°C to +150°C
Storage Temperature Range
Lead Temperature Range (Soldering, 4 seconds)
+260°C
ESD Ratings (HBM, 1.5 kΩ, 100 pF)
≥1.5 kV
(1)
(2)
(3)
Absolute Maximum Ratings are those values beyond which the safety of the device cannot be specified. They are not meant to imply
that the devices should be operated at these limits. The table of Electrical Characteristics specifies conditions of device operation.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
Only one driver output shorted at a time.
Recommended Operating Conditions
Min
Typ
Max
Units
Supply Voltage (VCC)
+4.75
+5.0
+5.25
V
Supply Voltage (V+)
+9.0
+12.0
+13.2
V
Supply Voltage (V−)
−13.2
−12.0
−9.0
V
0
25
70
°C
Operating Free Air Temperature (TA)
Electrical Characteristics (1)
Over recommended supply voltage and operating temperature ranges, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ (2)
Max
Units
21.0
30
mA
8.7
15
mA
DEVICE CHARACTERISTICS
ICC
VCC Supply Current
No Load, All Inputs at +5V
I+
V+ Supply Current (1)
No Load, All Driver
Inputs at 0.8V or +2V
All Receiver Inputs
at 0.8V or 2.4V.
I−
(1)
(2)
2
V− Supply Current (1)
V+ = 9V, V− = −9V
+
−
V = 13.2V, V = −13.2V
13
22
mA
V+ = 9V, V− = −9V
−12.5
−22
mA
V+ = 13.2V, V− = −13.2V
−16.5
−28
mA
Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground
unless otherwise specified. For current, minimum and maximum values are specified as an absolute value and the sign is used to
indicate direction. For voltage logic levels, the more positive value is designated as maximum. For example, if −6V is a maximum, the
typical value (−6.8V) is more negative.
All typicals are given for: VCC = +5.0V, V+ = +12.0V, V− = −12V, TA = +25°C.
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Electrical Characteristics(1) (continued)
Over recommended supply voltage and operating temperature ranges, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ (2)
Max
Units
DRIVER CHARACTERISTICS
VIH
High Level Input Voltage
VIL
Low Level Input Voltage
IIH
High Level Input Current (3)
VIN = 5V
IIL
Low Level Input Current (3)
VIN = 0V
VOH
High Level Output Voltage (3)
RL = 3 kΩ, VIN = 0.8V,
V+ = 9V, V− = −9V
6
7
V
RL = 3 kΩ, VIN = 0.8V,
V+ = +12V, V− = −12V
8.5
9
V
RL = 7 kΩ, VIN = 0.8V,
V+ = +13.2V, V− = −13.2V
10
11.5
V
Low Level Output Voltage (3)
VOL
2.0
V
−1.24
0.8
V
10
μA
−1.5
mA
RL = 3 kΩ, VIN = 2V,
V+ = 9V, V− = −9V
−7
−6
V
RL = 3 kΩ, VIN = 2V,
V+ = +12V, V− = −12V
−8
−7.5
V
RL = 7 kΩ, VIN = 0.8V,
V+ = +13.2V, V− = −13.2V
−11
−10
V
IOS+
Output High Short
Circuit Current (3)
VO = 0V, VIN = 0.8V
−6
−13
−18
mA
IOS−
Output Low Short
Circuit Current (3)
VO = 0V, VIN = 2.0V
6
13
18
mA
RO
Output Resistance
−2V ≤ VO ≤ +2V,
V+ = V− = VCC = 0V
300
Ω
−2V ≤ VO ≤ +2V,
V+ = V− = VCC = Open Ckt
300
Ω
RECEIVER CHARACTERISTICS
VTH
Input High Threshold
(Recognized as a High Signal)
VO ≤ 0.4V, IO = 3.2 mA
VTL
Input Low Threshold
(Recognized as a Low Signal)
VO ≥ 2.5V, IO = −0.5 mA
0.7
1.0
RIN
Input Resistance
VIN = ±3V to ±15V
3.0
4.1
7.0
kΩ
IIN
Input Current (3)
VIN = +15V
2.1
4.1
5.0
mA
High Level Output Voltage (4)
VOH
V
V
0.43
0.7
1
mA
VIN = −15V
−5.0
−4.1
−2.1
mA
VIN = −3V
−1
−0.65
−0.43
mA
IOH = −0.5 mA, VIN = −3V
2.6
4
V
IOH = −10 μA, VIN = −3V
4.0
4.9
V
IOH = −0.5 mA, VIN = Open Circuit
2.6
4
V
IOH = −10 μA, VIN = Open Circuit
4.0
4.9
V
0.2
0.4
V
−4
−2.7
−1.7
mA
Low Level Output Voltage
IOL = 3.2 mA, VIN = +3V
IOSR
Short Circuit Current (3)
VO = 0V, VIN = 0V
(4)
2.4
VIN = +3V
VOL
(3)
1.85
Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground
unless otherwise specified. For current, minimum and maximum values are specified as an absolute value and the sign is used to
indicate direction. For voltage logic levels, the more positive value is designated as maximum. For example, if −6V is a maximum, the
typical value (−6.8V) is more negative.
If receiver inputs are unconnected, receiver output is a logic high.
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DS14185
SNLS093C – APRIL 1999 – REVISED APRIL 2013
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Switching Characteristics (1)
TA = 25°C
Symbol
Parameter
Conditions
Min
Typ (2)
Max
Units
60
350
ns
240
350
ns
DRIVER CHARACTERISTICS
tPHL
Propagation Delay High to Low
tPLH
Propagation Delay Low to High
tr, tf
Output Slew Rate (3)
RL = 3 kΩ, CL = 50 pF
(Figure 3 Figure 4)
50
ns
RECEIVER CHARACTERISTICS
tPHL
Propagation Delay High to Low
tPLH
Propagation Delay Low to High
tr
tf
(1)
(2)
(3)
RL = 1.5 kΩ, CL = 15 pF
(includes fixture plus probe),
(Figure 5 Figure 6)
150
350
ns
240
350
ns
Rise Time
87
175
ns
Fall Time
40
100
ns
Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground
unless otherwise specified. For current, minimum and maximum values are specified as an absolute value and the sign is used to
indicate direction. For voltage logic levels, the more positive value is designated as maximum. For example, if −6V is a maximum, the
typical value (−6.8V) is more negative.
All typicals are given for: VCC = +5.0V, V+ = +12.0V, V− = −12V, TA = +25°C.
Refer to typical curves. Driver output slew rate is measured from the +3.0V to the −3.0V level on the output waveform. Inputs not under
test are connected to VCC or GND. Slew rate is determined by load capacitance. To comply with a 30 V/μs maximum slew rate, a
minimum load capacitance of 390 pF is recommended.
Parameter Measurement Information
Generator characteristics for driver input: f = 64 kHz (128 kbits/sec), tr = tf < 10 ns, VIH = 3V, VIL = 0V, duty cycle =
50%.
Figure 3. Driver Propagation Delay and Transition Time Test Circuit
Figure 4. Driver Propagation Delay and Transition Time Waveforms Slew Rate (SR) = 6V/(tr or tf)
Generator characteristics for receiver input: f = 64 kHz (128 kbits/sec), tr = tf = 200 ns, VIH = 3V, VIL = −3V, duty cycle
= 50%.
Figure 5. Receiver Propagation Delay and Transition Time Test Circuit
4
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SNLS093C – APRIL 1999 – REVISED APRIL 2013
Figure 6. Receiver Propagation Delay and Transition Time Waveform
PIN DESCRIPTIONS
Pin #
13, 15, 16
5, 6, 8
2, 3, 4, 7, 9
Name
Description
DIN
Driver Input Pins
DOUT
Driver Output Pins, RS-232 Levels
RIN
Receiver Input Pins, RS-232 Levels
12, 14, 17, 18, 19
ROUT
Receiver Output Pins
11
GND
Ground
1
+
Positive Power Supply Pin (+9.0 ≤ V+ ≤ +13.2)
−
V
10
V
Negative Power Supply Pin (−9.0 ≤ V− ≤ −13.2)
20
VCC
Positive Power Supply Pin (+5V ±5%)
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DS14185
SNLS093C – APRIL 1999 – REVISED APRIL 2013
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APPLICATIONS INFORMATION
In a typical Data Terminal Equipment (DTE) to Data Circuit-Terminating Equipment (DCE) 9-pin de-facto
interface implementation, 2 data lines and 6 control lines are required. The data lines are TXD and RXD. The
control lines are RTS, DTR, DSR, DCD, CTS, and RI.
The DS14185 is a 3 x 5 Driver/Receiver and offers a single chip solution for this DTE interface. As shown in
Figure 7, this interface allows for direct flow-thru interconnect. For a more conservative design, the user may
wish to insert ground traces between the signal lines to minimize cross talk.
LapLink COMPATIBILITY
The DS14185 can easily provide 128 kbps data rate under maximum driver load conditions of CL = 2500 pF and
RL = 3 kΩ, while power supplies are:
VCC = 4.75V, V+ = 10.8V, V− = −10.8V
(1)
MOUSE DRIVING
A typical mouse can be powered from the drivers. Two driver outputs connected in parallel and set to VOH can be
used to supply power to the V+ pin of the mouse. The third driver output is set to VOL to sink the current from the
V− terminal. Refer to typical curves of VOUT/IOUT.Typical mouse specifications are:
10 mA at +6V
5 mA at −6V
(2)
(3)
Figure 7. Typical DTE Application
6
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SNLS093C – APRIL 1999 – REVISED APRIL 2013
Typical Performance Characteristics
The below input waveforms were used to generate all Typical AC Characteristics.
Figure 8.
Figure 9.
Driver Output Slew Rate between +3V and −3V vs
Load Capacitance
Conditions: VCC = 5V, RL = 5 kΩ, TA = 25°C,
fIN = 64 kHz Square Wave
Driver Output Voltage vs Frequency and CL
Conditions: VCC = 5V, RL = 5 kΩ, TA = 25°C
Figure 10.
Figure 11.
Supply Current vs Frequency and Driver CL
Supply Current vs Frequency and Driver CL
Figure 12.
Figure 13.
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DS14185
SNLS093C – APRIL 1999 – REVISED APRIL 2013
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Typical Performance Characteristics (continued)
8
Supply Current vs Frequency
Driver Output Current vs Output Voltage
Figure 14.
Figure 15.
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DS14185
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SNLS093C – APRIL 1999 – REVISED APRIL 2013
REVISION HISTORY
Changes from Revision B (April 2013) to Revision C
•
Page
Changed layout of National Data Sheet to TI format ............................................................................................................ 8
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PACKAGE OPTION ADDENDUM
www.ti.com
1-Nov-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
DS14185WM
NRND
SOIC
DW
20
36
TBD
Call TI
Call TI
0 to 70
DS14185WM
DS14185WM/NOPB
ACTIVE
SOIC
DW
20
36
Green (RoHS
& no Sb/Br)
SN | CU SN
Level-3-260C-168 HR
0 to 70
DS14185WM
DS14185WMX
NRND
SOIC
DW
20
1000
TBD
Call TI
Call TI
0 to 70
DS14185WM
DS14185WMX/NOPB
ACTIVE
SOIC
DW
20
1000
Green (RoHS
& no Sb/Br)
SN | CU SN
Level-3-260C-168 HR
0 to 70
DS14185WM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
1-Nov-2013
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
DS14185WMX
SOIC
DW
20
1000
330.0
24.4
10.9
13.3
3.25
12.0
24.0
Q1
DS14185WMX/NOPB
SOIC
DW
20
1000
330.0
24.4
10.9
13.3
3.25
12.0
24.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
DS14185WMX
SOIC
DW
20
1000
367.0
367.0
45.0
DS14185WMX/NOPB
SOIC
DW
20
1000
367.0
367.0
45.0
Pack Materials-Page 2
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