RICHTEK 16IQC47M

RT8289
5A, 32V, 500kHz Step-Down Converter
General Description
Features
The RT8289 is a step-down regulator with an internal Power
MOSFET. It achieves 5A of continuous output current over
a wide input supply range with excellent load and line
regulation. Current mode operation provides fast transient
response and eases loop stabilization.
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High Output Current up to 5A
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Internal Soft-Start
100mΩ
Ω Internal Power MOSFET Switch
Internal Compensation Minimizes External Parts
Count
High Efficiency up to 90%
25μ
μA Shutdown Current
Fixed 500kHz Frequency
Thermal Shutdown Protection
Cycle-by-Cycle Over Current Protection
Wide 5.5V to 32V Operating Input Range
Adjustable Output Voltage from 1.222V to 26V
Available in an SOP-8 (Exposed Pad) Package
RoHS Compliant and Halogen Free
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The RT8289 prorides protections such as cycle-by-cycle
current limiting and thermal shutdown. In shutdown mode,
the regulator draws 25A of supply current.
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The RT8289 requires a minimum number of external
components, to proride a compact solution.
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The RT8289 is available in a SOP-8 (Exposed Pad)
package.
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Ordering Information
RT8289
Applications
Package Type
SP : SOP-8 (Exposed Pad-Option 1)
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Lead Plating System
G : Green (Halogen Free and Pb Free)
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Note :
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Richtek products are :
`
RoHS compliant and compatible with the current require-
Pin Configurations
ments of IPC/JEDEC J-STD-020.
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Distributive Power Systems
LCD TV
DSL Modems
Pre-regulator for Linear Regulators
Battery Charger
(TOP VIEW)
Suitable for use in SnPb or Pb-free soldering processes.
BOOT
SW
8
NC
2
NC
3
FB
4
GND
9
7
VIN
6
GND
5
EN
SOP-8 (Exposed Pad)
Typical Application Circuit
VIN
5.5V to 32V
Chip Enable
Open
= Automatic Startup
DS8289-01 March 2011
7
VIN
CIN
4.7µF x 2
BOOT
RT8289
1
SW 8
5 EN
6, Exposed Pad (9)
GND
CBOOT L
10nF 10µH
D
B550C
VOUT
5V/5A
R1
10k
FB 4
R2
3.16k
COUT
47µFx2
(POSCAP)
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1
RT8289
Functional Pin Description
Pin No.
Pin Name
Pin Function
BOOT
High Side Gate Drive Bootstrap Input. BOOT supplies the drive for the high side
N-MOSFET switch. Connect a 10nF or greater capacitor from SW to BOOT to
power the high side switch.
2, 3
NC
No Internal Connection.
4
FB
Feedback Input. FB senses the output voltage to regulate said voltage. Drive FB
with a resistive voltage divider from the output voltage. The value of the divider
resistors also sets loop bandwidth. The feedback threshold is 1.222V.
5
EN
1
Chip Enable (Active High). EN is a digital input that turns the regulator on or off.
Drive EN higher than 1.4V to turn on the regulator, lower than 0.4V to turn it off.
For automatic startup, leave EN unconnected.
Ground. The exposed pad must be soldered to a large PCB and connected to
GND for maximum power dissipation.
Power Input. VIN supplies the power to the IC, as well as the step-down
converter switches. Drive VIN with a 5.5V to 32V power source. Bypass VIN to
GND with a suitably large capacitor to eliminate noise on the input to the IC.
Power Switching Output. SW is the switching node that supplies power to the
output. Connect the output LC filter from SW to the output load. Note that a
capacitor is required from SW to BOOT to power the high side switch.
6,
GND
9 (Exposed Pad)
7
VIN
8
SW
Function Block Diagram
VIN
Current Sense
Amplifier
+
Ramp
Generator
BOOT
EN
Regulator
Oscillator
500kHz
S
+
Reference
FB
12k
Error
+ Amplifier
30pF
Driver
PWM
Comparator
-
400k
Q
R
OC Limit
Clamp
SW
Bootstrap
Control
GND
13pF
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DS8289-01 March 2011
RT8289
Absolute Maximum Ratings
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(Note 1)
Supply Voltage, VIN ----------------------------------------------------------------------------------------- 0.3V to 34V
Switching Voltage, SW (Note 2) ------------------------------------------------------------------------ −0.6V to (VIN + 0.3V)
BOOT Voltage ------------------------------------------------------------------------------------------------ (VSW − 0.3V) to (VSW + 6V)
Other Pins Voltage ------------------------------------------------------------------------------------------ −0.3V to 6V
Power Dissipation, PD @ TA = 25°C
SOP-8 (Exposed Pad) -------------------------------------------------------------------------------------- 1.333W
Package Thermal Resistance (Note 3)
SOP-8 (Exposed Pad), θJA -------------------------------------------------------------------------------- 75°C/W
SOP-8 (Exposed Pad), θJC -------------------------------------------------------------------------------- 15°C/W
Junction Temperature --------------------------------------------------------------------------------------- 150°C
Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------- 260°C
Storage Temperature Range ------------------------------------------------------------------------------- −65°C to 150°C
ESD Susceptibility (Note 4)
HBM (Human Body Mode) --------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ---------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions
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(Note 5)
Supply Voltage, VIN ----------------------------------------------------------------------------------------- 5.5V to 32V
Enable Voltage, VEN ----------------------------------------------------------------------------------------- 0V to 5.5V
Junction Temperature Range ------------------------------------------------------------------------------ −40°C to 125°C
Ambient Temperature Range ------------------------------------------------------------------------------ −40°C to 85°C
Electrical Characteristics
(VIN = 12V, TA = 25°C unless otherwise specified)
Parameter
Symbol
Test Conditions
Max
High Side Switch-On Resistance
RDS(ON)1
--
100
--
mΩ
Low Side Switch-On Resistance
Upper Switch Leakage
RDS(ON)2
V EN = 0V, VSW = 0V
---
10
0
-10
Ω
μA
Current Limit
ILIM
Duty = 90%; V BOOT−SW = 4.8V
--
6.8
--
A
Current Sense Transconductance
GCS
Output Current to V COMP
--
5.5
--
A/V
Oscillator Frequency
fSW
--
500
--
kHz
V FB = 0V
--
120
--
kHz
V FB = 1V
---
90
100
---
%
ns
Under Voltage Lockout Threshold
Rising
--
4.2
--
V
Under Voltage Lockout Threshold
Hysteresis
--
200
--
mV
En Threshold
DMAX
tON
1.222 1.239
Unit
V FB
Maximum Duty Cycle
Minimum On-Time
1.202
Typ
Feedback Reference Voltage
Short Circuit Oscillation Frequency
5.5V ≦ VIN ≦ 32V
Min
Logic Low Voltage
V IL
--
--
0.4
Logic High Voltage
V IH
1.4
--
5.5
--
1
--
Enable Pull Up Current
V
V
μA
To be continued
DS8289-01 March 2011
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RT8289
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Shutdown Current
I SHDN
VEN = 0V
--
25
--
μA
Quiescent Current
IQ
VEN = 2V, VFB = 1.5V
--
0.8
1
mA
--
4
--
ms
--
150
--
°C
Soft-Start Period
Thermal Shutdown
TSD
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. The low side MOSFET body diode forward current must be lower than 1mA
Note 3. θJA is measured in the natural convection at TA = 25°C on a high effective four layers thermal conductivity test board of
JEDEC 51-7 thermal measurement standard. The measurement case position of θJC is on the exposed pad of the
package.
Note 4. Devices are ESD sensitive. Handling precaution is recommended.
Note 5. The device is not guaranteed to function outside its operating conditions.
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DS8289-01 March 2011
RT8289
Typical Operating Characteristics
Output Voltage vs. Output Current
Efficiency vs. Output Current
100
5.008
90
5.004
VIN
VIN
VIN
VIN
70
60
=
=
=
=
8V
12V
24V
32V
Output Voltage (V)
Efficiency (%)
80
50
40
30
5.000
VIN = 32V
VIN = 24V
VIN = 12V
4.996
4.992
4.988
20
4.984
10
VOUT = 5V
0
0
1
2
3
VOUT = 5V
4.980
4
5
0
1
2
Output Current (A)
1.228
1.228
1.226
1.226
Reference Voltage (V)
Reference Voltage (V)
1.230
1.224
1.222
1.220
1.218
1.216
1.214
1.212
1.210
12
16
20
24
28
1.222
VIN
VIN
VIN
VIN
1.220
1.218
1.216
IOUT = 0A
32
-50
-25
0
25
540
530
530
Frequency (kHz)1
Frequency (kHz)1
540
520
510
500
490
480
470
VOUT = 5V, IOUT = 0A
16
20
Input Voltage (V)
DS8289-01 March 2011
100
125
520
510
500
490
VIN
VIN
VIN
VIN
480
470
12
75
Frequency vs. Temperature
550
8
50
Temperature (°C)
Frequency vs. Input Voltage
4
8V
12V
24V
32V
1.210
550
450
=
=
=
=
1.214
Input Voltage (V)
460
5
1.224
1.212
IOUT = 0A
8
4
Reference Voltage vs. Temperature
Reference Voltage vs. Input Voltage
1.230
4
3
Output Current (A)
24
28
32
460
=
=
=
=
8V
12V
24V
32V
VOUT = 5V, IOUT = 0A
450
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT8289
Shutdown Current vs. Input Voltage
Quiescent Current vs. Temperature
1
60
Quiescent Current (mA)
Shutdown Current (μA)1
0.9
50
40
30
20
10
4
8
12
16
20
24
28
0.7
0.6
0.5
VIN
VIN
VIN
VIN
0.4
0.3
=
=
=
=
8V
12V
24V
32V
0.2
0.1
VEN = 0V
0
0.8
0
-50
32
Input Voltage (V)
-25
0
25
50
75
100
125
Temperature (°C)
Switching
Current Limit vs. Temperature
12
Current Limit (A)
11
VOUT
(10mV/Div)
10
VSW
(20V/Div)
9
8
7
IL
(5A/Div)
6
VIN = 12V, VOUT = 2.5V
5
-50
-25
0
25
50
75
100
125
VIN = 12V, VOUT = 5V, IOUT = 5A
Time (1μs/Div)
Temperature (°C)
Load Transient Response
Load Transient Response
VOUT
(200mV/Div)
VOUT
(200mV/Div)
IOUT
(2A/Div)
IOUT
(2A/Div)
VIN = 12V, VOUT = 5V, IOUT = 2.5A to 5A
Time (100μs/Div)
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VIN = 12V, VOUT = 5V, IOUT = 0.2A to 5A
Time (100μs/Div)
DS8289-01 March 2011
RT8289
Power Off from EN
Power On from EN
VEN
(5V/Div)
VEN
(5V/Div)
VOUT
(5V/Div)
VOUT
(5V/Div)
IL
(5A/Div)
IL
(5A/Div)
VIN = 12V, VOUT = 5V, IOUT = 5A
Time (2.5ms/Div)
DS8289-01 March 2011
VIN = 12V, VOUT = 5V, IOUT = 5A
Time (2.5ms/Div)
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RT8289
Application Information
The RT8289 is an asynchronous high voltage buck
converter that can support the input voltage range from
5.5V to 32V and the output current can be up to 5A.
Output Voltage Setting
The resistive divider allows the FB pin to sense the output
voltage as shown in Figure 1.
VOUT
R1
FB
RT8289
R2
GND
Figure 1. Output Voltage Setting
The output voltage is set by an external resistive divider
according to the following equation :
VOUT = VFB ⎛⎜ 1 + R1 ⎞⎟
⎝ R2 ⎠
Where VFB is the feedback reference voltage (1.222V typ.).
Where R1 = 10kΩ.
External Bootstrap Diode
Connect a 10nF low ESR ceramic capacitor between the
BOOT pin and SW pin. This capacitor provides the gate
driver voltage for the high side MOSFET.
It is recommended to add an external bootstrap diode
between an external 5V and BOOT pin for efficiency
improvement when input voltage is lower than 5.5V or duty
ratio is higher than 65% .The bootstrap diode can be a
low cost one such as IN4148 or BAT54. The external 5V
can be a 5V fixed input from system or a 5V output of the
RT8289.
5V
BOOT
RT8289
10nF
SW
Soft-Start
The RT8289 contains an in ternal soft-start clamp that
gradually raises the output voltage. The typical soft-start
time is 4ms.
Chip Enable Operation
The EN pin is the chip enable input. Pull the EN pin low
(<0.4V) will shutdown the device. During shutdown mode,
the RT8289 quiescent current drops to lower than 25μA.
Drive the EN pin to high (>1.4V, < 5.5V) will turn on the
device again. If the EN pin is open, it will be pulled to high
by internal circuit.For external timing control (e.g.RC),the
EN pin can also be externally pulled to High by adding a
100kΩ or greater resistor from the VIN pin (see Figure 3).
Inductor Selection
The inductor value and operating frequency determine the
ripple current according to a specific input and output
voltage. The ripple current ΔIL increases with higher VIN
and decreases with higher inductance.
V
V
ΔIL = ⎡⎢ OUT ⎤⎥ × ⎡⎢1− OUT ⎤⎥
f
×
L
VIN ⎦
⎣
⎦ ⎣
Having a lower ripple current reduces not only the ESR
losses in the output capacitors but also the output voltage
ripple. High frequency with small ripple current can achieve
highest efficiency operation. However, it requires a large
inductor to achieve this goal.
For the ripple current selection, the value of ΔIL = 0.2(IMAX)
will be a reasonable starting point. The largest ripple
current occurs at the highest VIN. To guarantee that the
ripple current stays below the specified maximum, the
inductor value should be chosen according to the following
equation :
⎡ VOUT ⎤ ⎡
VOUT ⎤
L =⎢
× ⎢1−
⎥
⎥
f
I
V
×
Δ
L(MAX) ⎦ ⎣
IN(MAX) ⎦
⎣
The inductor's current rating (caused a 40°C temperature
rising from 25°C ambient) should be greater than the
maximum load current and its saturation current should
be greater than the short circuit peak current limit. Please
see Table 2 for the inductor selection reference.
Figure 2. External Bootstrap Diode
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DS8289-01 March 2011
RT8289
Table 2. Suggested Inductors for Typical
Application Circuit
Component
Dimensions
Series
Supplier
(mm)
TAIYO
NR10050
10 x 9.8 x 5
YUDEN
TDK
SLF12565
12.5 x 12.5 x 6.5
Diode Selection
When the power switch turns off, the path for the current
is through the diode connected between the switch output
and ground. This forward biased diode must have a
minimum voltage drop and recovery times. Schottky diode
is recommended and it should be able to handle those
current. The reverse voltage rating of the diode should be
greater than the maximum input voltage, and current rating
should be greater than the maximum load current. For
more detail please refer to Table 4.
CIN and COUT Selection
The input capacitance, C IN, is needed to filter the
trapezoidal current at the source of the high side MOSFET.
To prevent large ripple current, a low ESR input capacitor
sized for the maximum RMS current should be used. The
RMS current is given by :
IRMS = IOUT(MAX)
VOUT
VIN
VIN
−1
VOUT
This formula has a maximum at VIN = 2VOUT, where
I RMS = I OUT /2. This simple worst-case condition is
commonly used for design because even significant
deviations do not offer much relief.
Choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to
meet size or height requirements in the design.
For the input capacitor,two 4.7μF low ESR ceramic
capacitors are recommended. For the recommended
capacitor, please refer to table 3 for more detail.
The selection of COUT is determined by the required ESR
to minimize voltage ripple.
Moreover, the amount of bulk capacitance is also a key
for COUT selection to ensure that the control loop is stable.
Loop stability can be checked by viewing the load transient
response as described in a later section.
DS8289-01 March 2011
The output ripple, ΔVOUT , is determined by :
1
⎤
ΔVOUT ≤ ΔIL ⎡⎢ESR +
8fCOUT ⎦⎥
⎣
The output ripple will be highest at the maximum input
voltage since ΔIL increases with input voltage. Multiple
capacitors placed in parallel may be needed to meet the
ESR and RMS current handling requirement. Dry tantalum,
special polymer, aluminum electrolytic and ceramic
capacitors are all available in surface mount packages.
Special polymer capacitors offer very low ESR value.
However, it provides lower capacitance density than other
types. Although Tantalum capacitors have the highest
capacitance density, it is important to only use types that
pass the surge test for use in switching power supplies.
Aluminum electrolytic capacitors have significantly higher
ESR. However, it can be used in cost-sensitive applications
for ripple current rating and long term reliability
considerations. Ceramic capacitors have excellent low
ESR characteristics but can have a high voltage coefficient
and audible piezoelectric effects. The high Q of ceramic
capacitors with trace inductance can also lead to significant
ringing.
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD (ESR) also begins to charge or discharge
COUT generating a feedback error signal for the regulator
to return VOUT to its steady-state value. During this
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RT8289
recovery time, VOUT can be monitored for overshoot or
ringing that would indicate a stability problem.
snubber between SW and GND and make them as close
as possible to the SW pin (see Figure 3). Another method
is to add a resistor in series with the bootstrap
capacitor, CBOOT. But this method will decrease the driving
capability to the high side MOSFET. It is strongly
recommended to reserve the R-C snubber during PCB
layout for EMI improvement. Moreover, reducing the SW
trace area and keeping the main power in a small loop will
be helpful on EMI performance. For detailed PCB layout
guide, please refer to the section of Layout Consideration.
EMI Consideration
Since parasitic inductance and capacitance effects in PCB
circuitry would cause a spike voltage on SW pin when
high side MOSFET is turned-on/off, this spike voltage on
SW may impact on EMI performance in the system. In
order to enhance EMI performance, there are two methods
to suppress the spike voltage. One is to place an R-C
7
VIN
5.5V to 32V
REN*
CIN
4.7µF x 2
VIN
BOOT
RT8289
5 EN
1
CBOOT
L
10nF 10µH
SW 8
RS*
CEN*
6, Exposed Pad (9)
RBOOT*
CS*
GND
* : Optional
D
B550C
VOUT
5V/5A
R1
10k
FB 4
COUT
47µFx2
(POSCAP)
R2
3.16k
Figure 3. Reference Circuit with Snubber and Enable Timing Control
Thermal Considerations
For continuous operation, do not exceed the maximum
operation junction temperature. The maximum power
dissipation depends on the thermal resistance of IC
package, PCB layout, the rate of surroundings airflow and
temperature difference between junction to ambient. The
maximum power dissipation can be calculated by following
formula :
PD(MAX) = (TJ(MAX) − TA ) / θJA
Where T J(MAX) is the maximum operation junction
temperature , TA is the ambient temperature and the θJA is
the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT8289, the maximum junction temperature is 125°C. The
junction to ambient thermal resistance θJA is layout
dependent. For PSOP-8 package, the thermal resistance
θJA is 75°C/W on the standard JEDEC 51-7 four-layers
thermal test board. The maximum power dissipation at
TA = 25°C can be calculated by following formula:
P D(MAX) = (125°C − 25°C) / (75°C/W) = 1.333W
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(min.copper area PCB layout)
PD(MAX) = (125°C − 25°C) / (49°C/W) = 2.04W (70mm2
copper area PCB layout)
The thermal resistance θJA of SOP-8 (Exposed Pad) is
determined by the package architecture design and the
PCB layout design. However, the package architecture
design had been designed. If possible, it's useful to
increase thermal performance by the PCB layout copper
design. The thermal resistance θJA can be decreased by
adding copper area under the exposed pad of SOP-8
(Exposed Pad) package.
As shown in Figure 4, the amount of copper area to which
the SOP-8 (Exposed Pad) is mounted affects thermal
performance. When mounted to the standard
SOP-8 (Exposed Pad) pad (Figure 4a), θJA is 75°C/W.
Adding copper area of pad under the SOP-8 (Exposed
Pad) (Figure 4.b) reduces the θJA to 64°C/W. Even further,
increasing the copper area of pad to 70mm2 (Figure 4.e)
reduces the θJA to 49°C/W.
DS8289-01 March 2011
RT8289
The maximum power dissipation depends on operating
ambient temperature for fixed T J (MAX) and thermal
resistance θJA. For the RT8289, the Figure 5 of derating
curves allows the designer to see the effect of rising
ambient temperature on the maximum power dissipation
allowed.
2.2
2.0
Power Dissipation (W)
(d) Copper Area = 50mm2 , θJA = 51°C/W
Four Layer PCB
1.8
Copper Area
70mm2
50mm2
30mm2
10mm2
Min.Layout
1.6
1.4
1.2
1.0
0.8
0.6
(e) Copper Area = 70mm2 , θJA = 49°C/W
0.4
0.2
Figure 4. Themal Resistance vs. Copper Area Layout
Design
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 5. Derating Curves for RT8289 Package
Layout Consideration
Follow the PCB layout guidelines for optimal performance
of the RT8289.
`
Keep the traces of the main current paths as short and
wide as possible.
` Put the input capacitor as close as possible to the device
pins (VIN and GND).
` LX node is with high frequency voltage swing and should
(a) Copper Area = (2.3 x 2.3) mm2, θJA = 75°C/W
be kept at small area. Keep analog components away
from the LX node to prevent stray capacitive noise pickup.
` Connect feedback network behind the output capacitors.
Keep the loop area small. Place the feedback
components near the RT8289.
`
(b) Copper Area = 10mm2, θJA = 64°C/W
Connect all analog grounds to a command node and
then connect the command node to the power ground
behind the output capacitors.
` An example of PCB layout guide is shown in Figure 6 for
reference.
(c) Copper Area = 30mm2 , θJA = 54°C/W
DS8289-01 March 2011
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11
RT8289
SW should be connected to inductor by
wide and short trace. Keep sensitive
components away from this trace.
SW
VOUT
CBOOT
VOUT
R1
COUT
L
BOOT
NC
2
NC
3
FB
4
GND
D1
SW
8
7
VIN
6
GND
5
EN
9
R2
COUT
CIN
CIN
Input capacitor should be
placed as close to the IC
as possible.
The feedback components
should be connected as close
to the device as possible.
GND
Figure 6. PCB Layout Guide
Table 3. Suggested Capacitors for CIN and COUT
Location
Component Supplier
Part No.
Capacitance (μF)
Case Size
CIN
MURATA
GRM32ER71H475K
4.7
1206
CIN
TAIYO YUDEN
UMK325BJ475MM-T
4.7
1206
COUT
SANYO
16IQC47M
47
D2
COUT
SANYO
10TPE47MAIB
47
B2
COUT
MURATA
GRM31CR60J476M
47
1206
Table 4. Suggested Diode
Component Supplier
Series
VRR M (V)
IOUT (A)
Package
DIODES
B550C
50
5
SMC
PANJIT
SK55
50
5
SMC
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DS8289-01 March 2011
RT8289
Outline Dimension
H
A
M
EXPOSED THERMAL PAD
(Bottom of Package)
Y
J
X
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
4.000
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.510
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.000
0.152
0.000
0.006
J
5.791
6.200
0.228
0.244
M
0.406
1.270
0.016
0.050
X
2.000
2.300
0.079
0.091
Y
2.000
2.300
0.079
0.091
X
2.100
2.500
0.083
0.098
Y
3.000
3.500
0.118
0.138
Option 1
Option 2
8-Lead SOP (Exposed Pad) Plastic Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: [email protected]
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
DS8289-01 March 2011
www.richtek.com
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