Ordering number : ENA0982A LA72715V LA72715VA Monolithic Linear IC JPN MTS (Multi Channel Television Sound) Decoder IC Overview JPN MTS (Multi Channel Television Sound) Decoder IC Features • With SIF circuit, alignment-free* STEREO channel separation. * In base band signal input mode, separation is adjusted by input level. • Three I2C slave-addresses are prepared. • The maximum output level is as large as 4.2dBV. (Frequency = 1kHz, distortion = less than 3%, VCC = 5V, TYP) • The external clock is unnecessary. • A couple of external input terminal is prepared. Functions • Stereo & Bilingual demodulation. • Stereo & Bilingual detection. • Just clock out. Specifications Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit Maximum power supply voltage VCCH max Allowable power dissipation Pd max Operating temperature Topr -20 to +80 °C Storage temperature Tstg -55 to +150 °C Ta ≤ 80°C, Mounted on a specified board* 7.0 V 203 mW * Mounted on a specified board: 114.3mm × 76.1mm × 1.6mm glass epoxy board Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. N1908 MS / D2607 TI IM 20070928-S00006, S00003 No.A0982-1/12 LA72715V, 72715VA Operating Ranges at Ta = 25°C Parameter Symbol Recommended operating voltage VCCH Allowable operating voltage VCCH op Conditions Ratings Unit 5.0 V 4.5 to 5.5 V Electrical Characteristics at Ta = 25°C, VDD = 5V [Condition of input signal at pin 5] BASE BAND input [Output] L-ch: pin 18, R-ch: pin 17 Ratings Parameter Symbol Conditions min typ unit max Current dissipation ICC1 No signal, Inflow current at pin 19 18 26 34 mA MONO output level VOMN1 fm = 1kHz, 100% Mod, Pre-emphasis OFF -6 -4.5 -3 dBV 501 595 708 MONO L/R level difference ∆VOMN1 fm = 1kHz, 100% Mod, Pre-emphasis OFF MONO distortion THDM1 fm = 1kHz, 100% Mod, Pre-emphasis OFF MONO frequency characteristics FCM1 fm = 10kHz/1kHz, 100% Mod, 15kHz LPF MONO S/N SNM1 Non Mod, 15kHz LPF 60 65 STEREO output level VOST1 fm = 1kHz, 100% Mod, Cue (Stereo), -6 -4.5 -3 501 595 708 0.5 1 -1 -18 0 1 0.2 0.5 -13.5 mVrms dB % dB Pre-emphasis OFF 15kHz LPF STEREO distortion THDS1 fm = 1kHz, 100% Mod, Cue (Stereo), dB dBV mVrms % 15kHz LPF STEREO S/N SNS1 Sub Carrier (Non Mod), Cue (Stereo), 50 60 dB -6 -4.5 -3 501 595 708 mVrms 0.2 0.5 % 15kHz LPF Main output level VOMA1 fm = 1kHz, 100% Mod, Cue (Bilingual), 15kHz LPF Main distortion THDMA1 fm = 1kHz, 100% Mod, Cue (Bilingual), dBV 15kHz LPF Main S/N SNMA1 SUB output level VOSU1 Sub Carrier (Non Mod), Cue (Bilingual), 15kHz LPF fm = 1kHz, 100% Mod, Cue (Bilingual), 15kHz LPF SUB distortion THDSU1 60 65 -6 -4.5 -3 501 595 708 mVrms 0.7 1.5 % fm = 1kHz, 100% Mod, Cue (Bilingual), dB dBV 15kHz LPF SUB frequency characteristics FCSU1 fm = 10kHz/1kHz, 60% Mod, Cue (Bilingual), -18 -14.5 dB Sub Carrier (Non Mod), Cue (Bilingual), 15kHz LPF 50 60 dB fm = 1kHz (L-only), 60% Mod, Cue (Stereo), 35 43 dB 35 43 dB 15kHz LPF, Pre-emphasis OFF SUB Main S/N SNSU1 STEREO separation L → R SEPR1 15kHz LPF STERO separation R → L SEPL1 fm = 1kHz (R-only), 60% Mod, Cue (Stereo), 15kHz LPF Stay behind carrier level (SUB) CLSU1 Main = 0%, Sub = 0% (Carrier) -50 -40 dBV -55 -45 dBV Cue (Bilingual) Stay behind carrier level (MAIN) CLMA1 Main = 0%, Sub = 0% (Carrier) Cue (Bilingual) Cross-talk MAIN → SUB CTSUB1 Main : fm = 1kHz, 100% modulation, 55 62 dB 55 62 dB 1.7 2 Cue (Bilingual), 1kHz BPF Cross-talk SUB → MAIN CTMA1 Sub : fm = 1kHz, 100% modulation, Cue (Bilingual), 1kHz BPF Input = Mono Signal MODE output MONO MODMO1 MODE output STEREO MODST1 Input = Stereo Signal MODE output BILINGUAL MODBI1 Input = Bilingual Signal Just Clock output High voltage JCH1 f = 400Hz (mono), 25% Mod Just Clock output Low voltage JCL1 f = 400Hz (mono), 10% Mod Max Output level MOL1 f = 1kHz, distortion = 3% EXTERNAL input level EXTIN1 f = 1kHz, (pin 12 & pin 13 input) 2.3 V 0 1 1.3 V 2.7 3 3.3 V 4 V 1 3.3 4.2 1462 1622 V dBV mVrms -14.5 dBV 188.4 mVrms No.A0982-2/12 LA72715V, 72715VA [Condition of input signal at pin 5] Deviation of SIF input MONO : (fm = 1kHz) 100%→4.5MHz±25kHz Pre-Emphasis ON [Output] L-ch : pin 18, R-ch : pin 17 Ratings Parameter Symbol Conditions min typ unit max Current dissipation ICC2 No signal, Inflow current at pin 19 20 28 36 mA Input sensitivity level VSIN fc = 4.5MHz 70 90 110 dBµV 3.16 31.62 316.2 MONO output level VOMN2 fm = 1kHz, 100% Mod, Pre-emphasis OFF -6 -4.5 -3 501 595 708 MONO L/R level difference ∆VOMN2 fm = 1kHz, 100% Mod, Pre-emphasis OFF -1 0 1 dB MONO distortion THDM2 fm = 1kHz, 100% Mod, Pre-emphasis OFF 0.2 0.5 % MONO frequency characteristics FCM2 fm = 10kHz/1kHz, 100% Mod, 15kHz LPF mVrms dBV mVrms -18 -13.5 dB 55 60 dB -6 -4.5 -3 501 595 708 0.5 1 Pre-emphasis OFF MONO S/N SNM2 STEREO output level VOST2 Non Mod, 15kHz LPF fm = 1kHz, 100% Mod, Cue (Stereo), 15kHz LPF STEREO distortion THDS2 fm = 1kHz, 100% Mod, Cue (Stereo), dBV mVrms % 15kHz LPF STEREO S/N SNS2 Sub Carrier (Non Mod), Cue (Stereo), 50 57 dB -6 -4.5 -3 501 595 708 mVrms 0.2 0.5 % dBV 15kHz LPF Main output level VOMA2 fm = 1kHz, 100% Mod, Cue (Bilingual), 15kHz LPF Main distortion THDMA2 fm = 1kHz, 100% Mod, Cue (Bilingual), dBV 15kHz LPF Main S/N SNMA2 Sub Carrier (Non Mod), Cue (Bilingual), 15kHz LPF 55 60 SUB output level VOSU2 fm = 1kHz, 100% Mod, Cue (Bilingual), -6 -4.5 -3 501 595 708 mVrms 0.7 1.5 % 15kHz LPF SUB distortion THDSU2 fm = 1kHz, 100% Mod, Cue (Bilingual), dB 15kHz LPF SUB frequency characteristics FCSU2 fm = 10kHz/1kHz, 60% Mod, Cue (Bilingual), -18 -14.5 dB 15kHz LPF, Pre-emphasis OFF SUB Main S/N SNSU2 Sub Carrier (Non Mod), Cue (Bilingual), 15kHz LPF 50 58 dB STEREO separation L → R SEPR2 fm = 1kHz (L-only), 60% Mod, Cue (Stereo), 35 38 dB STERO separation R → L SEPL2 35 38 dB 15kHz LPF fm = 1kHz (R-only), 60% Mod, Cue (Stereo), 15kHz LPF Stay behind carrier level (SUB) CLSU2 Main = 0%, Sub = 0% (Carrier) -50 -40 dBV -55 -45 dBV Cue (Bilingual) Stay behind carrier level (MAIN) CLMA2 Main = 0%, Sub = 0% (Carrier) Cue (Bilingual) Cross-talk MAIN → SUB CTSUB2 Main : fm = 1kHz, 100% modulation, 55 62 dB 55 62 dB 1.7 2 2.3 V 0 1 1.3 V 2.7 3 3.3 V 1 V Cue (Bilingual), 1kHz BPF Cross-talk SUB → MAIN CTMA2 Sub : fm = 1kHz, 100% modulation, Cue (Bilingual), 1kHz BPF MODE output MONO MODMO2 Input = Mono Signal MODE output STEREO MODST2 Input = Stereo Signal MODE output BILINGUAL MODBI2 Input = Bilingual Signal Just Clock output High voltage JCH2 f = 400Hz (mono), 25%Mod Just Clock output Low voltage JCL2 f = 400Hz (mono), 10%Mod Max Output level MOL2 f = 1kHz, distortion = 3% EXTERNAL input level EXTIN2 f = 1kHz, (pin 12 & pin 13 input) 4 V 3.3 4.2 1462 1622 mVrms dBV -14.5 dBV 188.4 mVrms No.A0982-3/12 LA72715V, 72715VA Package Dimensions Package Dimensions unit : mm (typ) 3175C [LA72715V] unit : mm (typ) 3287 7.8 [LA72715VA] 6.5 12 1 0.65 0.15 0.22 0.5 0.15 0.22 0.1 (1.3) 1.5max 1.5max (1.3) (0.5) 0.1 (0.33) 0.5 0.5 6.4 12 13 4.4 1 24 5.6 13 7.6 24 SANYO : SSOP24(275mil) SANYO : SSOP24(225mil) No.A0982-4/12 470kΩ to 1MΩ (*1) 0.01µF to 0.047µF (*1) VCC 2 1µF CUE BPF 3 10kΩ 21 4.7µF (*3) + 4 4.5fH TRAP R2 REGULATOR 19 7 VCC 100kΩ JUST CLK MAIN DEEM SUB DEEM SUB 8 SW LCH RCH MATRIX 1kΩ 9 MAIN 15 1kΩ 10 I2C DECODE 16 SLAVE ADD SELECT H:84H OPEN:80H L:A0H 1µF 11 14 1µF 1µF 12 13 EXT_IN(L) JUST CLK OUT I2C I2C TEST1 EXT_IN(R) MUTE (open collector) CLOCK H:MUTE DATA R1 OPEN/L:NORMAL 4.5MHz BPF From (*2) Tuner SLAVE ADDRESS = 1000 000*B (16PIN : OPEN) SLAVE ADDRESS = 1000 010*B (16PIN : H) Match SLAVE ADDRESS = 1010 000*B (16PIN : L) resistance (*2) SIF_IN 0.1µF GND 6 15kHz LPF 15kHz LPF 17 AMP(10dB) 18 + + OUT(R) 2.2µF or more LOGIC CONTROL SIF 5 + OUT(L) 100µH 2.2µF or more VCC 5V 47µF 0.1µF MODE 20 SUB DEMOD SUB DET 4.7µF SUB BPF 22 N.C. Base Band Mode Application controlled by I2C 4 5 + MPX IN N.C 10µF 1 AM DEMOD 952Hz BPF COMP 3.5fH CLK.G 23 24 CUE DET N.C. N.C. 2.2µF + MODE I/O LA72715V, 72715VA Block Diagram and Application Circuit Example The value of (1*), (2*), and (3*) affects sensitivity for signal detection. It must be adjusted depending on the circumstances by the user. (1*): Recommended constant value 0.0033µF + 470kΩ (values when tested) (2*): Recommended matching resistor value R1=1kΩ, R2=1kΩ Recommended BPF Murata SFSRA4M50DF00-B0 (3*): Recommended constant value 4.7µF to 10kΩ The ceramic capacitor may be used for the electrolytic capacitor. No.A0982-5/12 LA72715V, 72715VA Pin Functions Pin No. 1 Pin Name AM DETECTOR DC voltage Function AC level DC : 2.3V Equivalent Circuit Reference terminal of AM detection. PAD VCC 10kΩ 1kΩ 10kΩ 1kΩ 2 DC FILTER OUT 14 2pin DC : 2.6V Absorbing the DC offset of signal line by external capacity. 14pin DC : 2.1V PAD 3 DC FILTER IN DC : 2.4V 15 Absorbing the DC offset of signal line by 2.4V external capacity. 2kΩ 2kΩ 100kΩ PAD 4 FM FILTER DC : 2.9V 1kΩ Filter terminal for making stable DC voltage of FM detection output in SIF part. Normally, use a condenser of 4.7µF. Increase the capacity value with concerning frequency characteristics of low level. 1kΩ 1kΩ PAD 5 SIF INPUT DC : 2.4V Input terminal for SIF. The input impedance is about 5kΩ. Be care for PAD about pattern layout of the input circuit, because of causing buzz-beat and buzz by leaking noise signal into the input terminal. (The noise signal depending on sound is particularly video signal and chroma signal and 500Ω 500Ω 10kΩ so on. VIF carrier becomes noise signal.) 10kΩ 6 GND Continued on next page. No.A0982-6/12 LA72715V, 72715VA Continued from preceding page. Pin Pin Name No. 7 DC voltage JUST CLOCK OUT Function AC level Equivalent Circuit Rectangle wave output for JUST CLOCK. (OPEN Collector) 5V 100kΩ Pull-up PAD 5kΩ 0V 8 MUTE DC : 0V MUTE : 3.0V to control pin. PAD 1kΩ 2.4V 100kΩ 9 70kΩ High : 2.5V to 5V Serial data input 30µA Low : 0V to 1.5V pin. 5V PAD 500Ω 0V 10 Serial CLK input High : 2.5V to 5V pin Low : 0V to 1.5V 30µA 5V PAD 500Ω 0V 11 TEST1 12 EXTIN_R DC : 2.4V EXT input Rch -14.5dBV not used : OPEN VCC PAD 50kΩ 1kΩ 2.4V 13 EXTIN_L DC : 2.4V EXT input Lch -14.5dBV not used : OPEN VCC PAD 50kΩ 1kΩ 2.4V Continued on next page. No.A0982-7/12 LA72715V, 72715VA Continued from preceding page. Pin Pin Name No. 16 DC voltage Function AC level Equivalent Circuit SLAVE ADD SELECT 17 Line Out (R) terminal 18 DC : 2.4V Line output pin. AC : -4.5dBV Line Out (L) 50kΩ terminal 2.5pF 250Ω 300Ω PAD 2.5pF 50kΩ 19 VCC5V 20 MTS MODE No signal Detection output for M.T.S. signal. OUT DC : 2.0V BILINGUAL :3.0V MONO :2.0V STEREO :1.0V 10kΩ 10kΩ PAD 21 REG FILT DC : 2.4V Filter terminal of reference voltage source PAD 500Ω 500Ω 50kΩ 10kΩ 10kΩ 10kΩ 22 NC 23 24 I2C BUS Serial Interface Specification (1) Data Transfer Manual This IC adopts control method (I2C-BUS) with serial data, and controlled by two terminals which called SCL (serial clock) and SDA (serial data). At first, set up*1the condition of starting data transfer, and after that, input 8 bit data to SDA terminal with synchronized SCL terminal clock. The order of transferring is first, MSB (the Most Scale of Bit), and save the order. The 9th bit takes ACK (Acknowledge) period, during SCL terminal takes ‘H’, this IC pull down the SDA terminal. After transferred the necessary data, two terminals lead to set up and of *2data transfer stop condition, thus the transfer comes to close. *1 Defined by SCL rise down SDA during ‘H’ period. *2 Defined by SCL rise up SDA during ‘H’ period. (2) Transfer Data Format After transfer start condition, transfers slave address (1000 000*) to SDA terminal, control data, then, stop condition (See figure 1). Slave address is made up of 7bits, *38th bit shows the direction of transferring data, if it is ‘L’ takes write mode (As this IC side, this is input operation mode), and in case of ‘H’ reading mode (As this IC side, this is output operation mode). Data works with all of bit, transfer the stop condition before stop 8bit transfer, and to stop transfer, it will be canceled the transfer dates. *3 It is called R/W bit. No.A0982-8/12 LA72715V, 72715VA Fig.1 DATA STRUCTURE “WRITE” mode START Condition R/W Slave Address L ACK Control data ACK STOP condition ACK Internal Data * ACK STOP condition Fig.2 DATA STRUCTURE “READ” mode START condition R/W Slave Address H ∗ Output data as follows ; bit8 is result of STERO DET (H : STEREO) bit7 is result of BILINGUAL DET (H : BILINGUAL) bit6 is Initial Condition ‘H’ bit5 to bit1 are fixed to ‘L’ (3) Initialize This IC is initialized for circuit protection. Initial condition is “01h (Main-mode) ”. Reference Parameter Symbol min max unit LOW level input voltage VIL -0.5 1.5 V HIGH level input voltage VIH 2.5 5.5 V LOW level output current IOL 3.0 mA 100 kHz SCL clock frequency fSCL Set-up time for a repeated START condition tSU : STA 4.7 0 µs Hold time START condition. After this period, the first clock pulse is generated tHD : STA 4.0 µs LOW period of the SCL clock tLOW 4.7 Rise time of both SDA and SDL signals tR HIGH period of the SCL clock tHIGH 0 µs 1.0 µs µs 4.0 1.0 µs Fall time of both SDA and SDL signals tF 0 Data hold time tHD : DAT 0 µs Data set-up time tSU : DAT 250 ns Set-up time for STOP condition tSU : STO 4.0 µs BUS free time between a STOP and START condition tBUF 4.7 µs Definition of Timing tR t HI G H tF SCL t HD : S TA t SU : S TA t LO W t HD : D AT A t SU : D AT t SU : S TO t BU F SDA No.A0982-9/12 LA72715V, 72715VA I2C Control/LA72715N/VA Group number is ONLY 1 (Normal Use). Grp-1 D8 D7 D6 D5 D4 D3 * * * D2 D1 Condition 0 0 Bilingual 0 1 Main 1 0 Sub 1 1 (Prohibit) 0 Normal 1 Forced MONO 0 Normal (MUTE OFF) 1 * * * * MUTE 0 TV Mode (SW Normal) 1 EXT Mode (SW EXT) 0 JUST CLOCK OFF 1 JUST CLOCK ON 0 SIF Mode 1 BASE BAND Mode 0 Fix 1 Prohibit (TEST Mode) *: Initial condition Read out data D8 D7 D6 D5 D4 D3 D2 D1 0 0 0 0 0 Condition Fixed 0 Normal 1 Stereo det 0 Normal 1 Bilingual det 0 Except an initial condition 1 Initial condition Test Mode Condition When STOP condition transform at Grp-1 data-end, controlled NORMAL mode. Grp-2 (Only test condition : Normally, this group is hidden group) D8 D7 D6 D5 D4 D3 D2 D1 Condition/Moniter position 0 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 1 TEST-01 SIF out 0 0 0 0 0 0 1 0 TEST-02 SUB FIL out 0 0 0 0 0 0 1 1 TEST-03 CUE FIL out 0 0 0 0 0 1 0 0 TEST-04 SUD DET out 0 0 0 0 0 1 0 1 TEST-05 CUE DC1 out 0 0 0 0 0 1 1 0 TEST-06 SUB DET2 out 0 0 0 0 0 1 1 1 TEST-07 110K out 0 0 0 0 1 0 0 0 TEST-08 28K out 0 0 0 0 1 0 0 1 TEST-09 CUE PLS out 0 0 0 0 1 0 1 0 TEST-10 FIL ZAP LEVEL SLAVE ADDRESS 80H (16pin : OPEN) SLAVE ADDRESS 84H (16pin : VCC) SLAVE ADDRESS A0H (16pin : GND) No.A0982-10/12 LA72715V, 72715VA Mode Select (pin & I2C setting) Broadcast signal Bilingual STEREO MONO MUTE PIN I 2C setting READ OUTPUT MODE MODE MODE OUT 8pin D5 D4 D3 D2 D1 LCH (18pin) RCH (17pin) MODE D8 L or OPEN 0 0 0 0 0 L or OPEN 0 0 0 0 1 MAIN SUB BOTH MAIN MAIN MAIN L or OPEN 0 0 0 1 0 SUB L or OPEN 0 0 1 * * MAIN SUB SUB 0 1 MAIN MONO 0 1 * * 1 * * * MUTE MUTE MUTE 0 1 H * * * * * MUTE MUTE MUTE 0 1 I/O D7 20pin 0 1 3V 0 1 L or OPEN 1 0 * * * EXT L EXT R EXT 0 1 L or OPEN 0 0 0 * * L R STEREO 1 0 L or OPEN 0 0 1 * * L+R L+R MONO 1 0 * * 1 * * * MUTE MUTE MUTE 1 0 H * * * * * MUTE MUTE MUTE 1 0 L or OPEN 1 0 * * * EXT L EXT R EXT 1 0 L or OPEN 0 0 * * * L+R L+R MONO 0 0 * * 1 * * * MUTE MUTE MUTE 0 0 H * * * * * MUTE MUTE MUTE 0 0 L or OPEN 1 0 * * * EXT L EXT R EXT 0 0 1V 2V 16pin : Slave address select. 0V to 1.5V : A0H, OPEN : 80H, 3.0V to VCC : 84H Serial Data Specification (I2C bus communication) Data bit MSB D8 TEST 0 : OFF 1 : ON LSB D7 D6 D5 D4 D3 SIF or JUST EXT SOURCE NORMAL OUT Forced BASE BAND CLK SELECT MUTE MONO 0 : OFF 0 : OFF(TV) 0 : OFF 0 : OFF 1 : ON 1 : EXT 1 : ON 1 : ON 0 : SIF 1 : BASE BAND D2 D1 Bilingual mode select 00:BILINGUAL 01 : MAIN 10 : SUB 11 : Unusable Note : Underline shows default setting No.A0982-11/12 LA72715V, 72715VA LA72715V/VA Reference Characteristics Output frequency characteristics TYP (30%MOD SIF_IN) 10 6 4 MAIN ST_Lch ST_Rch Output level – dB 5 0 SUB –2 –4 0 –5 IN B MA SU Output level – dB 2 De-emphasis characteristics TYP (30%MOD SIF_IN) –6 – 10 –8 – 10 – 15 0.01 2 3 5 7 0.1 2 3 5 7 1 2 3 5 7 10 0.01 Frequency, f – kHz 1500 el lev 2 t Ou 500 1 Distortion 2 3 5 7 1 2 3 5 7 10 4 3 t pu 5 7 0.1 Frequency, f – kHz Main degree of modulation – Output level & Distortion factor TYP (1kHz SIF_IN) 1000 3 Distortion factor – % Output level – mVrms 2000 2 factor 0 0 0 100 200 300 Main degree of modulation – % SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of November, 2008. Specifications and information herein are subject to change without notice. PS No.A0982-12/12