FA551X series CMOS IC For Switching Power SupplyFA551X Control FA5510P (N), FA5511P (N) FA5514P (N), FA5515P (N) ■ Dimensions, mm SOP-8 5 8 3.9 The FA551X series are the PWM type switching power supply control ICs that can directly drive power MOSFET. These ICs use a CMOS device with high dielectric strength (30V) to implement low power consumption. These ICs contain many function in a small 8-pin package. With these ICs, a highperformance and compact power supply can be created because not many external discrete components are needed. 6.0±0.2 ■ Description 4 1 0.20 0.4±0.1 5 8 6.4 DIP-8 1.27 1 9.3 4 ■ Block diagram FA5510P (N), FA5511P (N) CS(8) REF (7) 2.54 VCC(6) 0.8V/0.68V 5.2µA 5V VCC 0.95mA ENB 5V REF 15.5V 16.5V/9V 3.5V OUT (5) ENB 4V PWM GND (4) R QB S Q FF 5V Controlled block RT(1) IS+(3) FA5514P (N), FA5515P (N) VCC(6) CS(8) REF (7) 0.8V/0.68V 5.2µA 5V VCC 0.95mA ENB 5V REF 15.5V 16.5V/9V 3.5V OUT (5) ENB 4V R -0.17V RT Oscillator timing resistor Setting oscillation frequency 2 FB Feedback Input of PWM comparator 3 IS Overcurrent detection Input of the overcurrent limiting function 4 GND Ground Ground 5 OUT Output Output for driving a power MOSFET 6 VCC Power supply Power supply 7 REF Reference voltage Reference voltage output (5V) 8 CS Soft-start and ON/OFF control Soft-start, ON/OFF function and latch-mode shutdown operations Type Max. duty cycle (typ.) Polarity of overcurrent Package detection FA5510P 46% + FA5510N GND (4) FA5514P FA5514N FF FA5515P FA5515N DIP-8 SOP-8 70% + FA5511N QB S Q 5V Controlled block RT(1) 1 FA5511P OUT PUT PWM OSC RT CT Description UVLO 0.8V Dmax FA5514: 46% FA5515: 70% 5˚ 0~1 15.5V 8.5V/7.9V FB (2) ˚ Pin Pin Function No. symbol OUT PUT +0.24V 7.62 0~15 UVLO 0.8V OSC RT CT +0.1 0.05 0.25 – 15.5V 8.5V/7.9V FB (2) 0.46±0.1 3.0min 4.5max 1.5±0.3 3.3 • Low current consumption by CMOS process with high dielectric strength (30V) • Standby current of 2µA or less (at Vcc=14V), and operating current of 1.5mA (typ) • Overvoltage protection function detecting the Vcc voltage • A drive circuit for connecting a power MOSFET directly • Output peak current: ±1.5A • Pulse-by-pulse overcurrent limiting function • Overload protection function (latch or non-latch mode selectable) • Output ON-OFF function by external signal • Latch-mode overvoltage shutdown function • Undervoltage lockout function (16.5V ON / 9V OFF) • Reference voltage output (5V) • 8-pin package (DIP/SOP) 0~8° ■ Features Dmax FA5510: 46% FA5511: 70% 1.8max +0.1 –0.05 4.9 DIP-8 SOP-8 46% – 70% – DIP-8 SOP-8 DIP-8 SOP-8 IS-(3) 1 FA551X ■ Absolute maximum ratings Item Output peak current FB pin input voltage IS pin input voltage REF pin source current CS pin sink current Total power dissipation (Ta=25˚C) Symbol VCC1 VCC2 IOUT VFB VIS IREF ICS Pd Ambient temperature Maximum junction temperature Storage temperature Ta Tj Tstg Supply Voltage Low impedance source (ICC>15mA) Internal zener clamp (ICC<15mA) Rating 30 Self limiting ±1.5 –0.3 to 5.0 –0.3 to 5.0 –10 +2.0 800 (DIP-8) 400 (SOP-8) –30 to +85 125 –40 to +150 Unit V V A V V mA mA mW ˚C ˚C ˚C Note: There are cases where the IC cannot output the rating current depending on Vcc voltage or temperature. Maximum power dissipation curve Max. power dissipation 400mW (SOP) 800mW (DIP) 0 –30 25 125 85 Ambient temperature Ta [˚C] ■ Recommended operating conditions Item Symbol Min. Supply voltage VCC Oscillation frequency fOSC REF-GND capacitor Cref 0.1 Soft start capacitor CS 0.01 2 Typ. Max. Unit 10 28 V 10 500 0.47 kHz µF 1 µF FA551X ■ Electrical characteristics (VCC=18V, RT=47kΩ, Ta=25˚C) Reference voltage section (REF pin) Item Symbol Test condition Min. Reference voltage VREF Tj=25˚C 4.75 Line regulation Vdv1 VCC=10 to 28V Load regulation Vdv2 IL=0 to 10mA, VCC=18V Temperature stability VdT Ta=–30 to 85˚C Item Symbol Test condition Min. Typ. Max. Unit Oscillation frequency fOSC RT=47kΩ, Tj=25˚C 92.6 100 107.4 kHz Voltage stability fdv VCC=10 to 28V ±1.0 % Temperature stability fdT Ta=–30 to 85˚C ±0.02 %/˚C FA5511/15 Unit –40 Typ. Max. Unit 5.00 5.25 V ±6 ±20 mV –12 mV ±0.5 mV/˚C Oscillator section (RT pin) Pulse width modulation circuit section (FB pin) Item Symbol Test condition FA5510/14 FB pin source current IFB VFB=0 –855 –720 –585 –855 –720 –585 µA Input threshold voltage (FB pin) VTH FB0 Duty cycle =0% 0.9 VTH FBM Duty cycle =DMAX Min. Maximum duty cycle DMAX Typ. Max. Min. 1 0.9 1.92 42 46 Typ. Max. 1 V 2.40 50 66 70 V 74 % Overcurrent limiting circuit section (IS pin) Item Symbol Input threshold voltage (IS pin) VTHIS Source current (IS pin) IIS Delay time tpdIS Test condition FA5510/11 FA5514/15 Min. Typ. Max. Min. 220 240 260 –190 –170 –150 mV ±5 –28 VIS=0V 150 Typ. Unit –20 Max. –12 150 µA ns Soft start circuit section (CS pin) Item Symbol Test condition FA5310/14 Min. Max. Min. –3.2 Charge current (CS pin) ICHG VCS=1V, Tj=25˚C –7.2 –5.2 Input threshold voltage (CS pin) VTH CS0 Duty cycle =0% 1.0 VTH CSM Duty cycle =DMAX 0.90 FA5311/15 Typ. Unit Typ. Max. –7.2 –5.2 –3.2 0.90 1.0 V 2.40 V 1.92 µA Output ON/OFF control circuit section (CS pin) Item Symbol Test condition Min. Source current (CS pin) IS0CS VCS=0V, Tj=25˚C –7.2 ON/OFF control threshold voltage (CS pin) VTHON OFF→ON, Tj=25˚C VTHOFF ON→OFF, Tj=25C Hysteresis voltage VTHOHS 0.50 Typ. Max. Unit –5.2 –3.2 µA 0.8 0.93 V 0.68 V 0.12 V 3 FA551X Latch-mode cutoff circuit section (CS pin) Item Symbol Test condition Sink current (CS pin) ISICS VCS=6.5V, VFB=1V, Tj=25˚C 18 30 45 µA Cutoff threshold voltage (CS pin) VTH CSF ON→OFF, Tj=25˚C 8.0 8.5 9.0 V VTH CSN OFF→ON, Tj=25˚C 7.4 7.9 8.4 V Hysteresis voltage Min. VTHHIS Typ. Max. 0.6 Unit V Overload cutoff circuit section (FB pin) Item Symbol Overload threshold voltage (FB pin) VTH FB Test condition Min. Typ. Max. Unit 3.2 3.5 3.8 V Unit Overvoltage cutoff circuit section (VCC pin) Item Symbol Test condition Min. Typ. Max. Overvoltage threshold voltage (VCC pin) VTH VCC Tj=25˚C 30 31.8 34 Cutoff operating supply current (VCC pin) IVCC Tj=25˚C, VCC=VTHVCC Charge current (CS pin) IS0CS2 VCS=6.5V 14 –1.4 –0.95 V mA –0.5 mA Undervoltage lockout circuit section (VCC pin) Item Symbol Test condition Min. Typ. Max. Unit OFF-to-ON threshold voltage VCC ON Tj=25˚C 15.5 16.5 17.5 V ON-to-OFF threshold voltage VCC OFF Tj=25˚C 8.5 9.0 10.0 V Hysteresis voltage VHYS Tj=25˚C 6.8 7.5 8.2 V Item Symbol Test condition Min. Low output voltage VOL IOL=100mA High output voltage VOH IOH=–100mA, VCC=18V 16.5 V Rise time tr CL=1nF 40 ns Fall time tf CL=1nF 25 ns Output circuit section (OUT pin) 15 Typ. Max. Unit 0.7 1.5 V Supply current (VCC pin) Item Symbol Test condition Stand-by current ICCSTB VCC=14V Startup current ICCST VCC=OFF-to-ON threshold voltage Operating-state supply current ICCOP OFF-state supply current ICCOF Latch mode supply current ICCL 4 Min. Typ. Max. Unit 2 µA 12 30 µA No load 1.5 2.5 mA VCC=17V, CS=0V 80 200 µA VCC=10V 45 80 µA FA551X ■ Characteristic curves (VCC=18V, RT=47kΩ, Ta=25˚C) Oscillation frequency (fOSC) vs. timing resistor resistance (RT) Oscillation frequency (fOSC) vs. supply voltage (VCC) 100.1 1000 100.08 100.06 100.04 fosc (kHz) fosc (kHz) 100 10 100.02 100 99.98 99.96 99.94 99.92 1 1 10 100 1000 99.9 10 RT (kΩ) 15 20 25 30 Vcc (V) Oscillation frequency (fOSC) vs. FB pin source current (IFB) vs. FB pin voltage (VFB) junction temperature (Tj) 102 0 -100 101.5 -200 -300 IFB (µA) fosc (kHz) 101 100.5 100 -400 -500 -600 99.5 -700 99 -800 98.5 –50 0 0 50 100 1 2 150 3 4 5 VFB (V) Tj (˚C) Maximum duty cycle (DMAX) vs. timing resitor resistance (RT) FA5510/14 Maximum duty cycle (DMAX) vs. timing resitor resistance (RT) FA5511/15 49 72 48 71 46 DMAX (%) DMAX (%) 47 45 44 43 70 69 68 42 1 10 100 RT (kΩ) 1000 67 1 10 100 1000 RT (kΩ) 5 FA551X Maximum duty cycle (DMAX) vs. junction temperature (Tj) FA5511/15 47 71 46.8 70.8 46.6 70.6 46.4 70.4 DMAX (%) DMAX (%) Maximum duty cycle (DMAX) vs. junction temperature (Tj) FA5510/14 46.2 46 45.8 70.2 70 69.8 45.6 69.6 45.4 69.4 45.2 69.2 69 45 -50 0 50 100 -50 150 0 50 100 150 Tj (˚C) Tj (˚C) IS (+) pin current (IIS (+)) vs. IS (+) pin voltage (VIS (+)) FA5510/11 IS (–) pin current (IIS (–)) vs. IS (–) pin voltage (VIS (–)) FA5514/15 5 0 -0.05 0 IIS (–) (µA) -0.1 IIS (+) (µA) -0.15 -0.2 -0.25 -5 -10 -15 -0.3 -20 -0.35 -25 -0.4 -1 0 1 2 3 -1 4 0 1 4 CS pin current (ICS) vs. CS pin voltage (VCS) FB=0V 40 40 35 35 30 30 25 25 ICS (µA) ICS (µA) CS pin current (ICS) vs. CS pin voltage (VCS) FB=open 20 15 20 15 10 10 5 5 0 0 -5 -5 -10 0 2 4 6 VCS (V) 6 3 VIS (–) (V) VIS (+) (V) -10 2 8 10 12 0 2 4 6 VCS (V) 8 10 12 FA551X CS pin charge current (ICHG) vs. junction temperature (Tj) -4.5 ICHG (µA) -4.7 -4.9 -5.1 -5.3 -5.5 -50 0 50 100 150 Tj (˚C) UVLO OFF-to-ON threshold voltage (VCCON) vs. junction temperature (Tj) UVLO ON-to-OFF threshold voltage (VCCOFF) vs. junction temperature (Tj) 16.9 9.1 16.8 VCCOFF (V) VCCON (V) 9.05 16.7 16.6 16.5 9 8.95 16.4 16.3 -50 0 50 100 8.9 -50 150 0 Tj (˚C) 0.75 1.6 0.7 1.5 0.65 VOL (V) VCC-VOH (V) 0.8 1.7 1.4 1.3 0.6 0.55 1.2 0.5 1.1 0.45 1 0.4 0.9 0.35 20 VCC (V) 150 L-level output voltage (VOL) vs. supply voltage (VCC) IO=100mA 1.8 15 100 Tj (˚C) H-level output voltage (VOH) vs. supply voltage (VCC) IO= –100mA 0.8 10 50 25 30 0.3 10 15 20 25 30 VCC (V) 7 FA551X Operating state supply current (ICCOP) vs. supply voltage (VCC) Operating state supply current (ICCOP) vs. junction temperature (Tj) 1.8 1.72 1.7 FB=0V 1.7 1.5 ICCOP (mA) ICCOP (mA) 1.6 1.4 1.3 1.2 1.66 FB=0V 1.64 1.1 FB=Open 1 1.62 0.9 0.8 1.68 10 15 20 25 1.6 -50 30 0 50 VCC (V) 100 150 Tj (˚C) OFF state supply current (ICCOFF) vs. supply voltage (VCC) OFF state supply current (ICCOFF) vs. supply voltage (VCC) Enlarged 3000 200 180 160 ICCOFF (µA) ICCOFF (µA) 2500 2000 1500 1000 140 120 100 80 60 40 500 0 10 20 15 20 25 0 10 30 12 14 16 18 20 VCC (V) VCC (V) Latch mode supply current (ICCL) vs. supply voltage (VCC) Latch mode supply current (ICCL) vs. supply voltage (VCC) Enlarged 200 3000 180 2500 160 140 ICCL (µA) ICCL (µA) 2000 1500 120 100 80 60 1000 40 20 500 0 10 0 10 15 20 VCC (V) 8 25 30 12 14 16 VCC (V) 18 20 FA551X ■ Description of each circuit OSC 1. Oscillator The oscillator generates a triangular waveform by charging and discharging the built-in capacitor. A desired oscillation frequency can be set by the value of the resistor connected to the RT pin (See Figure 1). The built-in capacitor voltage oscillates between about 3V and 1V, with almost the same charging and discharging gradients (Figure 2). You can set the desired oscillation frequency by changing the gradients using the resistor connected to the RT pin. (Large RT=Low frequency, small RT=High frequency) The relationship between RT and the oscillation frequency is approximately given by: fOSC ⱌ 4880 [kHz] ........................................................ (1) RT + 1.4 1 RT RT Fig. 1 Oscillator RT=Small RT=Large 3V 1V 4880 RT ⱌ – 1.4 [kΩ] ........................................................ (2) fOSC Fig. 2 Oscillator output fOSC: Oscillation frequency [kHz] RT: Timing resistance [kΩ] The oscillator waveform cannot be observed from the outside because the oscillator output is not pinned out. The oscillator output is connected to a PWM comparator. 2. PWM comparator The PWM comparator has four inputs as shown in Figure 3. Oscillator output is compared with CS pin voltage , FB pin voltage , and DT voltage . The lowest of three inputs , , and has priority and is compared with oscillator output . While the voltage is lower than the oscillator output, the comparator output is high. While the voltage is higher than the oscillator output, the PWM comparator output is low (see Figure 4). The IC OUT pin voltage is high while the PWM comparator output is low. When the IC is powered up, CS pin voltage controls soft start operation. The output pulse then begins to widen gradually. During normal operation, the output pulse width is determined within the maximum duty cycle (FA5510/14: 46%, FA5511/15: 70%) set by DT voltage under the condition set by FB pin voltage , to stabilize the output voltage. DT voltage FB pin voltage CS pin voltage Oscillator output Fig. 3 PWM comparator output PWM comparator FB pin voltage (4.0V) DT voltage Oscillator output CS pin voltage PWM comparator output OUT pin voltage Fig. 4 PWM comparator timing chart 9 FA551X 3.1 Soft start function Figure 7 shows the soft start circuit. Figure 8 is a soft-start operation timing chart. The CS pin is connected to capacitor Cs. When the power is turned on, the constant current source (5.2µA) begins to charge the capacitor. As shown in the timing chart, the CS pin voltage rises slowly in accordance with the capacitor Cs charging current. The CS pin is also connected to the IC internal PWM comparator, which has such characteristics that the voltage is determined to output on the basis of the lowest of input voltages. The comparator output pulse slowly widens to cause a soft start as shown in the timing chart. The soft start period can be approximately estimated by the period tS, from the time the IC is activated to the time the output pulse width widens to 30%. The period tS is given by the following equation: tS [ms] ⱌ 310 ⫻ CS [ms] ..................................................... (3) Cs: Soft start capacitor [µF] Cs CS VCC 8 C1 REF 7 6 0.8/0.68V 5V VCC 5.2µA ENB 5V REF C2 8.5/7.9V UVLO 3.5V C3 4V PWM FB 2 Output circuit DMAX OSC 1 RT Fig. 5 CS pin voltage Vcs [V] 3. CS pin circuit As shown in Figure 5, capacitor Cs is connected to the CS pin. The CS pin voltage varies depending on the charging voltage of this capacitor Cs. When the power is turned on, the constant current source (5.2µA) begins to charge capacitor. Accordingly, the CS pin voltage rises as shown in Figure 6. The CS pin voltage is connected to the PWM comparator, which is characterized to make output based on the lowest of input voltages. The device enters soft-start mode while the CS pin voltage is between 1.0V and VTHCSM (FA5510/14: 1.92V, FA5511/15: 2.4V). During normal operation, the CS pin is clamped at 4.0V by internal zener diode. If the output voltage drops due to an overload and the FB voltage rises to 3.5V or more, the clamp voltage 4.0V is canceled and the CS pin voltage rises to 9.5V. The CS pin is also connected to latch comparator C2. If the CS pin voltage rises to 8.5V or more, comparator C2 toggles to turn off the 5V REF circuit, thereby shutting the output down. Since the CS pin is also connected to comparator C1, the 5V REF circuit can be turned off to shut the output down by dropping the CS pin voltage below 0.68V. In this way, comparator C1 can be used for output on-off control. As explained above, the CS pin can be used for soft-start, overload output shutdown, and output on-off control by varying the voltage. Further details on the above three major functions of the CS pin are given below. CS pin circuit 9.5 8.5 Shutdown 4.0 VTHCSM 1.0 0.68/0.8 0 Momentary overload or overvoltage Overload or overvoltage Soft start Time t OFF mode Fig. 6 CS pin waveform Cs CS VCC 8 6 5.2µA PWM FB 2 Output circuit DMAX OSC 1 RT Fig. 7 Soft start circuit FB pin voltage Oscillator output DT voltage CS pin voltage OUT pin output Fig. 8 10 Soft start timing chart FA551X 3.2 Overload shutdown function Figure 9 shows the overload shutdown circuit, and Figure 10 is a timing chart that illustrates overload shutdown operation. If the output voltage drops due to an overload or short circuit, the FB pin output voltage rises. If the FB pin voltage exceeds the reference voltage (3.5V) of comparator C3, the output of comparator C3 goes low to turn off the switch. With the switch off, the CS pin voltage clamped at 4.0V by zener diode in normal operation is unclamped, and the constant current source (5.2µA) begins to charge capacitor Cs again and the CS pin voltage rises. When the CS pin voltage exceeds the reference voltage (8.5V) of comparator C2, the output of comparator C2 toggles to turn off the 5V REF circuit. The IC then enters the latched mode and shuts down the output. IC current consumption for shutdown is 45µA (typ) (Vcc=10V). This current must be supplied through the startup resistor. The IC enters output off (low voltage) state. The overload shutdown operation can be reset by lowering the supply voltage Vcc to below the OFF threshold voltage (9.0V) or forcing the CS pin voltage below 7.9V. The period tOL from the time the output is short-circuited to the time the output circuit goes off is given by the following equation: (9.5V) Comparator C2 reference voltage (8.5V) (4V) CS pin voltage DT voltage FB pin voltage (0V) Oscillator output H OUT pin voltage L REF pin voltage ON OFF Overload detection Overload shutdown Fig. 10 Overload shutdown timing chart ON/OFF control Cs CS VCC 8 REF 7 5V VCC ENB 5V REF tOL [ms] ⱌ 870 ⫻ CS [ms] ..................................................... (4) C1 6 0.8/0.68V 5.2µA C2 8.5/7.9V UVLO Cs: Soft start capacitor [µF] When you want to disable the overload shutdown function, see item 9 in “Design advice” 3.3 Output ON/OFF control function The IC can be turned on or off via an external signal applied to the CS pin. Figure 11 shows the output on/off control circuit, and Figure 12 is a timing chart. The IC is turned off when the CS pin voltage is externally made to drop below 0.68V (typ). The output of comparator C1 goes high to turn the 5V REF circuit off. This shuts the output down. The IC enters output off (low voltage) state. Required IC current consumption during shutdown is 80µA (typ) (Vcc=17V). This current must be supplied through the startup resistor. The IC goes on when the CS pin is opened and the CS pin voltage exceeds 0.80V (typ). This turns the 5V REF circuit on and results in automatic soft start. The power supply then restarts operation. PWM FB 2 Output circuit DMAX OSC 1 RT Fig. 11 External output ON/OFF control circuit (4V) CS pin voltage DT voltage FB pin voltage Oscillator output Comparator C1 reference voltage (0.8/0.68V) H OUT pin output Cs L CS VCC 8 6 REF pin voltage REF 7 C1 5V VCC ON OFF 0.8/0.68V ON mode OFF mode 5.2µA ENB 5V REF C2 Fig. 12 Output ON/OFF control circuit timing chart 8.5/7.9V 3.5V UVLO C3 4V PWM FB 2 DMAX Output circuit OSC 1 RT Fig. 9 Overload shutdown circuit 11 FA551X 4. Overcurrent limiting circuit The overcurrent limiting circuit detects the peak value of every drain current pulse (pulse by pulse method) of the main switching MOSFET to limit the overcurrent. The detection threshold voltage is +0.24V for FA5510/11 or –0.17V for FA5514/15 with respect to the ground as shown in Figure 13 and Figure 14. The drain current of the MOSFET is converted to voltage by resistor Rs and fed to the IS pin of the IC. If the voltage exceeds the reference voltage +0.24V (FA5510/11) or –0.17V (FA5514/15) of comparator C4, comparator C4 works to set flip-flop output Q to high. The output is immediately turned off to shut off the current. Flip-flop output Q is reset on the next cycle to turn on the output again. This operation is repeated to limit the overcurrent. If the overcurrent limiting circuit malfunctions due to noise, place an RC filter between the IS pin and MOSFET as shown in Figure 13 and Figure 14. (See item 12 in “Design advice.”) Figure 15 is a timing chart that illustrates overcurrent-limiting operations. 5. Vcc overvoltage protection circuit The IC contains a Vcc overvoltage protection circuit to protect the IC from damage by overvoltage. Figure 16 shows the overvoltage protection circuit. Figure 17 is a timing chart that illustrates overvoltage protection operations. Overvoltage is detected if the supply voltage Vcc rises to 31.8V (Icc=14mA) or more and current flows in the built-in zener diode. The output of comparator C5 then goes high and the constant current source (0.95mA) raises the CS pin voltage. When the CS pin voltage exceeds 8.5V, the output of comparator C2 goes high to turn off the 5V REF circuit. The IC then enters the latched mode and the IC output is put in the off (low voltage) state. When latched mode, the IC current consumption is 45µA (typ) (Vcc=10V). This current must be supplied through the startup resistor. The overvoltage shutdown operation can be reset by lowering the supply voltage to below 9.0V or forcing the CS pin voltage below 7.9V. (When you want to enable Vcc overvoltage shutdown at a desired voltage, see item 6 in “Design advice.”) CS pin voltage (4V) DT voltage FB pin voltage Oscillator output H OUT pin output L Comparator C4 reference voltage FA5510/11:+0.24V FA5514/15:-0.17V IS pin voltage REF pin voltage ON OFF Overcurrent limiting Fig. 15 Overcurrent timing chart ~ + ~ - Vin Cs 8 REF 7 C1 5V VCC CS 6 VCC 15.5V 0.8/0.68V 0.95mA ENB C2 5V REF 8.5/7.9V UVLO 3.5V 15.5V C5 0.8V C3 4V PWM FB 2 DMAX Output circuit OSC 1 RT Fig. 16 Overvoltage shutdown circuit FA5510/11 OSC UVLO PWM CS pin FB pin Oscillator R O.C.P. 0.24V IS(+) S F.F 3 DT voltage Rs 4 C GND FB pin voltage (0V) Osillator output OUT pin voltage R REF pin voltage Fig. 13 (4V) CS pin voltage Q C4 (9.5V) Comparator C2 reference voltage (8.5V) OUT Output pin circuit Overcurrent limiting circuit (FA5510/11) H L ON OFF Overvoltage detection Shutdown FA5514/15 Fig. 17 OSC UVLO PWM CS pin FB pin Oscillator OUT Output pin circuit R O.C.P. -0.17V Q S F.F C4 IS(-) 3 Rs 4 C GND R Fig. 14 12 Overcurrent limiting circuit (FA5514/15) Overvoltage shutdown timing chart FA551X 6. Undervoltage lockout circuit (U.V.L.O.) The IC incorporates a circuit that prevents the IC from malfunctioning when the supply voltage drops. When the supply voltage is raised from 0V, the IC starts operation with Vcc=16.5V (typ). If the supply voltage drops, the output is shut down when Vcc=9.0V (typ). When the undervoltage lockout circuit operates, the outputs of the OUT and CS pins go low to reset the IC. 7. Output circuit The IC contains a push-pull output stage and can directly drive the MOSFET. The absolute maximum rating of OUT pin peak current is ±1.5A. But when using in actual circuit, the output peak current depends on the characteristics of the MOSFET, resistance between the OUT pin and the MOSFET, supply voltage, temperature and so. When supply voltage is relatively low or temperature is relatively high, the output peak current may not reach the maximum ratings. Note that the output current causes loss of the output stage. The total loss caused by the operating current and the output current should be within the ratings in actual circuit. 13 FA551X ■ Design advice 1. Deciding the startup circuit These ICs, which use CMOS process, consume less current, and therefore can use larger startup resistance than the conventional bipolar type of IC. To decide the startup resistance, the following conditions must be satisfied: (a) The IC is started when the power is turned on. (b) The IC consumption current is supplied during latch mode operation to maintain the latch state. (c) The IC consumption current is supplied during the off state under the on/off function to maintain the off state. DB ~ T1 + C1 AC INPUT ~ R1 VCC D1 C2 6 FA551X MOSFET 5 OUT However, these are the minimum conditions for using the IC. The startup time required for the power supply must also be decided on. Fig. 18 1.1 Connecting the startup resistor before rectification (AC line) When the startup resistor is connected before rectification (AC line) as shown in Figure 18, the voltage applied to the startup resistor forms a half-wave rectified waveform of the AC input voltage. Startup resistor R1 must satisfy the three equations shown below. Select a smaller-side value for R1 in consideration of the temperature characteristics. (a) To supply startup current 30µA at ON threshold voltage 17.5V (max.) of UVLO: 았옽옽 2 ⫻ Vac – 17.5 ...................................................... (5) π R1 ⬍ 0.03 (b) To supply IC consumption current 80µA (max.) (Vcc=10V) in latch mode: 았옽옽 2 ⫻ Vac – 10 ........................................................ (6) π R1 ⬍ 0.08 (c) To supply IC consumption current 200µA (max.) (Vcc=17V) in the off state under the on/off function: 았옽옽 2 ⫻ Vac – 17 ........................................................ (7) π R1 ⬍ 0.2 R1: Startup resistance [kΩ] Vac: Effective value of AC input voltage [V] If neither the latch mode operation nor the on/off functions are used, only the expression in (5) needs to be satisfied. In this method, the supply current to the IC via the start-up resistor is stopped when AC input is shut down. Therefore, after latch mode operation, shutting the AC input down resets the latch mode in a very short period of time. 14 Startup circuit (1) Rs FA551X 1.2 Connecting the startup resistor after rectification (DC line) When the startup resistor is connected after rectification (DC line) as shown in Figure 19, the voltage applied to the startup resistor becomes the peak value of the AC input voltage. Startup resistor R1 must satisfy the three equations shown below. Select a smaller-side value for R1 in consideration of temperature characteristics. DB ~– R1 D1 VCC 았옽옽 2 ⫻ Vac – 17.5 ...................................................... (8) 0.03 C2 6 FA551X MOSFET 5 OUT (b) To supply IC consumption current 80µA (max.) (Vcc =10V) in latch mode: 았옽옽 2 ⫻ Vac – 10 R1 ⬍ 0.08 C1 AC INPUT (a) To supply startup current 30µA at ON threshold voltage 17.5V (max.) of UVLO: R1 ⬍ T1 ~+ Fig. 19 Rs Startup circuit (2) ........................................................ (9) Vcc (c) To supply IC consumption current 200µA (max.) (Vcc = 17V) in the off state under the on/off function: R1 ⬍ 았옽옽 2 ⫻ Vac – 17 ...................................................... (10) 0.2 R1: Startup resistance [kΩ] Vac: Effective value of AC input voltage [V] If neither the latch nor the on/off functions are used, only the expression in (8) needs to be satisfied. In this method, after latch mode operation, smoothing capacitor C1 in the main circuit supplies current to the IC via the startup resistor even if the AC input is shut down. Therefore, some time must elapse before the latch mode is reset. UVLO ON Vcc must not drop to UVLO OFF. UVLO OFF Auxiliary winding voltage Time t Fig. 20 Vcc voltage at startup with a adequate capacitor Vcc 2. Determining the Vcc capacitor value To properly start the power supply, a certain value is required for the capacitor connected to the VCC pin. Figure 20 shows the Vcc voltage at start-up when a proper value is given to the capacitor. When the input power is turned on, the capacitor connected to the VCC pin is charged via the startup resistor and the voltage increases. The IC is then in standby state and almost no current is consumed. (Icc<2µA) Thereafter, Vcc reaches the ON threshold voltage of UVLO and the IC begins operation. When the IC begins operation to make output, the IC operates based on the voltage from the auxiliary winding. When the IC is just starting up, however, it takes time for the voltage from the auxiliary winding to rise enough, and Vcc drops during this period. Determine the Vcc capacitor value so that Vcc will not drop down to the OFF threshold voltage of UVLO during this period. UVLO ON UVLO OFF Time t Fig. 21 Vcc voltage at startup with a inadequate capacitor If the Vcc capacitor value is too small, Vcc will drop to the OFF threshold voltage of UVLO before the auxiliary winding voltage rises enough. If so, Vcc repeatedly goes up and down between the UVLO threshold voltages, and the power supply cannot start up. (Figure 21) 15 FA551X 3. The startup period The start up period from the time the power is on to the time the IC is turn to on is approximately given by: ( tstart-up = –C2 ⫻ R1 ⫻ In 1 – 16.5 V1 ) R1 VCC ................................. (11) Fig. 22 Startup circuit (3) 았옽옽 2 ⫻ Vac ..... (Connecting a startup resistor before rectification) π R1 았옽옽 2 ⫻ Vac ....... (Connecting a startup resistor after rectification) VCC To shorten the start-up period, the capacitor C2 or resistor R1 should be decreased. But in some case, such as when the load current of the power supply is changed rapidly, you may want to prolong the hold time of the Vcc voltage over the off threshold. In this case the capacitor C2 cannot be decreased and the resistor R1 should be decreased. But loss of the resistor R1 increases. In such case, the circuit shown in Fig. 23 is effective to shorten start-up period without increasing the loss of the resistor R1. The capacitor C2 is decreased to shorten the start-up period and, after the IC starts up, Vcc voltage supplied from C3 to prolong the hold time of the Vcc voltage. The start-up period of this circuit also is approximately given by the expression in (11) 4. Setting soft start period and OFF latch delay independently Figure 24 shows a circuit for setting the soft start period and OFF latch delay independently. In this circuit, capacitance CS determines the soft start period, and capacitance CL determines the OFF latch delay. If the overload shutdown or overvoltage shutdown functions raise the CS pin voltage to around 5V, zener diode Zn becomes conductive to charge capacitor CL. The OFF latch delay can be thus prolonged by capacitance CL. 5. Overvoltage protection using the VCC pin These ICs contain an overvoltage protection function detecting the Vcc voltage using internal ZD (See item 5 in “Description of each circuit”). If Vcc voltage exceed 31.8V, the current of 14mA flows through the internal ZD and the overvoltage protection function operates. After this protection function operates, the IC continues to consume the large current if high voltage continues to be applied to the Vcc pin. Mind that total IC loss does not exceed the rating. If the voltage source applied to Vcc pin has relatively high impedance and cannot supply the current of 14mA, overvoltage protection function does not operate. But the internal ZD maintains the Vcc voltage 32V or less and protects the IC. 16 C2 6 FA551X Where: R1: Startup resistor [Ω] C2: Capacitor between VCC and GND pin [F] Vac: Effective value of AC input voltage [V] V1= D1 D1 D2 C2 6 C3 FA551X Fig. 23 Startup circuit (4) CL Zn Cs 5V CS 8 FA551X 4 GND Fig. 24 Independent setting of soft start period and OFF latch deley FA551X 6. Overvoltage protection using CS pin These ICs contain the overvoltage protection function detecting Vcc voltage. However, the threshold voltage is fixed. Adding a circuit to CS pin enables the overvoltage protection detecting desired voltage. 6.1 Detecting on secondary side Figure 25 shows the overvoltage shutdown circuit based on the signal from the secondary side. The optocoupler output transistor is connected between the CS and VCC pins. When the output voltage is put in the overvoltage state, the optocoupler output transistor goes on to raise the CS pin voltage via resistor R2. When the CS pin voltage exceeds the reference voltage (8.5V) of internal comparator, the IC enters the OFF latch mode and shuts the output down. The IC consumes current 45µA (typ) (Vcc=10V) in latch mode. This current must be supplied via startup resistor R1. The overvoltage protection circuit can be reset by lowering the supply voltage Vcc to below 9.0V or forcing the CS pin voltage below 7.9V. In normal operation, the CS pin voltage is clamped by the 4V zener diode with maximum sink current 45µA . Therefore, to raise the CS pin voltage to 8.5V or more, 45µA or a higher current needs to be supplied from the optocoupler. Set the current input to the CS pin to 1mA or less. 6.2 Detecting on primary side (detecting Vcc voltage) To attain overvoltage protection, the CS pin voltage is forcibly raised from outside the IC until it exceeds the reference voltage (8.5V) of the internal comparator C2. When the reference voltage is exceeded, the IC enters latch mode and shuts the output down. Connect a zener diode (ZD) and resistor between the VCC and CS pins as shown in Figure 26. When the Vcc voltage exceeds about ZD voltage +8.5V, the IC enters the OFF latch mode and shuts the output down. If Vcc remains high even after shutdown and current is input to the CS pin, set the current to 1mA or lower. Set the zener voltage of the ZD connected to the CS pin higher than the UVLO ON threshold voltage. Startup is disabled below this voltage. Figure 27 shows another circuit for enabling latch mode shutdown by detecting a desired Vcc voltage using the CS pin. In this circuit, overvoltage shutdown works when the Vcc voltage is about the same as the ZD voltage. For this circuit also, use a ZD voltage higher than the UVLO ON threshold voltage. Set the current flowing into the CS pin to 1mA or lower. 7. Feedback pin circuit Figure 28 gives an example of connection in which a feedback signal is input to the FB pin. If this circuit causes power supply instability, connect R3 and C4 as shown in Figure 28 to decrease the frequency gain. Set R3 between several tens of ohms to several kilohms and C4 between several thousand picofarads to one microfarad. If noise is applied to the FB pin, the output pulses may be lacked or disturbed. In this case, connect a capacitor C5 as shown in Fig. 29 to suppress the noise applied to the FB pin. Set the capacitance of C5 less than 10% of capacitance of C4 and connect C5 as near the IC as possible. ~ + Vin Vout C1 ~ – R1 R2 PC Cs C2 VCC 6 8 CS FA551X 4 GND Fig. 25 Overvoltage shutdown circuit (1) CS VCC Fig. 26 6 Overvoltage shutdown circuit (2) VCC 6 CS Fig. 27 R2 ZD 8 R2 8 ZD Cs Overvoltage shutdown circuit (3) Vout 5 PC1 FA551X OUT Rs 2 FB R3 PC1 Shunt regulator C4 Fig. 28 FB pin circuit (1) 5 FA551X OUT Rs 4 2 FB GND C5 R3 PC1 C4 Fig. 29 FB pin circuit (2) 17 FA551X 8. Simple voltage control on the primary side In a flyback type power supply, the output voltages of the power supply and auxiliary winding voltage are almost proportional to the number of winding turns of the transformer. This characteristic can be used in the circuit shown in Figure 30, where the output voltage can easily be made constant by detecting the auxiliary winding voltage. However, this is an easy output voltage control method, and the output voltage precision and regulation are therefore not as good. To reduce output pulse width completely to 0%, the FB pin voltage must fall below 0.9V and R5 must be set below about 1kΩ from the characteristics of the FB pin voltage and source current. C1 VCC 6 10. Polarities for overcurrent detecting and their characteristics The FA5510/11 uses positive polarity detection for overcurrent limiting (number 3 pin of IS pin) and the FA5514/15 uses negative polarity detection. The characteristics of positive and negative polarity detection are summarized below. Select one in accordance with the circuit used. (See item 4 in “Description of each circuit.”) n2 Vout 7 REF FA551X 2 GND 4 FB Fig. 30 9. Disabling the overload shutdown function As shown in Figure 31, connect a 10kΩ resistor R6 between the FB pin and the ground. The FB pin voltage then does not rise sufficiently high to reach the shutdown threshold voltage when an overload occurs so that IC does not enter OFF latch mode. Use a 5% or better-precision resistor for R6. Even with this connection, the overvoltage shutdown function is available. n1 n3 C2 R5 Simple voltage control circuit FA551X GND FB 2 4 R3 R6 10kΩ Fig. 31 C4 Disabling overload shutdown function DB T1 ~ + C1 AC input ~ – Positive detection (FA5510/11) • Wiring is easy because the ground can be shared by the main circuit and IC peripherals. • It is easy to correct the current detected as overload against the input voltage. R7 R8 FA5510/11 IS(+) 3 Rs Negative detection (FA5514/15) • The MOSFET drive current does not flow to the current detection resistor and therefore it hardly affects overcurrent detection. 11. Correcting overload detection current (FA5510/11 only) If the power supply output is overloaded, the overcurrent limiting function restricts the output power and the overload shutdown function stops the IC. The output current when an overload occurs varies depending on the input voltage; the higher the input voltage, the more the overload detection current may increase. If any problems occur as a result of the appearance of this symptom, connect resistor R8 between current detection resistor Rs and the IS (+) pin and add resistor R7 for correction as shown in Figure 32. The standard resistance of R8 is several hundred ohms, and that of R7 is from several hundred kilohms to several megohms. Note that the above correction slightly lowers the output current when overload even where the input voltage is low. This correction is available only for the FA5510/11 that uses positive polarity for overcurrent detection. 18 Fig. 32 Correction of overload detection current FA551X 12. Preventing malfunction caused by noise Noise applied to each pin may cause malfunction of the IC. If noise causes malfunction, see the notes summarized below and confirm in actual circuit to prevent malfunction. • The IS pin for overcurrent limiting function detects the MOSFET current converted to the voltage. The parasitic capacitor and inductor of the MOSFET, transformer, wiring, etc. cause a noise in switching operation. If this switching noise causes a malfunction of overcurrent limitimg function, insert the RC filter into IS pin as shown in Figure 13 and 14. Connect this capacitor as near the IC as possible to suppress noise effectively. • Connect a noise prevention capacitor (0.1µF or more) to the REF pin that outputs the reference voltage for each component. OUT FA551X GND Fig. 33 5 4 SBD Protection of OUT pin against the negative voltage Rg1 Rg2 FA551X Fig. 34 5 OUT Gate circuit • If noise is applied to the FB pin, the output pulses may be disturbed. In this case, see item 7 in “Design advice.” • Relatively large noise may occur at the VCC pin because large current flows from VCC pin to drive the MOSFET. Then this noise may cause malfunction of the IC. In addition, the IC may stop operation when Vcc voltage drops below the off threshold voltage by noise. Mind that capacitance and characteristics of the capacitor connected between VCC and GND pin not to allow the large noise at the VCC pin. To prevent malfunction, suppress the noise width below about 0.5µs or less and noise voltage below about ±0.6V or less. 13. Preventing malfunction caused by negative voltage applied to a pin When large negative voltage is applied to each IC pin, a parasitic element in the IC may operate and cause malfunction. Be careful not to allow the voltage applied to each pin to drop below –0.3V. Especially for the OUT pin, voltage oscillation caused after the MOSFET turns off may be applied to the OUT pin via the parasitic capacitance of the MOSFET, causing the negative voltage to be applied to the OUT pin. If the voltage falls below –0.3V, add a Schottky diode between the OUT pin and the ground. The forward voltage of the Schottky diode can suppress the voltage applied to the OUT pin. Use the low forward voltage of the Schottky diode. Similarly, be careful not to cause the voltages at other pins to fall below –0.3V. 14. Gate circuit configuration To adjust switching speeds or prevent oscillation at gate terminals, resistors are normally inserted between the power MOSFET gate terminal to be driven and the OUT pin of the IC. You may prefer to decide on the drive current independently, to turn the MOSFET on and off. If so, connect the MOSFET gate terminal to the OUT pin of the IC as shown in Figure 34. In this circuit, Rg1 and Rg2 restrict the current when the MOSFET is turned on, and only Rg1 restricts the current when it is turned off. 19 FA551X 15. Loss calculation IC loss must be confirmed to use the IC within the ratings. Since it is hard to directly measure IC loss, some examples of calculating approximate IC loss are given below. 15.1 Calculation example 1 Suppose the supply voltage is Vcc, IC current consumption is lccop, the total gate charge of the power MOSFET is Qg, and the switching frequency is fSW. Total IC loss Pd can be calculated by: When gate resistance differs between ON and OFF as shown in Figure 36, the loss is given by: Pdr = This expression calculates an approximate value of Pd, which is normally a little larger than the actual loss. Since various conditions such as temperature characteristics apply, thoroughly verify the appropriateness of the calculation under all applicable conditions. Example: When Vcc=18V, lccop=2.5mA (max.) is obtained from the specifications. Suppose Qg=80nC and fsw=100kHz. ) Example: When Vcc=18V, Qg=80nC, fsw=100kHz, and Rg=10Ω, the typical IC loss is given by: Pdr = Pd ⱌ VCC ⫻ (ICCOP + Qg ⫻ fsw) ........................................ (12) ( 1 Ron Roff .... (15) ⫻VCC⫻Qg⫻fsw⫻ + 2 Rg1+Rg2+Ron Rg1+Roff ( 1 15Ω 7Ω ⫻ 18V ⫻ 80nC ⫻ 100kHz ⫻ + 2 10Ω+15Ω 10Ω+7Ω =72.8mW 15.2.3 Total loss The total loss (Pd) of the IC is the sum of the control circuit loss (Pop) and the output circuit loss (Pdr) calculated previously: Pd = Pop + Pdr .................................................................. (16) Example: The standard IC loss under the conditions used in (1) and (2) above are: Pd ⱌ 18V ⫻ (2.5mA + 80nC ⫻ 100kHz) ⱌ 189mW 15.2 Calculation example 2 The IC loss consists of the loss caused by operation of the control circuit and the loss caused at the output circuit to drive the power MOSFET. Pd = Pop + Pdr = 27mW + 72.8mW = 99.8mW 15.2.1 Loss at the control circuit The loss caused by operation of the IC control circuit is calculated by the supply voltage and IC current consumption. When the supply voltage is Vcc and IC current consumption is lccop, loss Pop at the control circuit is: 6 VCC Qon OUT 5 Pop = VCC ⫻ ICCOP ........................................................... (13) Rg Qoff Example: When Vcc=18, lccop=1.9mA (typ) is obtained from the specifications. The typical IC loss is given by: 15.2.2 Loss at the output circuit The output circuit of the IC is a MOSFET push-pull circuit. When the ON resistances of MOSFETs making up the output circuit are Ron and Roff, the resistances can be determined as shown below based on Vcc=18V and Tj = 25˚C obtained from the output characteristics shown in the specifications: 20 ( 6 Output Circuit (1) VCC Qon OUT 5 Qoff Rg1 Rg2 GND When the total gate charge of the power MOSFET is Qg, the switching frequency is fSW, the supply voltage is Vcc, and gate resistance is Rg, the loss caused at the IC output circuit is given by: 1 Ron Roff ⫻V CC ⫻Qg⫻fsw⫻ + 2 Rg + Ron Rg + Roff GND 4 Ron = 15Ω (typ), Roff=7Ω (typ) Pdr = 4 Fig. 35 Pop = 18V ⫻ 1.5mA = 27mW ) ...... (14) ) Fig. 36 Output Circuit (2) FA551X ■ Application circuit FA5510 T1 80 to F1 C114 C103 144V AC 250V/5A 0.47µF 4700p D1 R101 510K R102 510K TH1 8D11 C203 1000pF L2 C201 2200µF C102 D3SBA60 0.22µF R103 100kΩ FG R110 R109 10Ω D4 2.2Ω IC1 PC1 R117 2kΩ 8 7 6 5 1 2 3 4 0.1µF R206 1kΩ C205 1000pF R205 C202 R102 R107 680Ω C107 PC1 R208 1kΩ R112 0.05Ω PC2 D4 ERA91-02 ZD201 27V GND C204 0.022µF R207 2.4kΩ R209 470Ω PC2 R119 33kΩ 47kΩ C207 0.1µF R210 100Ω Q1 2SK1938 R104 100kΩ R105 ESAD92M-02 4.7kΩ C104 4700p +24V 0 to 8.4A L201 150µH D2 ERA22-10 C105 200V/1000µF TH2 8D11 D201 IC2 R201 18kΩ R202 1kΩ C206 0.1µF 10kΩ 0.1µF R203 2.2kΩ C106 47µF C108 2200pF C115 1000pF FA5510 C109 0.22µF C110 0.22µF R106 33Ω FA5511 C113 2200p C101 C103 0.22µF 470p TH1 DB R101 510K R102 430K 5D11 F1 250V/3A C104 470p L1 R110 130kΩ R109 10Ω 100pF 1kΩ GND R207 2.4kΩ R205 33kΩ D4 ERA91-02 IC2 R206 1kΩ C203 0.1µF R201 18kΩ R202 1kΩ R203 2.2kΩ 8 7 6 5 C108 C204 0.022µF R112 0.1Ω R102 IC1 1 2 3 4 R117 R107 680Ω C107 0.1µF C202 470µF PC1 D5 ERA91-02 R108 100Ω 62kΩ C201 2200µF Q1 2SK2101 R104 R105 L201 YG902C D2 ERA22-10 C102 D3SBA60 0.22µF +24V 0 to 1.46A (Peak:2.71A) 10µH ZD1 180V C105 400V/220µF R103 130kΩ FG D201 T1 4.7kΩ 80 to 264V AC C106 10µF FA5511 C109 0.22µF C110 0.22µF R106 24Ω 21 FA551X FA5514 T1 80 to C114 C103 144V AC F1 250V/5A 0.47µF 4700p D1 R101 510K R102 510K TH1 8D11 C203 1000pF C201 2200µF C102 D3SBA60 0.22µF R103 100kΩ FG R109 10Ω C205 1000pF R205 C202 D4 ERA91-02 ZD201 27V IC2 R201 18kΩ R202 1kΩ C206 0.1µF 10kΩ 0.1µF R203 2.2kΩ C106 47µF FA5514 2200pF PC1 R117 C108 820Ω 0.1µF D4 2.2Ω 8 7 6 5 C107 R206 1kΩ R102 IC1 1 2 3 4 C115 1000pF PC1 R208 1kΩ R112 0.05Ω PC2 GND C204 0.022µF R207 2.4kΩ R209 470Ω PC2 R119 33kΩ R107 680Ω C207 0.1µF R210 100Ω Q1 2SK1938 R104 100kΩ R105 47kΩ ESAD92M-02 4.7kΩ L2 R110 C104 4700p +24V 0 to 8.4A L201 150µH D2 ERA22-10 C105 200V/1000µF TH2 8D11 D201 C109 0.22µF C110 0.22µF R106 33Ω FA5515 C113 2200p C101 C103 0.22µF 470p TH1 DB R101 510K R102 430K 5D11 C104 470p L1 C105 400V/220µF R103 130kΩ FG R109 10Ω D5 ERA91-02 130kΩ R107 680Ω 8 7 6 5 C108 100pF R205 33kΩ C109 0.22µF IC2 R206 1kΩ C203 0.1µF R203 2.2kΩ C106 10µF C110 0.22µF R106 24Ω Parts tolerances characteristics are not defined in the circuit design sample shown above. When designing an actual circuit for a product, you must determine parts tolerances and characteristics for GND R207 2.4kΩ D4 ERA91-02 FA5515 safe and economical operation. C204 0.022µF R112 0.05Ω IC1 1 2 3 4 62kΩ C107 0.1µF C202 470µF PC1 R108 100Ω R105 C201 2200µF Q1 2SK2101 R104 22 L201 YG902C D2 ERA22-10 C102 D3SBA60 0.22µF +24V 0 to 1.46A (Peak:2.71A) 10µH ZD1 180V 4.7kΩ F1 250V/3A D201 T1 R110 80 to 264V AC R201 18kΩ R202 1kΩ