Revised February 2001 FSTD3306 2-Bit Low Power Bus Switch with Level Shifting General Description Features The FSTD3306 is a 2-bit ultra high-speed CMOS FET bus switch with enhanced level shifting circuitry and with TTLcompatible active LOW control inputs. The low on resistance of the switch allows inputs to be connected to outputs with minimal propagation delay and without generating additional ground bounce noise. The device is organized as a 2-bit switch with independent bus enable (BE) controls. When BE is LOW, the switch is ON and Port A is connected to Port B. When BE is HIGH, the switch is OPEN and a high-impedance state exists between the two ports. Reduced voltage drive to the gate of the FET switch permits nominal level shifting of 5V to 3V through the switch. Control inputs tolerate voltages up to 5.5V independent of VCC. ■ Typical 3Ω switch resistance at 5.0V VCC , VIN = 0V ■ Level shift facilitates 5V to 3.3V interfacing ■ Minimal propagation delay through the switch ■ Power down high impedance input/output ■ Zero bounce in flow through mode ■ TTL compatible active LOW control inputs ■ Control inputs are overvoltage tolerant Ordering Code: Order Number Package Number FSTD3306MTC MTC08 Package Description 8-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Diagram Connection Diagram (Top View) Pin Descriptions Function Table Pin Name Description Bus Enable Input (BE) Function A Bus A Switch I/O L B Connected to A H Disconnected B Bus B Switch I/O BE Bus Enable Input © 2001 Fairchild Semiconductor Corporation DS500480 H = HIGH Logic Level L = LOW Logic Level www.fairchildsemi.com FSTD3306 2-Bit Low Power Bus Switch with Level Shifting February 2001 FSTD3306 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions (Note 3) Supply Voltage (VCC) −0.5V to +7.0V DC Switch Voltage (VS) −0.5V to +7.0V Supply Operating (VCC) DC Output Voltage (VIN) (Note 2) −0.5V to +7.0V Control Input Voltage (VIN) 0V to 5.5V Switch Input Voltage (VIN) 0V to 5.5V DC Input Diode Current (IIK) VIN < 0V DC Output (IOUT) Sink Current −50 mA Switch Output Voltage (VOUT) 128 mA Operating Temperature (TA) DC VCC or Ground Current 0V to 5.5V −40°C to +85°C Input Rise and Fall Time (tr, tf) ±100 mA (ICC/IGND) Storage Temperature Range (TSTG) 4.5V to 5.5V Control Input −65°C to +150°C 0 ns/V to 5 ns Switch I/O 0 ns/V to DC Thermal Resistance (θJA) Junction Temperature +150°C under Bias (TJ) Junction Lead Temperature (TL) +260°C (Soldering, 10 Seconds) Power Dissipation (PD) @ +85°C 250°C/W Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. 250 mW Note 2: The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Note 3: Unused logic inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol Parameter (V) VIK Clamp Diode Voltage VIH HIGH Level Input Voltage 4.5–5.5 VIL LOW Level Input Voltage 4.5–5.5 VOH HIGH Level Output Voltage 4.5–5.5 IIN Input Leakage Current 5.5 IOFF Power OFF Leakage Current 5.5 RON Switch On Resistance 4.5 (Note 4) ICC ∆ ICC Quiescent Supply Current Increase in ICC per Input (Note 5) TA = −40°C to +85°C VCC Min Typ Max −1.2 4.5 2.0 Units V Conditions IIN = −18 mA V 0.8 3 V V VIN = VCC ±1.0 µA 0 ≤ VIN ≤ 5.5V ±1.0 µA see Figure 3 0 ≤ A, B ≤ VCC VIN = 0V, IIN = 64 mA 7 Ω 4.5 3 7 4.5 15 50 1.1 1.5 mA 10 µA 2.5 mA VIN = 0V, IIN = 30 mA VIN = 2.4V, IIN = 15 mA VIN = VCC or GND, IOUT = 0 5.5 5.5 1 BE1 = BE2 = GND BE1 = BE2 = VCC VIN = 3.4V, IO = 0, one Control Input Only, Other BE = VCC Note 4: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the voltages on the two (A or B) pins. Note 5: Per TTL driven input (VIN = 3.4V, control input only). A and B pins do not contribute to ICC. www.fairchildsemi.com 2 TA = −40°C to +85°C, Symbol Parameter tPHL, Prop Delay Bus to Bus tPLH (Note 6) tPZL, Output Enable Time VCC CL = 50 pF, RU = RD = 500Ω (V) Min Typ 4.5–5.5 4.5–5.5 1.0 Units Conditions Max 0.25 ns VI = OPEN Figures 1, 2 5.8 ns VI = 7V for tPZL Figures 1, 2 3.5 VI = 0V for tPZH tPZH tPLZ, Output Disable Time 4.5–5.5 0.8 Figure Number 3.5 4.8 ns VI = 7V for tPLZ Figures 1, 2 VI = 0V for tPHZ tPHZ Note 6: This parameter is guaranteed. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance). The specified limit is calculated on this basis. Capacitance Symbol CIN Parameter Typ Control Pin Input Capacitance Max 2.5 Units pF Conditions VCC = 0V CI/O (OFF) Port OFF Capacitance 6 pF VCC = 5.0V = BE CI/O (ON) Port ON Capacitance 12 pF VCC = 5.0V, BE = 0V AC Loading and Waveforms Input driven by 50Ω source terminated in 50Ω CL includes load and stray capacitance Input PRR = 1.0 MHz; tW = 500 ns FIGURE 1. AC Test Circuit FIGURE 2. AC Waveforms 3 www.fairchildsemi.com FSTD3306 AC Electrical Characteristics FSTD3306 DC Characteristics FIGURE 3. Typical High Level Output Voltage vs. Supply Voltage www.fairchildsemi.com 4 FSTD3306 2-Bit Low Power Bus Switch with Level Shifting Physical Dimensions inches (millimeters) unless otherwise noted 8-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC08 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 5 www.fairchildsemi.com