HD74LVC534 Octal D-type Flip Flops with 3-state Outputs REJ03D0357–0400Z (Previous ADE-205-071B (Z)) Rev.4.00 Jul. 27, 2004 Description The HD74LVC534 has eight edge trigger D type flip flops with three state outputs in a 20 pin package. Data at the D inputs meeting set up requirements are transferred to the Q outputs on positive going transitions of the clock input. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. Low voltage and high-speed operation is suitable at the battery drive product (note type personal computer) and low power consumption extends the life of a battery for long time operation. Features • • • • • • VCC = 2.0 V to 5.5 V All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) High output current ±24 mA (@VCC = 3.0 V to 5.5 V) Ordering Information Part Name Package Type Package Code Package Abbreviation Taping Abbreviation (Quantity) HD74LVC534FPEL HD74LVC534TELL SOP–20 pin (JEITA) TSSOP–20 pin FP–20DAV TTP–20DAV FP T EL (2,000 pcs/reel) ELL (2,000 pcs/reel) Note: Please consult the sales office for the above package availability. Function Table Inputs G CK D Output Q H L L L X ↑ ↑ L X L H X Z H L Q0 H: L: X: Z: ↑: Q0 : High level Low level Immaterial High impedance Low to high transition Level of Q before the indicated steady input conditions were established. Rev.4.00 Jul. 27, 2004 page 1 of 7 HD74LVC534 Pin Arrangement 20 VCC G 1 1Q 2 19 8Q G Q G Q 1D 3 CK D CK D 18 8D 2D 4 CK D G Q CK D G Q 17 7D G Q G Q CK D CK D CK D G Q CK D G Q 2Q 5 3Q 6 3D 7 4D 8 4Q 9 GND 10 16 7Q 15 6Q 14 6D 13 5D 12 5Q 11 CK (Top view) Absolute Maximum Ratings Item Symbol Ratings Unit Supply voltage Input diode current Input voltage Output diode current VCC IIK VI IOK V mA V mA Output voltage Output current VCC, GND current / pin Storage temperature VO IO ICC or IGND Tstg –0.5 to 6.0 –50 –0.5 to 6.0 –50 50 –0.5 to VCC +0.5 ±50 100 –65 to +150 Conditions VI = –0.5 V VO = –0.5 V VO = VCC+0.5 V V mA mA °C Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Rev.4.00 Jul. 27, 2004 page 2 of 7 HD74LVC534 Recommended Operating Conditions Item Symbol Ratings Unit Conditions Supply voltage VCC 1.5 to 5.5 V Data retention Input / output voltage VI VO Ta IOH Operating temperature Output current IOL Input rise / fall time *1 tr, tf 2.0 to 5.5 0 to 5.5 0 to VCC –40 to 85 –12 –24*2 12 24*2 10 V V °C mA mA At operation G, CK, D Q VCC = 2.7 V VCC = 3.0 V to 5.5 V VCC = 2.7 V VCC = 3.0 V to 5.5 V ns/V Notes: 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. 2. Duty cycle ≤ 50% Electrical Characteristics Ta = –40 to 85°C Item Symbol VCC (V) Min Max Unit Input voltage VIH 2.0 VCC×0.7 — — VCC–0.2 2.2 2.4 2.0 3.8 — — — — — — — — 0.8 VCC×0.3 — — — — — 0.2 0.4 0.55 0.55 ±5.0 ±10 V — — 20 500 µA µA Input current Off state output current IIN IOZ 2.7 to 3.6 4.5 to 5.5 2.7 to 3.6 4.5 to 5.5 2.7 to 5.5 2.7 3.0 3.0 4.5 2.7 to 5.5 2.7 3.0 4.5 0 to 5.5 5.5 Quiescent supply current ICC ∆ICC 5.5 3.0 to 3.6 VIL Output voltage VOH VOL Rev.4.00 Jul. 27, 2004 page 3 of 7 Test Conditions V V IOH = –100 µA IOH = –12 mA IOH = –24 mA V IOL = 100 µA IOL = 12 mA IOL = 24 mA µA µA VIN = 5.5 V or GND VIN = VCC, GND VOUT = VCC or GND VIN = VCC or GND VIN = one input at(VCC–0.6)V, other inputs at VCC or GND HD74LVC534 Switching Characteristics Ta = –40 to 85°C From (Input) To (Output) ns CK Q ns G Q ns G Q Item Symbol VCC (V) Min Typ Max Unit Maximum clock frequency fmax tPLH tPHL Output enable time tZH tZL Output disable time tHZ tLZ Setup time tsu Hold time th Pulse width tw Input capacitance Output capacitance CIN CO 80.0 100.0 125.0 — 1.5 — — 1.5 — — 1.5 — 2.0 2.0 2.0 1.5 1.5 1.5 4.0 4.0 3.0 — — — 150.0 — 7.0 5.5 4.0 7.0 5.5 4.0 5.0 4.5 3.5 — — — — — — — — — 3.0 15.0 — — — 9.5 8.5 7.0 9.5 8.5 7.0 8.5 7.5 6.5 — — — — — — — — — — — MHz Propagation delay time 2.7 3.3±0.3 5.0±0.5 2.7 3.3±0.3 5.0±0.5 2.7 3.3±0.3 5.0±0.5 2.7 3.3±0.3 5.0±0.5 2.7 3.3±0.3 5.0±0.5 2.7 3.3±0.3 5.0±0.5 2.7 3.3±0.3 5.0±0.5 2.7 2.7 ns ns ns pF pF Test Circuit VCC VCC Output G Pulse Generator Zout = 50 Ω Input See Function Table Input CL = 50 pF GND 50 Ω Scope Symbol t PLH / t PHL CK 1. CL includes probe and jig capacitance. Rev.4.00 Jul. 27, 2004 page 4 of 7 *1 See under table 450 Ω t su / t h / t w t ZH/ t HZ t ZL / t LZ Note: OPEN 1D to 8D Pulse Generator Zout = 50 Ω 500 Ω S1 1Q to 8Q S1 Vcc=2.7V, 3.3±0.3V Vcc=5.0±0.5V OPEN OPEN GND GND 6V 2×Vcc HD74LVC534 Waveforms – 1 tr tf VIH 90 % 90 % Input CK Vref Vref 10 % tr 10 % tf 90 % Input D GND VIH 90 % 10 % 10 % GND t PLH t PHL VOH Vref Vref Output Q VOL Waveforms – 2 tf tr VIH 90 % 90 % Vref Vref Input CK 10 % tw tsu Vref 10 % tw GND th VIH Input D Vref Vref GND Rev.4.00 Jul. 27, 2004 page 5 of 7 HD74LVC534 Waveforms – 3 tf Input G tr 90 % Vref 10 % VIH 90 % Vref 10 % t LZ t ZL GND ≈V OH1 Vref Waveform - A t ZH Waveform - B VOL + 0.3 V t HZ VOH – 0.3 V Vref VOL VOH ≈V OL1 TEST VIH Vref VOH1 VOL1 Notes: Vcc=2.7V, 3.3±0.3V Vcc=5.0±0.5V 2.7 V Vcc 1.5 V 3V 50%Vcc GND GND Vcc 1. tr = 2.5 ns, tf = 2.5 ns 2. Input waveform : PRR = 10 MHz, duty cycle 50% 3. Waveform – A shows input conditions such that the output is "L" level when enable by the output control. 4. Waveform – B shows input conditions such that the output is "H" level when enable by the output control. Rev.4.00 Jul. 27, 2004 page 6 of 7 HD74LVC534 Package Dimensions As of January, 2002 Unit: mm 12.6 13 Max 11 1 10 5.5 20 *0.20 ± 0.05 2.20 Max 1.15 0˚ – 8˚ 0.10 ± 0.10 0.80 Max 0.20 7.80 +– 0.30 1.27 *0.40 ± 0.06 0.70 ± 0.20 0.15 0.12 M Package Code JEDEC JEITA Mass (reference value) *Pd plating FP–20DAV — Conforms 0.31 g As of January, 2002 Unit: mm 6.50 6.80 Max 11 1 10 4.40 20 0.65 *0.20 ± 0.05 1.0 0.13 M 6.40 ± 0.20 *Pd plating Rev.4.00 Jul. 27, 2004 page 7 of 7 0.07 +0.03 –0.04 0.10 *0.15 ± 0.05 1.10 Max 0.65 Max 0˚ – 8˚ 0.50 ± 0.10 Package Code JEDEC JEITA Mass (reference value) TTP–20DAV — — 0.07 g Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. 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