INTERSIL HFA1155IB

HFA1155
TM
Data Sheet
June 2000
380MHz, SOT-23, Low Power Current
Feedback Operational Amplifier
The HFA1155 is a low power, high-speed op amp and is the
most recent addition to Intersil’s HFA1XX5 series of low
power op amps and buffers. Intersil's proprietary
complementary bipolar UHF-1 process, coupled with the
current feedback architecture deliver superb bandwidth even
at very high gains (>250MHz at AV = 10). The excellent
video parameters make this amplifier ideal for professional
video applications.
Though specified for ±5V operation, the HFA1155 operates
with single supply voltages as low as 4.5V, and requires only
1.4mA of ICC in 5V applications (see Application Information
section, and Application Note AN9897).
For a lower distortion, higher bandwidth amplifier in a SOT23 package, please refer to the HFA1150 data sheet.
Features
• Low Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.5mA
• Low Distortion (10MHz, HD2). . . . . . . . . . . . . . . . . -53dBc
• -3dB Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . 380MHz
• High Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . 1700V/µs
• Fast Settling Time (0.1%) . . . . . . . . . . . . . . . . . . . . . 30ns
• Excellent Gain Flatness . . . . . . . . . . . ±0.04dB to 50MHz
• High Output Current . . . . . . . . . . . . . . . . . . . . . . . . . 55mA
• Fast Overdrive Recovery . . . . . . . . . . . . . . . . . . . . . <7ns
• Operates with 5V Single Supply (See AN9897)
Applications
• Video Switching and Routing
• IF Signal Processing
TEMP.
RANGE (oC)
PACKAGE
PKG. NO.
• Flash A/D Driver
HFA1155IB
(H1155I)
-40 to 85
8 Ld SOIC
M8.15
• Medical Imaging Systems
HFA1155IB96
(H1155I)
-40 to 85
8 Ld SOIC
Tape and Reel
M8.15
• Related Literature
- AN9420, Current Feedback Theory
- AN9897, Single 5V Supply Operation
HFA1155IH96
(1155)
-40 to 85
5 Ld SOT-23
Tape and Reel
P5.064
HFA11XXEVAL
4863
• Pulse and Video Amplifiers
Ordering Information
PART NUMBER
(BRAND)
File Number
DIP Evaluation Board for High-Speed Op
Amps
OPAMPSOT23EVAL SOT-23 Evaluation Board for High-Speed Op
Amps
Pinouts
HFA1155
(SOIC)
TOP VIEW
1
-IN
2
+IN
V-
OUT 1
8
NC
7
V+
V-
3
6
OUT
+IN 3
4
5
NC
+
1
2
5 V+
+
NC
HFA1155
(SOT23)
TOP VIEW
4 -IN
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000
HFA1155
Absolute Maximum Ratings
TA = 25oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
175
SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . . . . .
225
Moisture Sensitivity (see Technical Brief TB363)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1
SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1
Maximum Junction Temperature (Plastic Package) . . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(Lead Tips Only)
Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V
Output Current (50% Duty Cycle) . . . . . . . . . . . . . . . . . . . . . . 60mA
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7) . . . 600V
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
VSUPPLY = ±5V, AV = +1, RF = 510Ω, RL = 100Ω, Unless Otherwise Specified
Electrical Specifications
PARAMETER
TEST CONDITIONS
(NOTE 2)
TEST
TEMP.
LEVEL
(oC)
HFA1155IB (SOIC) HFA1155IH (SOT-23)
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
2
6
-
2
6
mV
INPUT CHARACTERISTICS
Input Offset Voltage (Note 3)
A
25
-
A
Full
-
-
10
-
-
10
mV
Input Offset Voltage Drift
C
Full
-
10
-
-
10
-
µV/oC
A
25
40
46
-
40
46
-
dB
A
Full
38
-
-
38
-
-
dB
A
25
45
50
-
45
50
-
dB
A
Full
42
-
-
42
-
-
dB
A
25
-
25
40
-
25
40
µA
A
Full
-
-
65
-
-
65
µA
C
Full
-
40
-
-
40
-
nA/oC
∆VCM = ±2V
VIO CMRR
∆VS = ±1.25V
VIO PSRR
Non-Inverting Input Bias Current (Note 3)
+IN = 0V
+IBIAS Drift
∆VCM = ±2V
+IBIAS CMS
Inverting Input Bias Current (Note 3)
-IN = 0V
-IBIAS Drift
∆VCM = ±2V
-IBIAS CMS
∆VS = ±1.25V
A
25
-
20
40
-
20
40
µA/V
A
Full
-
-
50
-
-
50
µA/V
A
25
-
12
50
-
12
50
µA
A
Full
-
-
60
-
-
60
µA
C
Full
-
40
-
-
40
-
nA/oC
A
25
-
1
7
-
1
7
µA/V
A
Full
-
-
10
-
-
10
µA/V
A
25
-
6
15
-
6
15
µA/V
A
Full
-
-
27
-
-
27
µA/V
Non-Inverting Input Resistance
A
25
25
50
-
25
50
-
kΩ
Inverting Input Resistance
C
25
-
40
-
-
40
-
Ω
-IBIAS PSS
Input Capacitance (Either Input)
B
25
-
2
-
-
2
-
pF
Input Common Mode Range
C
Full
±2.5
±3.0
-
±2.5
±3.0
-
V
Input Noise Voltage (Note 3)
100kHz
B
25
-
4.7
-
-
4.7
-
nV/√Hz
+Input Noise Current (Note 3)
100kHz
B
25
-
26
-
-
26
-
pA/√Hz
-Input Noise Current (Note 3)
100kHz
B
25
-
35
-
-
35
-
pA/√Hz
Open Loop Transimpedance Gain (Note 3)
B
25
-
630
-
-
630
-
kΩ
Minimum Stable Gain
A
Full
1
-
-
1
-
-
V/V
TRANSFER CHARACTERISTICS
2
HFA1155
VSUPPLY = ±5V, AV = +1, RF = 510Ω, RL = 100Ω, Unless Otherwise Specified (Continued)
Electrical Specifications
PARAMETER
TEST CONDITIONS
(NOTE 2)
TEST
TEMP.
LEVEL
(oC)
HFA1155IB (SOIC) HFA1155IH (SOT-23)
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
AC CHARACTERISTICS
AV = +2, (Note 4) Unless Otherwise Specified
-3dB Bandwidth
(VOUT = 0.2VP-P, Note 3)
AV = -1
B
25
-
370
-
-
360
-
MHz
AV = +1
B
25
-
370
-
-
365
-
MHz
AV = +2
B
25
-
380
-
-
355
-
MHz
-3dB Bandwidth (VOUT = 2VP-P)
AV = +2
B
25
-
175
-
-
170
-
MHz
Gain Flatness
(VOUT = 0.2VP-P, Note 3)
To 25MHz
B
25
-
±0.03
-
-
±0.06
-
dB
To 50MHz
B
25
-
±0.04
-
-
±0.06
-
dB
To 100MHz
B
25
-
±0.15
-
-
±0.1
-
dB
Full Power Bandwidth
(VOUT = 5VP-P at AV = +2;
VOUT = 4VP-P at AV = +1, Note 3)
AV = +1
B
25
-
50
-
-
45
-
MHz
AV = +2
B
25
-
75
-
-
75
-
MHz
A
25
±3.0
±3.3
-
±3.0
±3.3
-
V
A
Full
±2.5
±3.0
-
±2.5
±3.0
-
V
A
25, 85
±40
±55
-
±40
±55
-
mA
A
-40
±35
±50
-
±35
±50
-
mA
OUTPUT CHARACTERISTICS AV = +2, (Note 4) Unless Otherwise Specified
Output Voltage
AV = -1
RL = 50Ω, AV = -1
Output Current
B
25
-
0.09
-
-
0.09
-
Ω
2nd Harmonic Distortion (Note 3)
10MHz, VOUT = 2VP-P
B
25
-
-53
-
-
-53
-
dBc
20MHz, VOUT = 2VP-P
B
25
-
-47
-
-
-47
-
dBc
3rd Harmonic Distortion (Note 3)
10MHz, VOUT = 2VP-P
B
25
-
-66
-
-
-66
-
dBc
20MHz, VOUT = 2VP-P
B
25
-
-60
-
-
-60
-
dBc
1.1
-
-
1.1
-
ns
DC Closed Loop Output Resistance (Note 3)
TRANSIENT CHARACTERISTICS AV = +2, (Note 4) Unless Otherwise Specified
Rise and Fall Times
VOUT = 0.5VP-P
B
25
-
Overshoot
VOUT = 0.5VP-P
B
25
-
12
-
-
11
-
%
Slew Rate
(VOUT = 5VP-P at AV = +2, -1;
VOUT = 4VP-P at AV = +1)
AV = -1
B
25
-
1700
-
-
1650
-
V/µs
AV = +1
B
25
-
290
-
-
270
-
V/µs
AV = +2
B
25
-
535
-
-
510
-
V/µs
Settling Time (VOUT = 2V to 0V, Note 3)
To 0.1%
B
25
-
30
-
-
38
-
ns
To 0.05%
B
25
-
40
-
-
50
-
ns
To 0.01%
B
25
-
70
-
-
75
-
ns
VIN = ±2V
B
25
-
7
-
-
7
-
ns
Overdrive Recovery Time
VIDEO CHARACTERISTICS
AV = +2, (Note 4) Unless Otherwise Specified
Differential Gain
Differential Phase
NTSC, RL = 150Ω
B
25
-
0.02
-
-
0.02
-
%
NTSC, RL = 75Ω
B
25
-
0.02
-
-
0.02
-
%
NTSC, RL = 150Ω
B
25
-
0.06
-
-
0.06
-
Degrees
NTSC, RL = 75Ω
B
25
-
0.12
-
-
0.12
-
Degrees
Note 5
B
Full
±2.25
-
±5.5
±2.25
-
±5.5
V
A
Full
-
5.5
8
-
5.5
8
mA
POWER SUPPLY CHARACTERISTICS
Power Supply Range
Power Supply Current (Note 3)
NOTES:
2. Test Level: A. Production Tested; B. Typical or Guaranteed Limit Based on Characterization; C. Design Typical for Information Only.
3. See Typical Performance Curves for more information.
4. The feedback resistor value depends on closed loop gain and package type. See the “Optimum Feedback Resistor” table in the Application
Information section for values used for characterization.
5. The minimum supply voltage entry is a typical value.
3
HFA1155
Application Information
Relevant Application Notes
The following Application Notes pertain to the HFA1155:
OPTIMUM FEEDBACK RESISTOR
ACL
RF (Ω)
SOIC/SOT-23
BANDWIDTH (MHz)
SOIC/SOT-23
-1
576/576
370/360
• AN9787-An Intuitive Approach to Understanding
Current Feedback Amplifiers
+1
453, (+RS = 348)/
453, (+RS = 221)
370/365
• AN9420-Current Feedback Amplifier Theory and
Applications
+2
715/604
380/355
+5
402/475
300/300
+10
182/182
230/250
• AN9663-Converting from Voltage Feedback to Current
Feedback Amplifiers
• AN9897-Operating the HFA1155 from 5V Single
Supply
These publications may be obtained from Intersil’s web site
(www.intersil.com) or via our AnswerFax system.
Performance Differences Between Packages
The HFA1155 is a high frequency current feedback amplifier.
As such, it is sensitive to parasitic capacitances which
influence the amplifier’s operation. The different parasitic
capacitances of the SOIC and SOT-23 packages yield
performance differences (notably bandwidth and bandwidth
related parameters) between the two devices - see Electrical
Specification tables for details.
Because of these performance differences, designers
should evaluate and breadboard with the same package
style to be used in production.
Note that some “Typical Performance Curves” have separate
graphs for each package type. Graphs not labeled with a
specific package type are applicable to both packages.
Optimum Feedback Resistor
The enclosed frequency response graphs detail the
performance of the HFA1155 in various gains. Although the
bandwidth dependency on ACL isn’t as severe as that of a
voltage feedback amplifier, there is an appreciable decrease
in bandwidth at higher gains. This decrease can be minimized
by taking advantage of the current feedback amplifier’s unique
relationship between bandwidth and RF. All current feedback
amplifiers require a feedback resistor, even for unity gain
applications, and the RF, in conjunction with the internal
compensation capacitor, sets the dominant pole of the
frequency response. Thus, the amplifier’s bandwidth is
inversely proportional to RF. The HFA1155 is optimized for
RF = 715Ω/604Ω (SOIC/SOT-23), at a gain of +2. Decreasing
RF decreases stability, resulting in excessive peaking and
overshoot (Note: Capacitive feedback causes the same
problems due to the feedback impedance decrease at higher
frequencies). At higher gains the amplifier is more stable, so
RF can be decreased in a trade-off of stability for bandwidth.
The table below lists recommended RF values for various
gains, and the expected bandwidth.
4
5V Single Supply Operation
This amplifier operates at single supply voltages down to
4.5V. The dramatic supply current reduction at this operating
condition (refer also to Figure 25) makes this op amp an
even better choice for low power 5V systems. Refer to
Application Note AN9897 for further information.
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly
terminated transmission line will degrade the amplifier’s
phase margin resulting in frequency response peaking and
possible oscillations. In most cases, the oscillation can be
avoided by placing a resistor (RS) in series with the output
prior to the capacitance.
Figure 1 details starting points for the selection of this
resistor. The points on the curve indicate the RS and CL
combinations for the optimum bandwidth, stability, and
settling time, but experimental fine tuning is recommended.
Picking a point above or to the right of the curve yields an
overdamped response, while points below or left of the curve
indicate areas of underdamped performance.
RS and CL form a low pass network at the output, thus
limiting system bandwidth well below the amplifier bandwidth
of 380MHz/355MHz (SOIC/SOT-23, AV = +2). By decreasing
RS as CLincreases (as illustrated by the curves), the
maximum bandwidth is obtained without sacrificing stability.
In spite of this, bandwidth still decreases as the load
capacitance increases. For example, at AV = +2, RS = 30Ω,
CL = 22pF, the SOIC bandwidth is 290MHz, but the
bandwidth drops to 90MHz at AV = +2, RS = 6Ω,
CL = 390pF.
HFA1155
50
SERIES OUTPUT RESISTANCE (Ω)
AV = +2
To order evaluation boards (part number HFA11XXEVAL or
OPAMPSOT23EVAL), please contact your local sales office.
The schematic and layout of the HFA11XXEVAL and
OPAMPSOT23EVAL boards are shown below.
40
511Ω
511Ω
30
20
50Ω
NC
1
8
2
7
0.1µF
10µF
+5V
50Ω
IN
10
10µF
0
3
6
4
5
50
100
150
200
250
300
350
NC
0.1µF
GND
GND
-5V
0
OUT
400
LOAD CAPACITANCE (pF)
FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs
LOAD CAPACITANCE
FIGURE 2. HFA11XXEVAL SCHEMATIC
HFA11XXEVAL TOP LAYOUT
VH
PC Board Layout
The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The
use of low inductance components such as chip
resistors and chip capacitors is strongly recommended,
while a solid ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
chip (0.1µF) capacitor works well in most cases.
Terminated microstrip signal lines are recommended at the
input and output of the device. Output capacitance, such as
that resulting from an improperly terminated transmission
line, will degrade the frequency response of the amplifier
and may cause oscillations. In most cases, the oscillation
can be avoided by placing a resistor in series with the output.
Care must also be taken to minimize the capacitance to ground
seen by the amplifier’s inverting input. The larger this
capacitance, the worse the gain peaking, resulting in pulse
overshoot and eventual instability. To reduce this capacitance,
remove the ground plane under traces connected to -IN and
keep these traces as short as possible.
Examples of good high frequency layouts are the evaluation
boards shown below.
Evaluation Boards
The performance of the HFA1155IB (SOIC) may be
evaluated using the HFA11XX Evaluation Board and a SOIC
to DIP adaptor like the Aries Electronics Part Number
08-350000-10. The SOT-23 version can be evaluated using
the OPAMPSOT23EVAL board.
Note that the feedback and gain setting resistors on both
boards must be changed to the appropriate values listed in
the “Optimum Feedback Resistor” table.
5
1
+IN
VL
V+
VGND
HFA11XXEVAL BOTTOM LAYOUT
HFA1155
OPAMPSOT23EVAL TOP LAYOUT
OPAMPSOT23EVAL GND LAYOUT
OPAMPSOT23EVAL BOTTOM LAYOUT
49.9Ω
499Ω
OUT
-5V
0.1µF
10µF
0.1µF
+
3
+IN
+5V
0Ω
2
0Ω
10µF
5
1
4
0Ω
499Ω
49.9Ω
GND
FIGURE 3. OPAMPSOT23EVAL SCHEMATIC
Typical Performance Curves
VSUPPLY = ±5V, RF = Value From the “Optimum Feedback Resistor” Table, TA = 25oC,
RL = 100Ω, Unless Otherwise Specified
200
2.0
AV = +1
150
1.5
100
1.0
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (mV)
AV = +1
50
0
-50
-100
-150
0.5
0
-0.5
-1.0
-1.5
-200
-2.0
TIME (5ns/DIV.)
FIGURE 4. SMALL SIGNAL PULSE RESPONSE
6
TIME (5ns/DIV.)
FIGURE 5. LARGE SIGNAL PULSE RESPONSE
HFA1155
Typical Performance Curves
VSUPPLY = ±5V, RF = Value From the “Optimum Feedback Resistor” Table, TA = 25oC,
RL = 100Ω, Unless Otherwise Specified (Continued)
200
2.0
AV = +2
150
1.5
100
1.0
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (mV)
AV = +2
50
0
-50
-100
-150
0.5
0
-0.5
-1.0
-1.5
-200
-2.0
TIME (5ns/DIV.)
TIME (5ns/DIV.)
FIGURE 6. SMALL SIGNAL PULSE RESPONSE
FIGURE 7. LARGE SIGNAL PULSE RESPONSE
200
2.0
AV = +5
SOIC
1.5
100
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (mV)
150
AV = +10
50
0
-50
-100
-150
1.0
0.5
AV = +5
0
AV = +5
-0.5
-1.0
-1.5
AV = +5
-200
-2.0
TIME (5ns/DIV.)
TIME (5ns/DIV.)
FIGURE 9. LARGE SIGNAL PULSE RESPONSE
FIGURE 8. SMALL SIGNAL PULSE RESPONSE
200
2.0
AV = +10
SOT-23
100
50
SOT-23
1.5
AV = +10
AV = +5
0
AV = +10
-50
-100
-150
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (mV)
150
SOIC
AV = +10
1.0
0.5
AV = +5
0
AV = +5
-0.5
-1.0
-1.5
-200
-2.0
TIME (5ns/DIV.)
FIGURE 10. SMALL SIGNAL PULSE RESPONSE
7
TIME (5ns/DIV.)
FIGURE 11. LARGE SIGNAL PULSE RESPONSE
HFA1155
GAIN
0
-3
AV = +2
-6
PHASE
AV = +2
0
90
180
270
360
AV = +1
1
10
100
FREQUENCY (MHz)
VOUT = 200mVP-P , SOIC
3
AV = +5
GAIN
0
-3
AV = +10
-6
PHASE
AV = +5
0
90
180
AV = +10
270
360
1000
1
10
100
FREQUENCY (MHz)
PHASE (DEGREES)
AV = +1
NORMALIZED GAIN (dB)
VOUT = 200mVP-P , SOIC
3
VSUPPLY = ±5V, RF = Value From the “Optimum Feedback Resistor” Table, TA = 25oC,
RL = 100Ω, Unless Otherwise Specified (Continued)
PHASE (DEGREES)
NORMALIZED GAIN (dB)
Typical Performance Curves
1000
FIGURE 13. FREQUENCY RESPONSE
FIGURE 12. FREQUENCY RESPONSE
VOUT = 5VP-P , AV = 2, SOIC
VOUT = 200mVP-P , SOIC
0.4
VOUT = 4VP-P , AV = 1
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
0.3
0.2
AV = +2
0.1
0
-0.1
AV = +1
-0.2
3
0
AV = +2
-3
AV = +1
-6
-9
-0.3
-0.4
10
FREQUENCY (MHz)
1
1000
100
0
-3
AV = +1
-6
PHASE
0
AV = +2
90
180
270
360
AV = +1
1
10
100
FREQUENCY (MHz)
FIGURE 16. FREQUENCY RESPONSE
8
1000
NORMALIZED GAIN (dB)
AV = +2
PHASE (DEGREES)
NORMALIZED GAIN (dB)
VOUT = 200mVP-P , SOT-23
GAIN
1000
FIGURE 15. FULL POWER BANDWIDTH
FIGURE 14. GAIN FLATNESS
3
10
100
FREQUENCY (MHz)
VOUT = 200mVP-P , SOT-23
3
AV = +5
GAIN
0
-3
AV = +10
-6
PHASE
AV = +5
0
90
180
270
AV = +10
1
10
100
FREQUENCY (MHz)
FIGURE 17. FREQUENCY RESPONSE
360
1000
PHASE (DEGREES)
1
HFA1155
Typical Performance Curves
VSUPPLY = ±5V, RF = Value From the “Optimum Feedback Resistor” Table, TA = 25oC,
RL = 100Ω, Unless Otherwise Specified (Continued)
VOUT = 5VP-P , AV = 2, SOT-23
VOUT = 200mVP-P , SOT-23
0.4
AV = +1
VOUT = 4VP-P , AV = 1
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
0.3
0.2
0.1
0
AV = +2
-0.1
AV = +1
-0.2
3
0
AV = +2
-3
-6
AV = +1
-9
-0.3
-0.4
1
10
FREQUENCY (MHz)
1
1000
100
10
100
FREQUENCY (MHz)
1000
FIGURE 19. FULL POWER BANDWIDTH
FIGURE 18. GAIN FLATNESS
630
1000
6.3
180
PHASE
135
90
0.63
45
0
0.01
0.1
1
10
FREQUENCY (MHz)
100
PHASE (DEGREES)
GAIN (kΩ)
63
OUTPUT RESISTANCE (Ω)
GAIN
1
0.3
500
1
10
100
FREQUENCY (MHz)
1000
FIGURE 21. CLOSED LOOP OUTPUT RESISTANCE
AV = +2
VOUT = 2V
SOIC
0.05
0.025
0
-0.025
-0.05
-0.1
AV = +2
VOUT = 2V
0.1
SETTLING ERROR (%)
SETTLING ERROR (%)
10
0.1
FIGURE 20. OPEN LOOP TRANSIMPEDANCE
0.1
100
SOT-23
0.05
0.025
0
-0.025
-0.05
-0.1
10
20
30
40
50
60
70
80
TIME (ns)
FIGURE 22. SETTLING RESPONSE
9
90
100
10
20
30
40
50
60
70
80
TIME (ns)
FIGURE 23. SETTLING RESPONSE
90
100
HFA1155
VSUPPLY = ±5V, RF = Value From the “Optimum Feedback Resistor” Table, TA = 25oC,
RL = 100Ω, Unless Otherwise Specified (Continued)
100
9
90
8
80
7
70
6
60
ENI
5
ENI
4
I NI 3
I NI+
50
40
30
8
7
SUPPLY CURRENT (mA)
10
NOISE CURRENT (pA/√Hz)
NOISE VOLTAGE (nV/√Hz)
Typical Performance Curves
6
5
4
3
2
2
20
1
10
1
0
0
0
100
1K
10K
100K
4
5
6
FREQUENCY (Hz)
8
9
10
11
12
FIGURE 25. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 24. INPUT NOISE vs FREQUENCY
-30
-25
-30
-40
-35
50MHz
DISTORTION (dBc)
DISTORTION (dBc)
7
TOTAL SUPPLY VOLTAGE (V+ - V-, V)
-40
20MHz
-45
-50
10MHz
-55
-50
50MHz
20MHz
-60
-70
10MHz
-80
-60
-65
-90
-6
-3
0
3
6
OUTPUT POWER (dBm)
9
FIGURE 26. 2nd HARMONIC DISTORTION vs POUT
10
12
-6
-3
0
6
3
OUTPUT POWER (dBm)
9
FIGURE 27. 3rd HARMONIC DISTORTION vs POUT
12
HFA1155
Die Characteristics
DIE DIMENSIONS:
PASSIVATION:
53 mils x 25mils
1350µm x 630µm
Type: Nitride
Thickness: 4kÅ ±0.5kÅ
METALLIZATION:
TRANSISTOR COUNT:
Type: Metal 1: AlCu (2%)/TiW
Thickness: Metal 1: 8kÅ ±0.4kÅ
Type: Metal 2: AlCu (2%)
Thickness: Metal 2: 16kÅ ±0.8kÅ
40
SUBSTRATE POTENTIAL (POWERED UP):
Floating (Recommend Connection to V-)
Metallization Mask Layout
HFA1155
V+
OUT
V-
-IN
11
+IN
HFA1155
Small Outline Plastic Packages (SOIC)
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
N
INDEX
AREA
H
0.25(0.010) M
B M
E
INCHES
-B-
1
2
SYMBOL
3
L
SEATING PLANE
-A-
h x 45o
A
D
-C-
e
α
A1
B
0.25(0.010) M
C A M
C
B S
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
12
MAX
MIN
MAX
NOTES
A
0.0532
0.0688
1.35
1.75
-
A1
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075
0.0098
0.19
0.25
-
D
0.1890
0.1968
4.80
5.00
3
E
0.1497
0.1574
3.80
4.00
4
e
0.10(0.004)
MILLIMETERS
MIN
0.050 BSC
1.27 BSC
0.2284
0.2440
h
0.0099
0.0196
0.25
0.50
5
L
0.016
0.050
0.40
1.27
6
8o
0o
N
α
5.80
8
0o
6.20
-
H
8
-
7
8o
Rev. 0 12/93
HFA1155
Small Outline Transistor Plastic Packages (SOT23-5)
P5.064
D
5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
e1
INCHES
L
E
CL
CL
e
E1
b
CL
0.20 (0.008) M
α
C
C
CL
A A2
A1
SEATING
PLANE
MIN
MAX
MIN
MAX
NOTES
A
0.036
0.057
0.90
1.45
-
A1
0.000
0.0059
0.00
0.15
-
A2
0.036
0.051
0.90
1.30
-
b
0.0138
0.0196
0.35
0.50
-
C
0.0036
0.0078
0.09
0.20
-
D
0.111
0.118
2.80
3.00
3
E
0.103
0.118
2.60
3.00
-
E1
0.060
0.068
1.50
1.75
3
e
0.0374 Ref
0.95 Ref
-
e1
0.0748 Ref
1.90 Ref
-
L
0.004
N
-C-
MILLIMETERS
SYMBOL
α
0.023
0.10
5
0o
0.60
4, 5
5
10o
0o
6
10o
Rev. 0 10/98
0.10 (0.004) C
NOTES:
1. Dimensioning and tolerances per ANSI 14.5M-1982.
2. Package conforms to EIAJ SC-74A (1992).
3. Dimensions D and E1 are exclusive of mold flash, protrusions, or
gate burrs.
4. Footlength L measured at reference to seating plane.
5. “L” is the length of flat foot surface for soldering to substrate.
6. “N” is the number of terminal positions.
7. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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13
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