HI-6140 10 MBit/s MIL-STD-1553 3.3V BC / MT / RT January 2013 GENERAL DESCRIPTION FEATURES The HI-6140 is a 10 MBit/sec version of Holt’s HI-6130 integrated BC/MT/RT solution. The part is designed for MIL-STD-1553-derived protocols that use a 10MB/sec data rate, such as Miniature Munitions Stores Interface (MMSI) or EBR-1553. o o The part is available in Industrial -40 C to +85 C, or o o Extended -55 C to +125 C temperature ranges. Optional burn-in is available on the extended temperature range. Refer to the HI-6130 datasheet for full functional description and operation. 100 - D11 99 - D10 98 - D9 97 - TXINHB 96 - TXINHA 95 - AUTOEN 94 - D8 93 - D7 92 - D6 91 - VCC 90 - GND 89 - D5 88 - D4 87 - D3 86 - RTSSF 85 - ACTIVE 84 - READY 83 - HRTA2 82 - HRTA4 81 - HRTA3 80 - ACKIRQ 79 - IRQ 78 - VCC 77 - GND 76 - D2 PIN CONFIGURATION (TOP) VCC - 1 GND - 2 BCTRIG - 3 D12 - 4 D13 - 5 D14 - 6 D15 - 7 RAMEDC - 8 CE - 9 MODE - 10 STR / OE - 11 VCC - 12 MCLK - 13 GND - 14 WAIT / WAIT - 15 R/W / WE - 16 RTA0 - 17 RTA1 - 18 RTA2 - 19 MR - 20 RTA3 - 21 RTA4 - 22 A0 - 23 A1 - 24 A2 - 25 75 - D1 74 - D0 73 - WPOL 72 - BTYPE 71 - BENDI 70 - TEST 69 - LOCK 68 - MTSTOFF 67 - BCENA 66 - DNC* 65 - VCCP 64 - DNC* 63 - DNC* 62 - VCCP 61 - DNC* 60 - GND 59 - DENAA 58 - TXA 57 - DENAB 56 - TXB 55 - BWID 54 - A15 53 - A14 52 - A12 51 - A13 HI-6140PQxF RTENA - 26 A3 - 27 A4 - 28 A5 - 29 RTAP - 30 MISO - 31 MOSI - 32 A6 - 33 A7 - 34 A8 - 35 VCC - 36 GND - 37 TTCLK - 38 MTTCLK - 39 ECS - 40 EECOPY - 41 ESCK - 42 A9 - 43 A10 - 44 A11 - 45 MTRUN - 46 RXB - 47 HRTA1 - 48 RXA - 49 HRTA0 - 50 TOP VIEW • 10 Mbps bit rate complies with MMSI / EBR-1553 and SAE AS5652 10Mbps network protocol • DO-254 certifiable • May be configured as BC, RT or MT • 16-bit parallel host bus interface • 64K bytes on-chip RAM with error detection/ correction option • Logic level signal interface to standard external RS-485 transceivers • Autonomous terminal operation requires minimal host intervention • Fully programmable Bus Controller uses 28 op code instruction set • BC mode operation provides logic signals to simplify external MMSI Logical Hub design • Supports all three AS5652 (MMSI) Bus Controller modes: Spec, Switch and Link modes • Simple Monitor Terminal (SMT) Mode records commands and data separately, with 16-bit or 48-bit time tagging • Independent time-tag counters for all terminals with 32-bit option for Bus Controller and 48-bit option for Monitor Terminal • 64-Word Interrupt Log Buffer queues the most recent 32 interrupts. Hardware-assisted interrupt decoding quickly identifies interrupt sources • Built-in self-test for protocol logic, digital signal paths and internal RAM • Optional self-initialization at reset uses external serial EEPROM o o • Two temperature ranges: -40 C to +85 C, or o o -55 C to +125 C 100-pin PQFP * DNC: Do not connect DS6140 Rev. A HOLT INTEGRATED CIRCUITS www.holtic.com 1 01/13 HI-6140 BLOCK DIAGRAM HI-6140 10MBit / Sec 1553 Terminal (RS-485) with Host Parallel Bus Interface Hub RT Address (MMSI BC only) IRQ ACTIVE *RTMC8 Discrete Signal Outputs INTERNAL CLOCKS Address MCLK TTCLK MTTCLK Memory and Register Access Control Data Control A0 / LB MT Message Processor WAIT or WAIT A15:1 Tx 1553 Words Host Bus Interface MTSTOFF HI-4853 Bus A Manchester Encoder Rx 1553 Words STR or OE Address BENDI BC Message Processor BWID CE R / W or WE RTLOCK RAMEDC BTYPE WPOL RTA4:0 RTAP Configuration Option Logic Static RAM and Registers VCC GND Data READY Control *MTPKRDY HRTA4:0 (only if 0x004D bit 3 = 1) TXA DENAA Bus A Manchester Decoder DI A DE B RXA RO RE RTENA RTSSF ACKIRQ TXB DENAB Bus B Manchester Decoder Words Control HI-4853 Bus B Manchester Encoder DI A DE B RXB RO RE RT Message Processor Control Address Discrete Signal Input Serial Peripheral Interface (SPI) to EEPROM MISO MOSI MTRUN ESCK BCENA BCTRIG ECS MR Data Reset & Initialization Logic Address & Control AUTOEN Data Address D15:0 EECOPY Test Logic * Two signals not available if register 0x004D bit 3 = 1, i.e., device configured for MMSI Bus Controller operation OPTIONAL SERIAL EEPROM (AUTO-CONFIG) Figure 1. HI-6140 Block Diagram HOLT INTEGRATED CIRCUITS 2 RS-485 BUS A TEST MODE RS-485 BUS B HI-6140 PIN DESCRIPTIONS See HI-6130 datasheet for full Pin Descriptions. Table 1. Pins that apply to HI-6140 only Pin TXA RXA TXB RXB DENAA DENAB HRTA4:0 Function Description Output Unipolar Transmit Data output for Bus A. Connect this pin to the Driver Input (DI) pin of external RS-485 Transceiver. When building an AS5652 MMSI Bus Controller, this signal goes to the BC Logical Hub which routes commands to selected hub-RT link(s). Input 50KΩ pull-up Unipolar Receive Data input from Bus A. Connect this pin to the Receiver Output (RO) pin of external RS-485 Transceiver. When building an AS5652 MMSI Bus Controller, this signal comes from the BC Logical Hub which routes RT command responses from selected hub-RT link(s) into the HI-6140 operating in BC mode. Output Unipolar Transmit Data output for Bus B. Connect this pin to the Driver Input (DI) pin of external RS-485 Transceiver. When building an AS5652 MMSI Bus Controller, this signal goes to the BC Logical Hub which routes commands to selected hub-RT link(s). Input 50KΩ pull-up Unipolar Receive Data input from Bus B. Connect this pin to the Receiver Output (RO) pin of external RS-485 Transceiver. When building an AS5652 MMSI Bus Controller, this signal comes from the BC Logical Hub which routes RT command responses from selected hub-RT link(s) into the HI-6140 operating in BC mode. Output Driver Enable output for Bus A. Connect this pin to the driver enable (DE) input pin of external Bus A RS-485 transceiver. When building an AS5652 MMSI Bus Controller, this signal goes to the BC Logical Hub for routing BC Command Words. Output Driver Enable output for Bus B. Connect this pin to the driver enable (DE) input pin of external Bus B RS-485 transceiver. When building an AS5652 MMSI Bus Controller, this signal goes to the BC Logical Hub for routing BC Command Words. Output AS5652 (MMSI) Bus Controller Hub RT Address. The MMSI BC outputs a 5-bit parallel RT address before issuing a new Command Word. The Logical Hub uses the hub RT address for Hub-RT link selection. HRTA outputs only available when register 0x004D bit 3 is logic 1. When selected, the following pins are not available: TEST4, TEST6, RTMC8, MTPKTRDY. Note: The HI-6140 may function as a single remote terminal (RT), whereas HI-613x devices can function as two independent RTs. The pin assignments for dual RT operation in HI-613x (e.g. RT1A4-0, RT2A4-0, RT1AP, RT2AP, etc.) are replaced with pin assignments for a single RT in HI-6140 (e.g. RTA4:0, RTAP, etc.). Descriptions and functionality remain the same. HOLT INTEGRATED CIRCUITS 3 HI-6140 OPERATION Refer to the HI-6130 datasheet for detailed operation and register description. Operational and Protocol Considerations for 10Mbit/sec The HI-6140 is designed for use in MIL-STD-1553B 10Mbps applications, such as Miniature Munitions Stores Interface (MMSI) or EBR-1553. The device produces dual redundant Manchester II bi-phase encoded data for transmission on dual RS-485 busses. External, half-duplex, 20Mbps slew rate controlled RS-485 transceivers (HI-4853) are recommended for connection to the RS-485 busses (see “Figure 1. HI-6140 Block Diagram” on page 2 and “Pin Descriptions” on page 3). Timing differences compared to MIL-STD-1553B (measured mid-parity to mid-sync): • Minimum intermessage Gap = 1μs (vs 4μs for MIL-STD-1553B) • Minimum No Response Timeout = 8μs (vs 12μs for MIL-STD-1553B) • RT response time must begin in range 400ns to 4μs System Architecture SAE AS5652 MMSI network is as a “star” configuration with each remote terminal connected to a central Bus Controller using a dedicated RS-485 cable. A Logical Hub provides the individual RT interfaces, a series of Hub-to-RT links. The Logical Hub routes commands from the BC to the selected RT (or to all RTs, in the case of broadcast commands.) The Hub also routes RT responses from the selected RT back to the BC. To simplify design of a Logical Hub outside a HI-6140-based MMSI BC, the device has two configuration bits which apply only for MMSI Bus Controller service: • When set, register 0x004D bit 3 enables a 5-bit parallel Hub RT Address output. This 5-bit value is updated at least 250ns before a new Command Word is issued by the BC. The Hub uses this value to activate the appropriate Hub-RT link for Command Word transmission. The link remains active for the RT response to the BC. • AS5652 MMSI defines 3 RT addressing modes: Spec mode, Switch mode and Link mode. The unique addressing for MMSI Link mode is enabled when register 0x004D bits 4:3 are both high. In this configuration, the 5-bit Hub RT Address (HRTA) output reflects the Command Word in the HI-6140 BC Instruction List; the Hub uses this value for routing BC command (and RT response) to (and from) the selected Hub-RT link. However the serial command output from the TXA or TXB transmit data output from the HI-6140 will always contain the embedded RT address 0 (00000 at command word bits 15:11. No special addressing consideration is needed for design of an AS5652 MMSI RT based on the HI-6140 device. Protocol Considerations • For 10Mbit/sec MMSI applications, single terminal BC, RT or MT operation is recommended. • In SAE AS5652, transmit mode codes 0,4 and 5 are reserved, not used. Receive mode codes 20-21 are reserved, not used. These mode commands correspond to “Dynamic Bus Control”, and two variants each of “Bus Shutdown” and “Override Bus Shutdown” mode commands. • All RT-RT commands are prohibited in MMSI applications. For multi-drop 10Mbit/sec EBR-1553 applications, the HI-6140 processes conventional RT-RT messages normally. Nonsense RT-RT messages having mode code (one or both command words with subaddress 0 or 31 decimal) gives unpredictable results. Therefore, encoding nonsense mode code RT-RT messages for BC is not recommended. HOLT INTEGRATED CIRCUITS 4 HI-6140 PACKAGE DIMENSIONS 100-PIN PLASTIC QUAD FLAT PACK (PQFP) inches (millimeters) Package Type: 100PQS .0197 BSC (0.50) .630 BSC SQ (16.0) .551 BSC SQ (14.0) .009 ± .002 (.22 ± .05) .024 ± .006 (.60 ± .15) .039 typ (1.0) See Detail A .059 ± .004 (1.50 ± .10) .008 min (0.20) .008 R max (0.20) .055 ± .002 (1.40 ± .05) BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) 0° .003 R min (0.08) HOLT INTEGRATED CIRCUITS 5 Detail A 7° HI-6140 ORDERING INFORMATION HI - 6140 PQ x F PART NUMBER F LEAD FINISH 100% Matte Tin (Pb-free, RoHS compliant) PART NUMBER TEMPERATURE RANGE -40oC to +85oC I o o FLOW BURN IN I No T -55 C to +125 C T No M -55oC to +125oC M Yes PART NUMBER PQ PACKAGE DESCRIPTION 100 PIN PLASTIC QUAD FLAT PACK, PQFP (100PQS) HOLT INTEGRATED CIRCUITS 6 HI-6140 REVISION HISTORY Revision DS6140, Date Description of Change Rev. New 05/02/12 Initial Release. Rev. A 01/03/13 Corrected pin-out. Updated pin names and pin descriptions. HOLT INTEGRATED CIRCUITS 7