ETC ICPL2611

ICPL2611
HIGH CMR, VERY HIGH SPEED
OPTICALLY COUPLED ISOLATOR
LOGIC GATE OUTPUT
APPROVALS
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UL recognised, File No. E91231
DESCRIPTION
The ICPL2611 optocoupler consists of a GaAsP
light emitting diode and a high gain integrated
photo detector to provide 2500Volts RMS electrical
isolation between input and output. An enable
input allows the detector to be strobed. The
output of the detector I.C. is an open collector
Schottky clamped transistor. The ICPL2611 has an
internal shield which provides a common mode
transient immunity specification of 10000V/µs
typical.This unique design provides maximum ac
and dc circuit isolation while achieving TTL
compatibility. The coupled parameters are
guaranteed over the temperature range of -40°C to
+85°C, such that a maximum input signal of 5mA
will provide a minimum output sink current of
13mA(equivalent to fan-out of eight gates)
FEATURES
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High speed - 10MBit/s
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High Common Mode Transient
Immunity 10kV/µs typical
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Logic gate output
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ICPL2611 has improved noise shield
for superior common mode rejection
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Options :10mm lead spread - add G after part no.
Surface mount - add SM after part no.
Tape&reel - add SMT&R after part no.
APPLICATIONS
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Line receiver, data transmission
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Computer-peripheral interface
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Data multiplexing
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Pulse transformer replacement
OPTION SM
OPTION G
7.62
SURFACE MOUNT
1.2
0.6
10.2
9.5
1.4
0.9
0.3
VCC
6.9
6.3
1
8
2
7
6
3
*
4
1.3
5GND
* NOISE SHIELD
9.7
9.1
7.62
4.0
3.6
0.5
3.3
0.5
15°
Max
0.3
1.3
TRUTH TABLE
INPUT ENABLE OUTPUT
H
H
L
L
H
H
H
L
H
L
L
H
A 0.1µF bypass
capacitor must be
connected between
pins 8 and 5 ( See
note 1)
ABSOLUTE MAXIMUM RATINGS
(25°C unless otherwise specified)
Storage Temperature
-55°C to + 125°C
Operating Temperature
-40°C to + 85°C
Lead Soldering Temperature
(1/16 inch (1.6mm) from case for 10 secs) 260°C
INPUT DIODE
Average Forward Current
Reverse Voltage
50mA
5V
DETECTOR
Enable Input Voltage ( VE )
(not to exceed VCC by more than 500mV)
Supply Voltage(VCC )
(1 minute maximum)
Output Current ( IO )
Output Voltage ( VO )
Collector Output Power Dissipation
5.5V
7V
50mA
7V
85mW
10.16
ISOCOM COMPONENTS LTD
Unit 25B, Park View Road West,
Park View Industrial Estate, Brenda Road
Hartlepool, TS25 1YD England Tel: (01429)863609
Fax : (01429) 863581 e-mail [email protected]
http://www.isocom.com
30/7/03
Dimensions in mm
2.54
ISOCOM INC
1024 S. Greenville Ave, Suite 240,
Allen, TX 75002 USA
Tel: (214) 495-0755 Fax: (214) 495-0901
e-mail [email protected]
http://www.isocom.com
DB91019-AAS/A2
ELECTRICAL CHARACTERISTICS ( TA= 0°C to 70°C Unless otherwise noted )
PARAMETER
SYM DEVICE
MIN TYP* MAX UNITS
TEST CONDITION
100
µA
VCC = 5.5V, V O = 5.5V
IF = 250µA, VE = 2V
0.35
0.6
V
VCC = 5.5V, IF = 5mA
VE = 2V
IOL (sinking ) = 13mA
IFT
3
5
mA
VCC = 5.5V, V O = 0.6V
VE = 2V, IOL = 13mA
High Level Supply Current
ICCH
7
10
mA
VCC = 5.5V, IF = 0mA
VE = 0.5V
Low Level Supply Current
ICCL
9
13
mA
VCC = 5.5V, IF = 10mA
VE = 0.5V
High Level Enable Current
IEH
-0.6
-1.6
mA
VCC = 5.5V, V E = 2V
Low Level Enable Current
IEL
-0.8
-1.6
mA
VCC = 5.5V, V E = 0.5V
High Level Enable Voltage
(note 10)
VEH
V
VCC = 5.5V, IF = 10mA
Low Level Enable Voltage
VEL
0.8
V
VCC = 5.5V, IF = 10mA
Input Forward Voltage
VF
1.75
V
IF = 10mA, TA = 25oC
Input Reverse Breakdown Voltage
VBR
V
IR = 10µA, TA = 25oC
Input Capacitance
CIN
60
pF
VF = 0, f = 1MHz
Temperature Coefficient
of Forward Voltage
∆VF
∆TA
-1.4
mV/°C
IF = 10mA
Input-output Isolation Voltage
(note 3)
VISO
VRMS
R.H.equal to or less than
50%, t = 1min, TA=25°C
Input-output Insulation Leakage
Current (note 3)
II-O
µA
R.H.=45%
t = 5s, TA= 25°C
VI-O = 3000V dc
Resistance (Input to Output)
(note 3)
RI-O
1012
Ω
VI-O = 500V dc
Capacitance (Input to Output)
(note 3)
* All typicals at TA= 25°C
CI-O
0.6
pF
f = 1MHz
High Level Output Current
IOH
Low Level Output Voltage
VOL
Input Threshold Current
2
5
2500
1
RECOMMMENDED OPERATING CONDITIONS
PARAMETER
30/7/03
SYMBOL
MIN
MAX UNITS
Input Current, Low Level
IFL
0
250
µA
Input Current, High Level
IFH
6.3*
15
mA
Supply Voltage, Output
VCC
4.5
5.5
V
Enable Voltage, Low Level
VEL
0
0.8
V
Enable Voltage, High Level
VEH
2.0
VCC
V
Fan Out ( TTL Load )
N
Operating Temperature
TA
*6.3mA is a guard banded
value which allows for at least
20% CTR degradation.
Initial input current threshold
value is 5.0mA or less
8
-40
85
°C
DB91019-AAS/A2
SWITCHING SPECIFICATIONS AT TA = 25°C ( VCC = 5V, IF = 7.5mA Unless otherwise noted )
PARAMETER
Propagation Delay Time
to Logic Low at Output
( fig 1 )( note4 )
SYM DEVICE
MIN TYP MAX UNITS TEST CONDITION
t PHL
25
45
75
ns
RL = 350Ω, CL = 15pF
Propagation Delay Time
to Logic High at Output
( fig 1 )( note5 )
t PLH
20
45
75
ns
RL = 350Ω, CL = 15pF
Propagation Delay Time
of Enable from VEH to VEL
( note6 )
t EHL
20
ns
RL = 350Ω, CL = 15pF
VEL = 0V, V EH = 3.5V
Propagation Delay Time
of Enable from VEL to VEH
( note7 )
t ELH
20
ns
RL = 350Ω, CL = 15pF
VEL = 0V, V EH = 3.5V
Common Mode Transient
Immunity at Logic High
Level Output ( fig 2 )( note8 )
CMH
10000
V/µs
IF = 0mA, VCM = 50VPP
RL= 350Ω,VOH= 2Vmin.
Common Mode Transient
Immunity at Logic Low
Level Output ( fig 2 )( note9 )
CML
10000
V/µs
VCM= 50VPP
RL=350Ω,VOL=0.8Vmax.
NOTES:1
Bypassing of the power supply line is required, with a 0.01µF ceramic disc capacitor adjacent to
each isolator. The power supply bus for the isolator(s) should be seperate from the bus for any
active loads. Otherwise a larger value of bypass capacitor (up to 0.1µF) may be needed to supress
regenerative feedback via the power supply.
2
Peaking circuits may produce transient input currents up to 50mA, 50ns maximum pulse width,
provided average current does not exceed 20mA.
3
Device considered a two terminal device; pins 1, 2, 3, and 4 shorted together, and pins 5, 6, 7
and 8 shorted together.
4
The tPHL propagation delay is measured from the 3.75 mA level Low to High transition of the input
current pulse to the 1.5V level on the High to Low transition of the output voltage pulse.
5
The tPLH propagation delay is measured from the 3.75mA level High to Low transition of the input
current pulse to the 1.5V level on the Low to High transition of the output voltage pulse.
6
The tEHL enable input propagation delay is measured from the 1.5V level on the Low to High transition of
the enable input voltage pulse to the 1.5V level on the High to Low of the output voltage pulse.
7
The tELH enable input propagation delay is measured from the 1.5V level on the High to Low transition of
the enable input voltage pulse to the 1.5V level on the Low to High of the output voltage pulse.
8
CMH is the maximum tolerable rate of rise of the common mode voltage to assure that the output
will remain in a high logic state (ie Vout > 2.0V).
9
CML is the maximum tolerable rate of fall of the common mode voltage to assure that the output
will remain in a low logic state (ie Vout < 0.8V)
10
No external pull up is required for a high logic state on the enable input.
FIG.1 SWITCHING TEST CIRCUIT
IF
PULSE
GENERATOR
ZO = 50Ω
tr = 5ns
0
VO
5V
1.5V
tPHL
tPLH
1.5V
VOL
IF
10% Duty Cycle
1/f < 100µs
IF Monitor
100Ω
30/7/03
1
8
2
7
3
6
4
5
5V
RL
VO
CL = 15pF
DB91019-AAS/A2
FIG. 2 TEST CIRCUIT FOR TRANSIENT IMMUNITY AND TYPICAL WAVEFORMS
VCM
0V
IF
10V
10%
90%
10%
tr
90%
VCC
8
2
7
3
6
4
5
A
tf
5V
VO
VO
1
SWITCH AT A: IF = 0mA
VOL
B
VFF
5V
RL
VO
VCM
+
SWITCH AT B: IF = 7.5mA
-
PULSE GEN.
Output Voltage vs.
Forward Input Current
Forward Current vs. Forward
Voltage
9
10
4
TA = 25°C
7
2
1
Output voltage VO (V)
Forward current IF (mA)
VCC = 5V
TA = 25°C
8
0.4
0.2
0.1
0.04
0.02
0.01
1.0
6
5
4
RL = 1kΩ
3
2
1
1.2
1.4
0
1.6
0
1
2
3
4
5
Forward input current IF (mA)
Forward voltage VF (V)
High level output current IOH ( µA )
Low level output voltage VOL (V)
1.0
VCC = 5.5V
VE = 2V
IF = 5mA
0.7
0.6
0.5
IO = 16mA
0.4
IO = 12.8mA
0.3
0.2
IO = 6.4mA
IO = 9.6mA
0.1
0
0
30/7/03
10
20
30
40
50
60
Ambient temperature TA ( °C )
6
High Level Output Current vs.
Ambient Temperature
Low Level Output Voltage vs.
Ambient Temperature
0.8
RL = 350Ω
70
VCC = 5.5V
VO = 5.5V
VE = 2V
IF = 250µA
0.4
0.2
0.1
0.04
0.02
0.01
0.004
0.002
0.001
0
10
20
30
40
50
60
Ambient temperature TA ( °C )
70
DB91019-AAS/A2