IDT IDT71024S20YI

IDT71024
CMOS STATIC RAM
1 MEG (128K x 8-BIT)
Integrated Device Technology, Inc.
FEATURES:
DESCRIPTION:
• 128K x 8 advanced high-speed CMOS static RAM
• Commercial (0° to 70°C), Industrial (-40° to 85°C) and
Military (-55° to 125°C) temperature options
• Equal access and cycle times
— Military: 15/17/20/25ns
— Industrial: 15/20ns
— Commercial: 12/15/17/20ns
• Two Chip Selects plus one Output Enable pin
• Bidirectional inputs and outputs directly TTL-compatible
• Low power consumption via chip deselect
• Available in 300 and 400 mil Plastic SOJ, and LCC packages
• Military product compliant to MIL-STD-883, Class B
The IDT71024 is a 1,048,576-bit high-speed static RAM
organized as 128K x 8. It is fabricated using IDT’s highperformance, high-reliability CMOS technology. This stateof-the-art technology, combined with innovative circuit design
techniques, provides a cost-effective solution for high-speed
memory needs.
The IDT71024 has an output enable pin which operates as
fast as 6ns, with address access times as fast as 12ns
available. All bidirectional inputs and outputs of the IDT71024
are TTL-compatible and operation is from a single 5V supply.
Fully static asynchronous circuitry is used; no clocks or
refreshes are required for operation.
The IDT71024 is packaged in 32-pin 300 mil Plastic SOJ,
32-pin 400 mil Plastic SOJ, and 32-pin 400 x 820 mil LCC
packages.
FUNCTIONAL BLOCK DIAGRAM
A0
•
•
•
ADDRESS
DECODER
•
•
•
1,048,576-BIT
MEMORY ARRAY
A16
I/O0 – I/O7
•
8
I/O CONTROL
8
8
WE
OE
CS1
CONTROL
LOGIC
CS2
2964 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
1996 Integrated Device Technology, Inc.
MAY 1997
DSC-2964/08
1
IDT71024
CMOS STATIC RAM 1MEG (128K x 8-BIT)
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS(1)
PIN CONFIGURATION
Symbol
(2)
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
32
2
31
3
30
4
29
5
28
6 SO32-2 27
7 SO32-3 26
8 L32-2 25
24
9
23
10
22
11
21
12
13
20
14
19
15
18
16
17
VTERM
VCC
A15
CS2
TBIAS
WE
A13
A8
A9
A11
OE
A10
CS1
Rating
Com’l, Ind'l
Mil.
Unit
–0.5 to +7.0
V
–65 to +135
°C
–55 to +125
–65 to +150
°C
Terminal Voltage –0.5 to +7.0
Relative to GND
Temperature
–55 to +125
Under Bias
TSTG
Storage
Temperature
PT
Power
Dissipation
1.25
1.25
W
IOUT
DC Output
Current
50
50
mA
NOTES:
2964 tbl 02
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. VTERM must not exceed VCC + 0.5V.
I/O7
I/O6
I/O5
I/O4
I/O3
2964 drw 02
SOJ/LCC
TOP VIEW
RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE
TRUTH TABLE(1,2)
INPUTS
Grade
Temperature
GND
VCC
Deselected–Standby (ISB)
Commercial
0°C to +70°C
0V
5.0V ± 0.5V
High-Z
Deselected–Standby (ISB1)
Industrial
-40°C to +85°C
0V
5.0V ± 0.5V
X
High-Z
Deselected–Standby (ISB)
Military
-55°C to +125°C
0V
5.0V ± 0.5V
WE
CS1
CS2
OE
I/O
FUNCTION
X
H
X
X
High-Z
X
VHC(3)
X
X
X
X
L
(3)
X
X
VLC
X
High-Z
Deselected–Standby (ISB1)
H
L
H
H
High-Z
Outputs Disabled
H
L
H
L
DATAOUT
Read Data
L
L
H
X
DATAIN
Write Data
NOTES:
1. H = VIH, L = VIL, X = Don't care.
2. VLC = 0.2V, VHC = VCC -0.2V.
3. Other inputs ≥VHC or ≤VLC.
2964 tbl 03
RECOMMENDED DC OPERATING
CONDITIONS
2964 tbl 01
Symbol
Parameter
Min.
Typ.
Max.
Unit
VCC
Supply Voltage
4.5
5.0
5.5
V
GND
Supply Voltage
0
0
0
V
VIH
Input High Voltage
2.2
—
VIL
Input Low Voltage
–0.5(1)
—
Vcc+0.5
0.8
V
V
NOTE:
2964 tbl 04
1. VIL (min.) = –1.5V for pulse width less than 10ns, once per cycle.
DC ELECTRICAL CHARACTERISTICS
VCC = 5.0V ± 10%
IDT71024
Symbol
Parameter
Test Condition
Min.
Max.
Unit
|ILI|
Input Leakage Current
VCC = Max., VIN = GND to VCC
—
5
µA
|ILO|
Output Leakage Current
VCC = Max., CS1 = VIH, CS2 = VIL, VOUT = GND to VCC
—
5
µA
VOL
Output LOW Voltage
IOL = 8mA, VCC = Min.
—
0.4
V
VOH
Output HIGH Voltage
IOH = –4mA, VCC = Min.
2.4
—
V
2964 tbl 05
2
IDT71024
CMOS STATIC RAM 1MEG (128K x 8-BIT)
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS(1)
(VCC = 5.0V ± 10%, VLC = 0.2V, VHC = VCC – 0.2V)
71024S12
Symbol
Parameter
71024S15
71024S17
Com'l. Mil. Com'l. Mil. Com'l.
71024S20
71024S25
Mil. Com'l. Mil.
Com'l. Mil.
Unit
ICC
Dynamic Operating Current, CS2 ≥ VIH and
CS2 ≥ VIH and CS1 ≤ VIL, Outputs Open,
VCC = Max., f = fMAX(2)
160
—
155
180
150
170
140
160
—
145
mA
ISB
Standby Power Supply Current (TTL Level)
CS1 ≥ V IH or CS2 ≤ VIL, Outputs Open,
VCC = Max., f = fMAX(2)
35
—
35
40
35
40
35
40
—
35
mA
ISB1
Full Standby Power Supply Current
(CMOS Level) CS1 ≥ VHC,
or CS2 ≤ VLC Outputs Open,
VCC = Max., f = 0(2), VIN ≤ VLC or VIN ≥ VHC
10
—
10
15
10
15
10
15
—
15
mA
NOTES:
1. All values are maximum guaranteed values.
2. fMAX = 1/tRC (all address inputs are cycling at fMAX); f = 0 means no address input lines are changing.
2964 tbl 06
DC ELECTRICAL CHARACTERISTICS(1)
(VCC = 5.0V ± 10%, VLC = 0.2V, VHC = VCC – 0.2V)
Symbol
Parameter
71024S15
71024S20
Industrial
Industrial
Unit
ICC
Dynamic Operating Current, CS2 ≥ VIH and
CS2 ≥ VIH and CS1 ≤ VIL, Outputs Open,
VCC = Max., f = fMAX(2)
180
160
mA
ISB
Standby Power Supply Current (TTL Level)
CS1 ≥ V IH or CS2 ≤ VIL, Outputs Open,
VCC = Max., f = fMAX(2)
45
45
mA
ISB1
Full Standby Power Supply Current
(CMOS Level) CS1 ≥ VHC,
or CS2 ≤ VLC Outputs Open,
VCC = Max., f = 0(2), VIN ≤ VLC or VIN ≥ VHC
15
15
mA
NOTES:
1. All values are maximum guaranteed values.
2. fMAX = 1/tRC (all address inputs are cycling at fMAX); f = 0 means no address input lines are changing.
2964 tbl 07
CAPACITANCE
(TA = +25°C, f = 1.0MHz, SOJ package)
Symbol
Parameter(1)
CIN
Input Capacitance
CI/O
I/O Capacitance
Conditions
Max.
Unit
VIN = 3dV
7
pF
VOUT = 3dV
8
pF
NOTE:
2964 tbl 08
1. This parameter is guaranteed by device characterization, but is not production tested.
3
IDT71024
CMOS STATIC RAM 1MEG (128K x 8-BIT)
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
AC TEST CONDITIONS
Input Pulse Levels
GND to 3.0V
Input Rise/Fall Times
3ns
Input Timing Reference Levels
1.5V
Output Reference Levels
1.5V
AC Test Load
See Figures 1 and 2
2964 tbl 09
5V
5V
480Ω
480Ω
DATA OUT
30pF
DATA OUT
255Ω
5pF*
2964 drw 03
Figure 1. AC Test Load
255Ω
2964 drw 04
*Including jig and scope capacitance.
Figure 2. AC Test Load
(for tCLZ, tOLZ, tCHZ, tOHZ, tOW, and tWHZ)
4
IDT71024
CMOS STATIC RAM 1MEG (128K x 8-BIT)
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0V ± 10%, All Temperature Ranges)
Symbol
Parameter
71024S12(1)
Min. Max.
71024S15
Min. Max.
71024S17(3) 71024S20 71024S25(2)
Min.
Max. Min. Max. Min. Max.
Unit
Read Cycle
tRC
Read Cycle Time
12
—
15
—
17
—
20
—
25
—
ns
tAA
Address Access Time
—
12
—
15
—
17
—
20
—
25
ns
tACS
Chip Select Access Time
—
12
—
15
—
17
—
20
—
25
ns
(4)
Chip Select to Output in Low-Z
3
—
3
—
3
—
3
—
3
—
ns
(4)
Chip Deselect to Output in High-Z
0
6
0
7
0
8
0
8
0
10
ns
tCLZ
tCHZ
tOE
tOLZ
Output Enable to Output Valid
—
6
—
7
—
8
—
8
—
10
ns
(4)
Output Enable to Output in Low-Z
0
—
0
—
0
—
0
—
0
—
ns
(4)
Output Disable to Output in High-Z
0
5
0
5
0
6
0
7
0
10
ns
tOHZ
tOH
Output Hold from Address Change
4
—
4
—
4
—
4
—
4
—
ns
tPU
(4)
Chip Select to Power-Up Time
0
—
0
—
0
—
0
—
0
—
ns
tPD
(4)
Chip Deselect to Power-Down Time
—
12
—
15
—
17
—
20
—
25
ns
Write Cycle
tWC
Write Cycle Time
12
—
15
—
17
—
20
—
25
—
ns
tAW
Address Valid to End-of-Write
10
—
12
—
13
—
15
—
15
—
ns
tCW
Chip Select to End-of-Write
10
—
12
—
13
—
15
—
15
—
ns
tAS
Address Set-up Time
0
—
0
—
0
—
0
—
0
—
ns
tWP
Write Pulse Width
10
—
12
—
13
—
15
—
15
—
ns
tWR
Write Recovery Time
0
—
0
—
0
—
0
—
0
—
ns
tDW
Data Valid to End-of-Write
7
—
8
—
9
—
9
—
10
—
ns
tDH
Data Hold Time
0
—
0
—
0
—
0
—
0
—
ns
tOW(4)
Output Active from End-of-Write
3
—
3
—
3
—
4
—
4
—
ns
tWHZ(4)
Write Enable to Output in High-Z
0
5
0
5
0
7
0
8
0
9
ns
NOTES:
1. 0°C to +70°C temperature range only.
2. –55°C to +125°C temperature range only.
3. 0°C to +70°C and –55°C to +125°C temperature ranges only.
4. This parameter guaranteed with the AC load (Figure 2) by device characterization, but is not production tested.
2964 tbl 010
5
IDT71024
CMOS STATIC RAM 1MEG (128K x 8-BIT)
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF READ CYCLE NO. 1(1)
t RC
ADDRESS
t AA
OE
t OE
t OLZ
CS1
(5)
CS2
t ACS (3)
t OHZ (5)
t CHZ (5)
t CLZ (5)
HIGH IMPEDANCE
DATA OUT
Vcc
SUPPLY
CURRENT
Icc
DATA OUT VALID
t PD
t PU
Isb
2964 drw 06
TIMING WAVEFORM OF READ CYCLE NO. 2(1, 2, 4)
tRC
ADDRESS
tAA
tOH
DATAOUT
PREVIOUS DATAOUT VALID
tOH
DATAOUT VALID
2964 drw 07
NOTES:
1. WE is HIGH for Read Cycle.
2. Device is continuously selected, CS1 is LOW, CS2 is HIGH.
3. Address must be valid prior to or coincident with the later of CS1 transition LOW and CS2 transition HIGH; otherwise tAA is the limiting parameter.
4. OE is LOW.
5. Transition is measured ±200mV from steady state.
6
IDT71024
CMOS STATIC RAM 1MEG (128K x 8-BIT)
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (WE CONTROLLED TIMING)(1, 2, 5, 7)
tWC
ADDRESS
tAW
tCW
CS1
CS2
tWR
(3)
tWP (7)
tAS
WE
tWHZ
DATAOUT
(6)
tOW
tCHZ (6)
(6)
HIGH IMPEDANCE
(4)
(4)
tDH
tDW
DATAIN
DATAIN VALID
2964 drw 09
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CS1 AND CS2 CONTROLLED TIMING)(1, 2, 5)
tWC
ADDRESS
tAW
CS1
CS2
tAS
tWR
tCW
(3)
WE
tDW
DATAIN
tDH
DATAIN VALID
2964 drw 10
NOTES:
1. WE must be HIGH, CS1 must be HIGH, or CS2 must be LOW during all address transitions.
2. A write occurs during the overlap of a LOW CS1, HIGH CS2, and a LOW WE.
3. tWR is measured from the earlier of either CS1 or WE going HIGH or CS2 going LOW to the end of the write cycle.
4. During this period, I/O pins are in the output state, and input signals must not be applied.
5. If the CS1 LOW transition or the CS2 HIGH transition occurs simultaneously with or after the WE LOW transition, the outputs remain in a high impedance
state. CS1 and CS2 must both be active during the tCW write period.
6. Transition is measured ±200mV from steady state.
7. OE is continuously HIGH. During a WE controlled write cycle with OE LOW, tWP must be greater than or equal to tWHZ + tDW to allow the I/O drivers to
turn off and data to be placed on the bus for the required tDW. If OE is HIGH during a WE controlled write cycle, this requirement does not apply and the
minimum write pulse is the specified tWP.
7
IDT71024
CMOS STATIC RAM 1MEG (128K x 8-BIT)
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT
IDT
71024
S
XX
Device
Type
Power
Speed
71024
S
XX
Device
Type
Power
Speed
X
Package
X
Package
X
Process/
Temperature
Range
Blank
Commercial (0°C to +70°C)
TY
Y
300-mil SOJ (SO32-2)
400-mil SOJ (SO32-3)
12
15
17
20
Speed in nanoseconds
2964 drw 11
X
Process/
Temperature
Range
I
Industrial (–40°C to +85°C)
Y
400-mil SOJ (SO32-3)
15
20
Speed in nanoseconds
2964 drw 12
IDT
71024
S
XX
Device
Type
Power
Speed
X
Package
X
Process/
Temperature
Range
B
Military (–55°C to +125°C)
Compliant to MIL-STD-883, Class B
L
400 x 820 mil LCC package (L32-2)
15
17
20
25
Speed in nanoseconds
2964 drw 13
8