Dual Synchronous Ethernet Line Card PLL FEATURES • HIGHLIGHTS • Dual PLL chip: • Provides clocks for ITU-T G.8261/G.8262 Synchronous Ethernet (SyncE) • Exceeds GR-253-CORE (OC-12) and ITU-T G.813 (STM-4) jitter generation requirements • Provides clocks for Cellular and WLL base-station (GSM and 3G networks) • Provides clocks for 1 Gigabit and 10 Gigabit Ethernet applications • • • • • • • • MAIN FEATURES • • • • • Employs PLL architecture to feature excellent jitter performance and minimize the number of external components Integrates 2 DPLLs; one can be used on the transmit path and the other on the receive path Supports programmable DPLL bandwidth: 18 Hz, 35 Hz, 70 Hz and 560 Hz Provides OUT1~OUT4 output clock frequencies up to 644.53125 MHz • Includes 25MHz, 125 MHz and 156.25 MHz for CMOS outputs • Includes 25.78125MHz, 128.90625 MHz and 161.1328125 MHz for CMOS outputs • Includes 25MHz, 125 MHz, 156.25 MHz, 312.5 MHz and 625 MHz for differential outputs • Includes 25.78125 MHz, 128.90625 MHz, 161.1328125 MHz, 322.265625 MHz and 644.53125 MHz for differential outputs Provides IN1~IN4 input clock frequencies cover from 2 kHz to 155.52MHz MHz Product Brief IDT82V3395 Supports Forced or Automatic operating mode switch controlled by an internal state machine. It supports Free- Run, Locked and Holdover modes Supports manual and automatic selected input clock switch Supports automatic hitless selected input clock switch on clock failure Provides a 2 kHz, 4 kHz, or 8 kHz frame sync input signal, and a 2 kHz or 8 kHz frame sync output signals Provides a 1PPS sync input signal and a 1PPS sync output signal Provides output clocks for BITS, GPS, 3G, GSM, etc. Supports PECL/LVDS and CMOS input/output technologies Supports master clock calibration Supports Telcordia GR-1244-CORE, Telcordia GR-253-CORE, ITU-T G.812, ITU-T G.8262. ITU-T G.813 and ITU-T G.783 Recommendations OTHER FEATURES • • • • I2C and Serial microprocessor interface modes IEEE 1149.1 JTAG Boundary Scan Single 3.3 V operation with 5 V tolerant CMOS I/Os 72-pin QFN package, green package options available APPLICATIONS • • • • • • • • • • • 1 Gigabit Ethernet and 10 Gigabit Ethernet BITS / SSU SMC / SEC (SONET / SDH) DWDM cross-connect and transmission equipment Synchronous Ethernet equipment Central Office Timing Source and Distribution Core and access IP switches / routers Gigabit and Terabit IP switches / routers IP and ATM core switches and access equipment Cellular and WLL base-station node clocks Broadband and multi-service access equipment IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. 1 2012 Integrated Device Technology, Inc. March 5, 2012 DSC-7238/- IDT82V3395 PRODUCT BRIEF DUAL SYNCHRONOUS ETHERNET LINE CARD PLL DESCRIPTION The device provides programmable DPLL bandwidths: 18 Hz, 35 Hz, 70 Hz and 560 Hz. The IDT82V3395 is an integrated, single-chip solution for the Synchronous Equipment Timing applications in SONET / SDH / Synchronous Ethernet equipment, DWDM and Wireless base station. A stable input is required for the master clock in different applications. The master clock is used as a reference clock for all the internal circuits in the device. The device supports several types of input clock sources: recovered clock from Synchronous Ethernet, STM-N or OC-n, PDH network synchronization timing. All the read/write registers are accessed through a microprocessor interface. The device supports I2C and serial microprocessor interface modes. The device consists of 2 DPLL+APLL paths. The two path lock independently from each other. An input clock is automatically or manually selected for both path. Both paths support three primary operating modes: Free-Run, Locked and Holdover. In Free-Run mode, the DPLL refers to the master clock. In Locked mode, the DPLL locks to the selected input clock. In Holdover mode, the DPLL resorts to the frequency data acquired in Locked mode. Whatever the operating mode is, the DPLL gives a stable performance without being affected by operating conditions or silicon process variations. There are 2 high performance APLLs that can be used for low jitter SONET and Ethernet Clocks Description 2 March 5, 2012 IDT82V3395 PRODUCT BRIEF DUAL SYNCHRONOUS ETHERNET LINE CARD PLL FUNCTIONAL BLOCK DIAGRAM Input Selector APLL MUX DPLL1 Input Pre-Divider IN3 IN4 Input Pre-Divider EX_SYNC1 EX_SYNC2 Divider OUT1 OUT2 MUX Divider OUT2 OUT3 MUX Divider OUT3_POS OUT3_NEG OUT4 MUX Divider OUT4_POS OUT4_NEG Auto Divider FRSYNC_8K_1PPS Auto Divider MFRSYNC_2K_1PPS APLL1 Input IN1 IN2 OUT1 MUX Input Pre-Divider Input Pre-Divider Monitors Selection Input Selector APLL MUX DPLL2 APLL2 Microprocessor Interface APLL Output JTAG OSCI Figure 1. Functional Block Diagram Functional Block Diagram 3 March 5, 2012 IDT82V3395 PRODUCT BRIEF DUAL SYNCHRONOUS ETHERNET LINE CARD PLL ORDERING INFORMATION XXXXXXX XX X Process/ Temperature Range Device Type Blank Industrial (-40°C to +85°C) NLG Green Quad Flatpack, No Lead (VFQFP-N, NLG72) 82V3395B WAN PLL REVISION HISTORY March 5, 2012 Initial Version While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial and industrial applications. Any other applications, such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. 4 March 5, 2012 IDT82V3395 PRODUCT BRIEF DUAL SYNCHRONOUS ETHERNET LINE CARD PLL We’ve Got Your Timing Solution 6024 Silver Creek Valley Road San Jose, California 95138 Sales 800-345-7015 (inside USA) +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT Technical Support [email protected] +480-763-2056 DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications described herein at any time and at IDT’s sole discretion. All information in this document, including descriptions of product features and performance, is subject to change without notice. Performance specifications and the operating parameters of the described products are determined in the independent state and are not guaranteed to perform the same way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of IDT’s products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others. This document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties. IDT’s products are not intended for use in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT. Integrated Device Technology, IDT and the IDT logo are registered trademarks of IDT. Other trademarks and service marks used herein, including protected names, logos and designs, are the property of IDT or their respective third party owners. Copyright 2012. All rights reserved. 5 March 5, 2012