IRF IRF6678TRPBF

PD - 97223
RoHs Compliant 
Lead-Free (Qualified up to 260°C Reflow)
l Application Specific MOSFETs
l Ideal for CPU Core DC-DC Converters
l Low Conduction Losses
l High Cdv/dt Immunity
l Low Profile (<0.7mm)
l Dual Sided Cooling Compatible 
l Compatible with existing Surface Mount Techniques 
IRF6678PbF
IRF6678TRPbF
DirectFET™ Power MOSFET ‚
l
l
Typical values (unless otherwise specified)
VDSS
VGS
RDS(on)
RDS(on)
30V max ±20V max 1.7mΩ@ 10V 2.3mΩ@ 4.5V
Qg
Qgd
Qgs2
Qrr
Qoss
Vgs(th)
15nC
4.0nC
46nC
28nC
1.8V
tot
43nC
DirectFET™ ISOMETRIC
MX
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ
SX
ST
MQ
MX
MT
Description
The IRF6678PbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve
the lowest on-state resistance in a package that has the footprint of a SO-8 and only 0.7 mm profile. The DirectFET package is compatible
with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering
techniques. Application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual
sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6678PbF balances industry leading on-state resistance while minimizing gate charge along with ultra low package inductance to
reduce both conduction and switching losses. The reduced losses make this product ideal for high frequency/high efficiency DC-DC converters that power high current loads such as the latest generation of microprocessors. The IRF6678PbF has been optimized for parameters that
are critical in synchronous buck converter’s SyncFET sockets.
Absolute Maximum Ratings
Parameter
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
VGS
ID @ TA = 25°C
ID @ TA = 70°C
ID @ TC = 25°C
IDM
EAS
IAR
g
Pulsed Drain Current
Single Pulse Avalanche Energy
Avalanche Current
g
h
Typical RDS(on) (mΩ)
20
ID = 29A
15
10
T J = 125°C
5
T J = 25°C
0
0
1
2
3
4
5
6
7
8
9
10
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
Notes:
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET Website.
ƒ Surface mounted on 1 in. square Cu board, steady state.
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e
e
f
VGS, Gate-to-Source Voltage (V)
VDS
Max.
Units
30
±20
30
24
150
240
210
24
V
A
mJ
A
6.0
ID= 23A
5.0
VDS= 24V
VDS= 15V
4.0
3.0
2.0
1.0
0.0
0
10
20
30
40
50
60
QG Total Gate Charge (nC)
Fig 2. Typical On-Resistance vs. Gate Voltage
„ TC measured with thermocouple mounted to top (Drain) of part.
… Repetitive rating; pulse width limited by max. junction temperature.
† Starting TJ = 25°C, L = 0.75mH, RG = 25Ω, IAS = 23A.
1
06/15/06
IRF6678PbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
Drain-to-Source Breakdown Voltage
30
–––
–––
∆ΒVDSS/∆TJ
RDS(on)
Breakdown Voltage Temp. Coefficient
–––
24
–––
Static Drain-to-Source On-Resistance
–––
1.7
2.2
–––
2.3
3.0
V
VGS = 0V, ID = 250µA
mV/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 30A i
VGS = 4.5V, ID = 24A i
VGS(th)
Gate Threshold Voltage
1.35
–––
2.25
V
∆VGS(th)/∆TJ
IDSS
Gate Threshold Voltage Coefficient
–––
-6.3
–––
mV/°C
Drain-to-Source Leakage Current
–––
–––
1.0
µA
–––
–––
150
IGSS
Gate-to-Source Forward Leakage
–––
–––
100
Gate-to-Source Reverse Leakage
–––
–––
-100
gfs
Qg
Conditions
Typ. Max. Units
BVDSS
VDS = VGS, ID = 250µA
VDS = 24V, VGS = 0V
VDS = 24V, VGS = 0V, TJ = 125°C
nA
VGS = 20V
VGS = -20V
S
VDS = 15V, ID = 24A
Forward Transconductance
100
–––
–––
Total Gate Charge
–––
43
65
Qgs1
Pre-Vth Gate-to-Source Charge
–––
12
–––
Qgs2
Post-Vth Gate-to-Source Charge
–––
4.0
–––
Qgd
Gate-to-Drain Charge
–––
15
Qgodr
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
–––
12
–––
Qsw
–––
19
–––
Qoss
RG
Output Charge
Gate Resistance
–––
–––
28
1.0
–––
2.2
td(on)
Turn-On Delay Time
–––
21
–––
tr
Rise Time
–––
71
–––
td(off)
Turn-Off Delay Time
–––
27
–––
Clamped Inductive Load
tf
Fall Time
–––
8.1
–––
Ciss
Input Capacitance
–––
5640
–––
See Fig. 16 & 17
VGS = 0V
Coss
Output Capacitance
–––
1260
–––
Crss
Reverse Transfer Capacitance
–––
570
–––
Min.
Typ. Max. Units
VDS = 15V
nC
VGS = 4.5V
ID = 24A
See Fig. 15
nC
VDS = 16V, VGS = 0V
Ω
VDD = 16V, VGS = 4.5Vi
ns
pF
ID = 24A
VDS = 15V
ƒ = 1.0MHz
Diode Characteristics
Parameter
IS
Continuous Source Current
–––
–––
89
–––
–––
240
(Body Diode)
ISM
Pulsed Source Current
Conditions
MOSFET symbol
A
showing the
integral reverse
VSD
Diode Forward Voltage
–––
0.78
1.2
V
p-n junction diode.
TJ = 25°C, IS = 24A, VGS = 0V i
trr
Reverse Recovery Time
–––
43
65
ns
TJ = 25°C, IF = 24A
Qrr
Reverse Recovery Charge
–––
46
69
nC
di/dt = 100A/µs iSee Fig. 18
(Body Diode)g
Notes:
… Repetitive rating; pulse width limited by max. junction temperature.
‡ Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
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IRF6678PbF
Absolute Maximum Ratings
Max.
Units
2.8
1.8
89
270
-40 to + 150
W
Parameter
e
e
f
Power Dissipation
Power Dissipation
Power Dissipation
Peak Soldering Temperature
Operating Junction and
Storage Temperature Range
PD @TA = 25°C
PD @TA = 70°C
PD @TC = 25°C
TP
TJ
TSTG
°C
Thermal Resistance
Parameter
em
km
lm
fm
RθJA
RθJA
RθJA
RθJC
RθJ-PCB
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Case
Junction-to-PCB Mounted
Linear Derating Factor
e
Typ.
Max.
Units
–––
12.5
20
–––
1.0
45
–––
–––
1.4
–––
°C/W
0.022
W/°C
100
Thermal Response ( Z thJA )
D = 0.50
10
0.20
0.10
0.05
1
0.02
0.01
τJ
0.1
R1
R1
τJ
τ1
SINGLE PULSE
( THERMAL RESPONSE )
0.01
R2
R2
R3
R3
τA
τ2
τ1
τ3
τ2
τ3
τ4
τi (sec)
Ri (°C/W)
R4
R4
τ4
Ci= τi/Ri
Ci i/Ri
τA
0.6784
0.00086
17.299
0.57756
17.566
8.94000
9.4701
106
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Notes:
‰ Used double sided cooling , mounting pad.
Š Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.
ƒ Surface mounted on 1 in. square Cu
(still air).
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‹ Rθ is measured at TJ of approximately 90°C.
‰ Mounted to a PCB with
small clip heatsink (still air)
Š Mounted on minimum
footprint full size board with
metalized back and with small
clip heatsink (still air)
3
IRF6678PbF
1000
100
BOTTOM
1000
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
BOTTOM
100
10
2.5V
2.5V
≤60µs PULSE WIDTH
10
0.1
1
10
100
1000
0.1
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
V DS, Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
Fig 5. Typical Output Characteristics
1.5
1000
ID = 29A
VDS = 15V
≤60µs PULSE WIDTH
Typical RDS(on) (Normalized)
ID, Drain-to-Source Current (Α)
≤60µs PULSE WIDTH
Tj = 150°C
Tj = 25°C
1
100
T J = 150°C
T J = 25°C
10
T J = -40°C
1
1.0
V GS = 10V
V GS = 4.5V
0.5
0.1
1
2
3
4
25
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
T J = 25°C
Vgs = 3.0V
Vgs = 3.5V
Vgs = 4.0V
Vgs = 4.5V
Vgs = 5.0V
Vgs = 10V
20
Typical RDS(on) ( mΩ)
C oss = C ds + C gd
10000
Ciss
Coss
1000
20 40 60 80 100 120 140 160
Fig 7. Normalized On-Resistance vs. Temperature
Fig 6. Typical Transfer Characteristics
100000
-60 -40 -20 0
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
C, Capacitance(pF)
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
Crss
15
10
5
0
100
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
4
20
60
100
140
180
220
260
ID, Drain Current (A)
Fig 9. Normalized Typical On-Resistance vs.
Drain Current and Gate Voltage
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IRF6678PbF
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
100
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100µsec
100
10
T J = 150°C
T J = 25°C
T J = 40°C
1
1msec
10
10msec
1
T A = 25°C
T J = 150°C
VGS = 0V
Single Pulse
0
0.1
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
0.01
VSD, Source-to-Drain Voltage (V)
1.00
10.00
100.00
VDS, Drain-to-Source Voltage (V)
Fig11. Maximum Safe Operating Area
Fig 10. Typical Source-Drain Diode Forward Voltage
2.2
180
Limited By Package
VGS(th) Gate threshold Voltage (V)
160
140
ID, Drain Current (A)
0.10
120
100
80
60
40
20
2.0
1.8
1.6
ID = 250µA
1.4
1.2
1.0
0.8
0.6
0
25
50
75
100
125
-75 -50 -25
150
0
25
50
75 100 125 150
T J , Temperature ( °C )
T C , Case Temperature (°C)
Fig 13. Threshold Voltage vs. Temperature
Fig 12. Maximum Drain Current vs. Case Temperature
EAS , Single Pulse Avalanche Energy (mJ)
900
ID
8.7A
11A
BOTTOM 23A
800
TOP
700
600
500
400
300
200
100
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 14. Maximum Avalanche Energy vs. Drain Current
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5
IRF6678PbF
Current Regulator
Same Type as D.U.T.
Id
Vds
50KΩ
Vgs
.2µF
12V
.3µF
+
V
- DS
D.U.T.
Vgs(th)
VGS
3mA
IG
ID
Qgs1 Qgs2
Qgd
Qgodr
Current Sampling Resistors
Fig 15a. Gate Charge Test Circuit
Fig 15b. Gate Charge Waveform
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
V
RGSG
+
V
- DD
IAS
20V
tp
A
I AS
0.01Ω
Fig 16b. Unclamped Inductive Waveforms
Fig 16a. Unclamped Inductive Test Circuit
LD
VDS
VDS
90%
+
VDD D.U.T
VGS
Pulse Width < 1µs
Duty Factor < 0.1%
Fig 17a. Switching Time Test Circuit
6
10%
VGS
td(on)
tr
td(off)
tf
Fig 17b. Switching Time Waveforms
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IRF6678PbF
D.U.T
Driver Gate Drive
+
ƒ
+
‚
-
„
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt

RG
•
•
•
•
di/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D=
Period
P.W.
Re-Applied
Voltage
+
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
-
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 18. Diode Reverse Recovery Test Circuit for N-Channel
HEXFET® Power MOSFETs
DirectFET™ Substrate and PCB Layout, MX Outline ƒ
(Medium Size Can, X-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
G = GATE
D = DRAIN
S = SOURCE
D
D
S
G
S
D
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D
7
IRF6678PbF
DirectFET™ Outline Dimension, MX Outline
(Medium Size Can, X-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
DIMENSIONS
METRIC
CODE
A
B
C
D
E
F
G
H
J
K
L
M
R
P
MIN
6.25
4.80
3.85
0.35
0.68
0.68
1.38
0.80
0.38
0.88
2.28
0.616
0.020
0.08
MAX
6.35
5.05
3.95
0.45
0.72
0.72
1.42
0.84
0.42
1.01
2.41
0.676
0.080
0.17
IMPERIAL
MIN
0.246
0.189
0.152
0.014
0.027
0.027
0.054
0.032
0.015
0.035
0.090
0.0235
0.0008
0.003
MAX
0.250
0.201
0.156
0.018
0.028
0.028
0.056
0.033
0.017
0.039
0.095
0.0274
0.0031
0.007
DirectFET™ Part Marking
8
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IRF6678PbF
DirectFET™ Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF6678TRPBF). For 1000 parts on 7"
reel, order IRF6678TR1PBF
STANDARD OPTION
METRIC
CODE
MIN
MAX
A
330.0
N.C
B
20.2
N.C
C
12.8
13.2
D
1.5
N.C
E
100.0
N.C
F
N.C
18.4
G
12.4
14.4
H
11.9
15.4
REEL DIMENSIONS
(QTY 4800)
TR1 OPTION (QTY 1000)
IMPERIAL
IMPERIAL
METRIC
MIN
MAX
MIN
MAX
MIN
MAX
6.9
N.C
12.992
N.C
177.77 N.C
0.75
0.795
N.C
N.C
19.06
N.C
0.53
0.504
0.50
13.5
0.520
12.8
0.059
0.059
N.C
1.5
N.C
N.C
2.31
3.937
N.C
58.72
N.C
N.C
N.C
N.C
0.53
N.C
0.724
13.50
0.47
0.488
11.9
N.C
0.567
12.01
0.47
0.469
11.9
N.C
0.606
12.01
LOADED TAPE FEED DIRECTION
CODE
A
B
C
D
E
F
G
H
DIMENSIONS
METRIC
IMPERIAL
MIN
MAX
MIN
MAX
0.311
0.319
7.90
8.10
0.154
0.161
3.90
4.10
0.469
0.484
11.90
12.30
0.215
0.219
5.45
5.55
0.201
0.209
5.10
5.30
0.256
0.264
6.50
6.70
0.059
N.C
1.50
N.C
0.059
0.063
1.50
1.60
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 06/06
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9
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/