IRF IRF6623

PD - 95824B
IRF6623
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HEXFET® Power MOSFET
Application Specific MOSFETs
Ideal for CPU Core DC-DC Converters
Low Conduction Losses
Low Switching Losses
Low Profile (<0.7 mm)
Dual Sided Cooling Compatible
Compatible with Existing Surface Mount Techniques
VDSS
RDS(on) max
Qg(typ.)
20V
5.7mΩ@VGS = 10V
9.7mΩ@VGS = 4.5V
11nC
DirectFET™ ISOMETRIC
ST
Applicable DirectFET Outline and Substrate Outline (see p.8,9 for details)
SQ
SX
ST
MQ
MX
MT
Description
The IRF6623 combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to
achieve the lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The
DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and
vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power
systems, IMPROVING previous best thermal resistance by 80%.
The IRF6623 balances both low resistance and low charge along with ultra low package inductance to reduce both conduction
and switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the
latest generation of processors operating at higher frequencies. The IRF6623 has been optimized for parameters that are
critical in synchronous buck operating from 12 volt buss converters including Rds(on) and gate charge to minimize losses in
the control FET socket.
Absolute Maximum Ratings
Parameter
VDS
VGS
ID @ TC = 25°C
ID @ TA = 25°C
ID @ TA = 70°C
IDM
PD @TA = 25°C
PD @TA = 70°C
PD @TC = 25°C
EAS
IAR
TJ
TSTG
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
c
Pulsed Drain Current
Power Dissipation
Power Dissipation
Power Dissipation
Single Pulse Avalanche Energy
Avalanche Current
Linear Derating Factor
Operating Junction and
Storage Temperature Range
g
g
c
d
Max.
Units
20
±20
55
16
13
120
2.1
1.4
42
43
12
0.017
-40 to + 150
V
A
W
mJ
A
W/°C
°C
Thermal Resistance
Parameter
RθJA
RθJA
RθJA
RθJC
RθJ-PCB
fj
gj
hj
ij
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Case
Junction-to-PCB Mounted
Typ.
Max.
Units
–––
12.5
20
–––
1.0
58
–––
–––
3.0
–––
°C/W
Notes  through ˆ are on page 2
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1
4/1/04
IRF6623
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
Typ. Max. Units
BVDSS
Drain-to-Source Breakdown Voltage
20
–––
–––
∆ΒVDSS/∆TJ
Breakdown Voltage Temp. Coefficient
–––
15
–––
RDS(on)
Static Drain-to-Source On-Resistance
–––
4.4
5.7
–––
7.5
9.7
VGS(th)
Gate Threshold Voltage
1.55
–––
2.45
V
∆VGS(th)/∆TJ
Gate Threshold Voltage Coefficient
–––
-5.4
–––
mV/°C
IDSS
Drain-to-Source Leakage Current
–––
–––
1.0
µA
–––
–––
150
IGSS
Gate-to-Source Forward Leakage
–––
–––
100
Gate-to-Source Reverse Leakage
–––
–––
-100
V
Conditions
VGS = 0V, ID = 250µA
mV/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 15A e
VGS = 4.5V, ID = 12A e
VDS = VGS, ID = 250µA
VDS = 16V, VGS = 0V
VDS = 16V, VGS = 0V, TJ = 125°C
nA
VGS = 20V
VGS = -20V
gfs
Forward Transconductance
34
–––
–––
Qg
Total Gate Charge
–––
11
17
Qgs1
Pre-Vth Gate-to-Source Charge
–––
3.3
–––
Qgs2
Post-Vth Gate-to-Source Charge
–––
1.2
–––
Qgd
Gate-to-Drain Charge
–––
4.0
–––
ID = 12A
Qgodr
See Fig. 17
Gate Charge Overdrive
–––
2.5
–––
Qsw
Switch Charge (Qgs2 + Qgd)
–––
5.2
–––
–––
8.9
–––
S
VDS = 10V, ID = 12A
VDS = 10V
nC
VGS = 4.5V
Qoss
Output Charge
td(on)
Turn-On Delay Time
–––
9.7
–––
VDD = 16V, VGS = 4.5Ve
tr
Rise Time
–––
40
–––
ID = 12A
td(off)
Turn-Off Delay Time
–––
12
–––
tf
Fall Time
–––
4.5
–––
Ciss
Input Capacitance
–––
1360
–––
Coss
Output Capacitance
–––
630
–––
Crss
Reverse Transfer Capacitance
–––
240
–––
Min.
Typ. Max. Units
–––
–––
nC
ns
VDS = 10V, VGS = 0V
Clamped Inductive Load
VGS = 0V
pF
VDS = 10V
ƒ = 1.0MHz
Diode Characteristics
Parameter
IS
Continuous Source Current
ISM
(Body Diode)
Pulsed Source Current
2.6
MOSFET symbol
A
–––
–––
Conditions
D
120
showing the
integral reverse
1.0
p-n junction diode.
TJ = 25°C, IS = 12A, VGS = 0V e
G
S
(Body Diode)c
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
–––
20
30
ns
TJ = 25°C, IF = 12A
Qrr
Reverse Recovery Charge
–––
12
18
nC
di/dt = 100A/µs e
–––
0.81
V
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature.
‚ Starting TJ = 25°C, L = 0.61mH,
RG = 25Ω, IAS = 12A.
ƒ Pulse width ≤ 400µs; duty cycle ≤ 2%.
„ Surface mounted on 1 in. square Cu board.
2
… Used double sided cooling, mounting pad.
† Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.
‡ TC measured with thermal couple mounted to top (Drain) of
part.
ˆ Rθ is measured at TJ of approximately 90°C.
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IRF6623
1000
1000
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
10
1
2.5V
≤ 60µs PULSE WIDTH
Tj = 25°C
100
BOTTOM
10
2.5V
≤ 60µs PULSE WIDTH
Tj = 150°C
0.1
1
0.1
1
10
100
0.1
VDS, Drain-to-Source Voltage (V)
10
100
Fig 2. Typical Output Characteristics
1000.0
1.5
100.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (Α)
1
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
T J = 150°C
10.0
T J = 25°C
1.0
VDS = 10V
≤ 60µs PULSE WIDTH
0.1
2.5
3.0
3.5
4.0
4.5
ID = 15A
VGS = 10V
1.0
0.5
5.0
-60 -40 -20
VGS, Gate-to-Source Voltage (V)
10000
0
20
40
60
80 100 120 140 160
T J , Junction Temperature (°C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance vs. Temperature
12
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
VGS, Gate-to-Source Voltage (V)
ID= 11A
C oss = C ds + C gd
C, Capacitance (pF)
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
Ciss
1000
Coss
Crss
VDS= 20V
VDS= 10V
10
8
6
4
2
0
100
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs.Drain-to-Source Voltage
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0
10
20
30
QG Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage
3
IRF6623
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000.0
100.0
T J = 150°C
10.0
T J = 25°C
1.0
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
10
1
100µsec
Tc = 25°C
Tj = 150°C
Single Pulse
VGS = 0V
1msec
10msec
0.1
0.1
0.2
0.4
0.6
0.8
1.0
0
1.2
1
10
100
VSD, Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
2.5
VGS(th) Gate threshold Voltage (V)
60
ID , Drain Current (A)
50
40
30
20
10
2.0
ID = 250µA
1.5
0
1.0
25
50
75
100
125
150
-75
-50
-25
T J , Junction Temperature (°C)
0
25
50
75
100
125
150
T J , Temperature ( °C )
Fig 10. Threshold Voltage vs. Temperature
Fig 9. Maximum Drain Current vs. Case Temperature
100
Thermal Response ( Z thJA )
D = 0.50
0.20
10
0.10
0.05
0.02
0.01
1
τJ
0.1
R1
R1
τJ
τ1
τ1
R2
R2
τ2
R3
R3
τC
τ
τ3
τ2
τ3
τ4
τ4
Ci= τi/Ri
Ci i/Ri
0.01
Ri (°C/W)
R4
R4
τi (sec)
2.023
0.000678
19.48
0.240237
21.78
2.0167
14.71
58
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
4
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200
20
EAS, Single Pulse Avalanche Energy (mJ)
RDS(on), Drain-to -Source On Resistance ( mΩ)
IRF6623
ID = 15A
16
12
T J = 125°C
8
T J = 25°C
4
2.0
4.0
6.0
8.0
ID
5.2A
7.9A
BOTTOM 12A
TOP
160
120
80
40
0
10.0
25
50
VGS, Gate-to-Source Voltage (V)
75
100
125
150
Starting T J, Junction Temperature (°C)
Fig 12. On-Resistance Vs. Gate Voltage
Fig 13c. Maximum Avalanche Energy Vs. Drain Current
15V
LD
VDS
DRIVER
L
VDS
+
VDD -
D.U.T
RG
+
V
- DD
IAS
VGS
20V
tp
D.U.T
A
VGS
0.01Ω
Pulse Width < 1µs
Duty Factor < 0.1%
Fig 13a. Unclamped Inductive Test Circuit
V(BR)DSS
Fig 14a. Switching Time Test Circuit
VDS
tp
90%
10%
VGS
td(on)
I AS
Fig 13b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
tr
td(off)
Fig 14b. Switching Time Waveforms
Id
Vds
50KΩ
12V
tf
Vgs
.2µF
.3µF
D.U.T.
+
V
- DS
VGS
Vgs(th)
3mA
IG
ID
Current Sampling Resistors
Qgs1 Qgs2
Fig 15. Gate Charge Test Circuit
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Qgd
Qgodr
Fig 16. Gate Charge Waveform
5
IRF6623
D.U.T
Driver Gate Drive
+
ƒ
+
„
-
-
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
di/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
P.W.
Period
*

•
•
•
•
D=
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
‚
RG
Period
P.W.
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
-
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 17. Diode Reverse Recovery Test Circuit for N-Channel
HEXFET® Power MOSFETs
DirectFET™ Substrate and PCB Layout, ST Outline
(Small Size Can, T-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
1- Drain
2- Drain
3- Source
4- Source
5- Gate
6- Drain
7- Drain
6
5
7
6
3
4
1
2
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IRF6623
DirectFET™ Outline Dimension, ST Outline
(Small Size Can, T-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
DIMENSIONS
Note: Controlling
dimensions are in mm
METRIC
MAX
CODE MIN
4.85
A
4.75
3.95
B
3.70
2.85
C
2.75
0.45
D
0.35
0.62
E
0.58
0.62
F
0.58
0.79
G
0.75
0.57
H
0.53
0.30
J
0.26
K
O.88 0.98
2.28
L
2.18
0.70
M
0.59
0.08
N
0.03
0.17
P
0.08
IMPERIAL
MIN
0.187
0.146
0.108
0.014
0.023
0.023
0.030
0.021
0.010
0.035
0.086
0.023
0.001
0.003
MAX
0.191
0.156
0.112
0.018
0.024
0.024
0.031
0.022
0.012
0.039
0.090
0.028
0.003
0.007
DirectFET™ Part Marking
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7
IRF6623
DirectFET™ Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF6618). For 1000 parts on 7" reel,
order IRF6618TR1
REEL DIMENSIONS
STANDARD OPTION (QTY 4800)
TR1 OPTION
IMPERIAL
METRIC
METRIC
MIN
CODE
MAX
MAX
MAX
MIN
MIN
A
12.992
N.C
330.0
177.77 N.C
N.C
B
0.795
20.2
19.06
N.C
N.C
N.C
C
0.504
12.8
13.5
0.520
13.2
12.8
D
0.059
1.5
1.5
N.C
N.C
N.C
E
3.937
100.0
58.72
N.C
N.C
N.C
F
N.C
N.C
N.C
0.724
18.4
13.50
G
0.488
12.4
11.9
0.567
14.4
12.01
H
0.469
11.9
11.9
0.606
15.4
12.01
(QTY 1000)
IMPERIAL
MAX
MIN
N.C
6.9
0.75
N.C
0.53
0.50
0.059
N.C
2.31
N.C
N.C
0.53
0.47
N.C
0.47
N.C
Loaded Tape Feed Direction
NOTE: CONTROLLING
DIMENSIONS IN MM
DIMENSIONS
METRIC
CODE
A
B
C
D
E
F
G
H
IMPERIAL
MIN
7.90
3.90
11.90
5.45
5.10
6.50
1.50
1.50
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.4/04
8
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