IRF IRFIZ48

PD 9.1407
IRFIZ48N
PRELIMINARY
HEXFET® Power MOSFET
l
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Advanced Process Technology
Isolated Package
High Voltage Isolation = 2.5KVRMS
Sink to Lead Creepage Dist. = 4.8mm
Fully Avalanche Rated
D
…
VDSS = 55V
RDS(on) = 0.016Ω
G
ID = 36A
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve extremely
low on-resistance per silicon area. This benefit, combined
with the fast switching speed and ruggedized device
design that HEXFET Power MOSFETs are well known for,
provides the designer with an extremely efficient and
reliable device for use in a wide variety of applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial applications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
and external heatsink. This isolation is equivalent to using
a 100 micron mica barrier with standard TO-220 product.
The Fullpak is mounted to a heatsink using a single clip or
by a single screw fixing.
TO-220 FULLPAK
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current †
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy‚†
Avalanche Current†
Repetitive Avalanche Energy
Peak Diode Recovery dv/dtĠ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
Max.
Units
36
25
210
42
0.28
± 20
270
32
4.2
5.6
-55 to + 175
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient
Typ.
Max.
Units
–––
–––
3.6
65
°C/W
IRFIZ48N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
V(BR)DSS
∆V(BR)DSS/∆TJ
Qg
Q gs
Q gd
t d(on)
tr
t d(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
LD
Internal Drain Inductance
LS
Internal Source Inductance
Ciss
Coss
Crss
C
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Drain to Sink Capacitance
I GSS
Min. Typ. Max. Units
Conditions
55
––– –––
V
VGS = 0V, ID = 250µA
––– 0.052 ––– V/°C Reference to 25°C, ID = 1mA†
–––
––– 0.016
Ω
VGS = 10V, ID = 22A „
2.0
––– 4.0
V
VDS = VGS , ID = 250µA
22
––– –––
S
VDS = 25V, I D = 32A †
––– –––
25
VDS = 55V, VGS = 0V
µA
––– ––– 250
VDS = 44V, VGS = 0V, TJ = 150°C
––– ––– 100
VGS = 20V
nA
––– ––– -100
VGS = -20V
––– –––
89
I D = 32A
––– –––
20
nC
VDS = 44V
––– –––
39
VGS = 10V, See Fig. 6 and 13 „†
–––
11
–––
VDD = 28V
–––
78
–––
I D = 32A
ns
–––
32
–––
RG = 5.1Ω
–––
48
–––
RD = 0.85Ω, See Fig. 10 „†
Between lead,
4.5 –––
–––
6mm (0.25in.)
nH
G
from package
–––
7.5 –––
and center of die contact
––– 1900 –––
VGS = 0V
–––
620 –––
VDS = 25V
pF
–––
270 –––
ƒ = 1.0MHz, See Fig. 5†
–––
12
–––
ƒ = 1.0MHz
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD
t rr
Q rr
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)†
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Notes:
Min. Typ. Max. Units
–––
–––
36
–––
–––
210
–––
–––
–––
–––
94
360
1.3
140
540
A
V
ns
nC
Conditions
MOSFET symbol
showing the
G
integral reverse
p-n junction diode.
TJ = 25°C, IS = 22A, VGS = 0V „
TJ = 25°C, IF = 32A
di/dt = 100A/µs „†
 Repetitive rating; pulse width limited by
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
‚V
… t=60s, ƒ=60Hz
ƒI
† Uses IRFZ48N data and test conditions
max. junction temperature. ( See fig. 11 )
DD = 25V, starting TJ = 25°C, L = 530µH
RG = 25Ω, IAS = 32A. (See Figure 12)
SD ≤ 32A, di/dt ≤ 250A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
D
S
IRFIZ48N
1000
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
100
I , Drain-to-Source Current (A)
D
I , Drain-to-Source Current (A)
D
TOP
10
1
4.5V
0.1
0.1
20µs PULSE WIDTH
TC = 25°C
1
10
A
100
10
4.5V
1
20µs PULSE WIDTH
TC = 175°C
0.1
0.1
100
Fig 1. Typical Output Characteristics,
TJ = 25oC
R DS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
2.5
100
TJ = 175°C
10
TJ = 25°C
1
V DS= 25V
20µs PULSE WIDTH
5
6
7
8
9
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
A
100
Fig 2. Typical Output Characteristics,
TJ = 175oC
1000
4
10
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
0.1
1
A
10
I D = 53A
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20
40
60
A
8 0 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
IRFIZ48N
4000
20
C, Capacitance (pF)
3000
Ciss
Coss
2000
16
12
8
V
GS
Crss
1000
0
10
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
1
I D = 32A
V DS= 44V
V DS= 28V
, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1MHz
Ciss = Cgs + C gd , Cds SHORTED
Crss = Cgd
Coss = Cds + C gd
0
100
VDS , Drain-to-Source Voltage (V)
40
60
80
A
100
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
100
I D , Drain Current (A)
ISD , Reverse Drain Current (A)
20
TJ = 175°C
TJ = 25°C
10
10µs
100
100µs
10
1ms
1
10ms
VGS = 0V
0.1
0.2
0.6
1.0
1.4
1.8
2.2
VSD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
A
2.6
TC = 25°C
TJ = 175°C
Single Pulse
1
1
A
10
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating
Area
100
IRFIZ48N
RD
VDS
40
VGS
D.U.T.
I D, Drain Current (Amps)
RG
+
-VDD
30
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
20
Fig 10a. Switching Time Test Circuit
VDS
10
90%
A
0
25
50
75
100
125
150
175
10%
VGS
TC , Case Temperature (°C)
td(on)
Fig 9. Maximum Drain Current Vs.
Case Temperature
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (ZthJC )
10
D = 0.50
1
0.20
0.10
0.05
PDM
0.1
0.02
t
0.01
SINGLE PULSE
(THERMAL RESPONSE)
0.01
0.00001
Notes:
1. Duty factor D = t
1
/t
1
t2
2
2. Peak TJ = PDM x Z thJC + T C
0.0001
0.001
0.01
0.1
1
t 1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
A
10
15V
L
V DS
DRIVER
D.U.T
RG
+
V
- DD
IAS
20V
0.01Ω
tp
Fig 12a. Unclamped Inductive Test
Circuit
V(BR)DSS
tp
A
E AS , Single Pulse Avalanche Energy (mJ)
IRFIZ48N
700
ID
13A
22A
BOTTOM 32A
TOP
600
500
400
300
200
100
0
VDD = 25V
25
50
A
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
QG
.3µF
10 V
QGS
D.U.T.
QGD
VGS
VG
3mA
IG
Charge
Fig 13a. Basic Gate Charge Waveform
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
+
V
- DS
IRFIZ48N
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
ƒ
+
‚
-
-
„
+

•
•
•
•
RG
Driver Gate Drive
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Period
D=
-
VDD
P.W.
Period
VGS=10V
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
ISD
*
IRFIZ48N
Package Outline — TO-220 Fullpak
Dimensions are shown in millimeters (inches)
10.60 (.417)
10.40 (.409)
ø
3.40 (.133)
3.10 (.123)
4.80 (.189)
4.60 (.181)
-A3.70 (.145)
3.20 (.126)
16.00 (.630)
15.80 (.622)
2.80 (.110)
2.60 (.102)
LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
7.10 (.280)
6.70 (.263)
1.15 (.045)
MIN.
NOTES:
1 DIMENSIONING & TOLERANCING
PER ANSI Y14.5M, 1982
1
2
3
2 CONTROLLING DIMENSION: INCH.
3.30 (.130)
3.10 (.122)
-B-
13.70 (.540)
13.50 (.530)
C
A
1.40 (.055)
3X
1.05 (.042)
0.90 (.035)
3X 0.70 (.028)
0.25 (.010)
3X
M A M
2.54 (.100)
2X
B
0.48 (.019)
0.44 (.017)
2.85 (.112)
2.65 (.104)
D
B
MINIMUM CREEPAGE
DISTANCE BETWEEN
A-B-C-D = 4.80 (.189)
Part Marking
EXAMPLE
: THIS
IS AN
IRFI840G
EXAMPLE
: THIS
IS AN
IRF1010
WITH
ASSEMBLY
WITH
ASSEMBLY
CODE
E401
LOTLOT
CODE
9B1M
A
INTERNATIONAL
INTERNATIONAL
RECTIFIER
IRF1010
RECTIFIER
IRFI840G
LOGO
9246
LOGO
9B
E401 1M
9245
ASSEMBLY
ASSEMBLY
LOT
LOT CODE
CODE
PART NUMBERA
PART NUMBER
DATE CODE
DATE CODE
(YYWW)
(YYWW)
YY
= YEAR
YY == YEAR
WW
WEEK
WW = WEEK
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
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http://www.irf.com/
Data and specifications subject to change without notice.
4/96