PD - 94833 IRFI540NPbF HEXFET® Power MOSFET l l l l l l Advanced Process Technology Isolated Package High Voltage Isolation = 2.5KVRMS Sink to Lead Creepage Dist. = 4.8mm Fully Avalanche Rated Lead-Free D VDSS = 100V RDS(on) = 0.052Ω G Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. The TO-220 Fullpak eliminates the need for additional insulating hardware in commercial-industrial applications. The moulding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. This isolation is equivalent to using a 100 micron mica barrier with standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip or by a single screw fixing. TO-220 FULLPAK Absolute Maximum Ratings ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG ID = 20A S Parameter Max. Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Current Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw. 20 14 110 54 0.36 ±20 300 16 5.4 5.0 -55 to + 175 Units A W W/°C V mJ A mJ V/ns °C 300 (1.6mm from case) 10 lbfin (1.1Nm) Thermal Resistance Parameter RθJC RθJA Junction-to-Case Junction-to-Ambient Min. Typ. Max. Units 2.8 65 °C/W 11/13/03 IRFI540NPbF Electrical Characteristics @ TJ = 25°C (unless otherwise specified) RDS(on) VGS(th) g fs Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. 100 2.0 11 Typ. 0.11 8.2 39 44 33 IDSS Drain-to-Source Leakage Current LD Internal Drain Inductance 4.5 LS Internal Source Inductance 7.5 Ciss Coss Crss C Input Capacitance Output Capacitance Reverse Transfer Capacitance Drain to Sink Capacitance 1400 330 170 12 V(BR)DSS ∆V(BR)DSS/∆TJ IGSS Max. Units Conditions V VGS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 1mA 0.052 Ω VGS = 10V, ID = 11A 4.0 V VDS = VGS, ID = 250µA S VDS = 50V, ID = 16A 25 VDS = 100V, V GS = 0V µA 250 VDS = 80V, VGS = 0V, TJ = 150°C 100 VGS = 20V nA -100 VGS = -20V 94 ID = 16A 15 nC VDS = 80V 43 VGS = 10V, See Fig. 6 and 13 VDD = 50V ID = 16A ns RG = 5.1Ω RD = 3.0Ω, See Fig. 10 Between lead, 6mm (0.25in.) nH from package and center of die contact VGS = 0V VDS = 25V pF = 1.0MHz, See Fig. 5 = 1.0MHz D G S Source-Drain Ratings and Characteristics IS I SM VSD t rr Q rr Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Min. Typ. Max. Units 20 110 170 1.1 1.3 250 1.6 A V ns µC Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25°C, IS = 11A, VGS = 0V TJ = 25°C, IF = 16A di/dt = 100A/µs Notes: Repetitive rating; pulse width limited by Pulse width ≤ 300µs; duty cycle ≤ 2%. VDD = 25V, starting TJ = 25°C, L = 2.0mH t=60s, =60Hz ISD ≤ 16A, di/dt ≤ 210A/µs, VDD ≤ V(BR)DSS, Uses IRF540N data and test conditions max. junction temperature. ( See fig. 11 ) RG = 25Ω, IAS = 16A. (See Figure 12) TJ ≤ 175°C D G S IRFI540NPbF 1000 1000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V I , Drain-to-Source Current (A) D I , Drain-to-Source Current (A) D 100 10 4.5V 20µs PULSE WIDTH TC = 25°C 1 0.1 1 10 A 100 100 0.1 R DS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 100 TJ = 25°C TJ = 175°C 10 V DS = 50V 20µs PULSE WIDTH 7 8 9 10 100 A Fig 2. Typical Output Characteristics 3.0 6 1 VDS , Drain-to-Source Voltage (V) 1000 5 20µs PULSE WIDTH TC = 175°C 1 Fig 1. Typical Output Characteristics 1 4.5V 10 VDS , Drain-to-Source Voltage (V) 4 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP TOP 10 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics A I D = 27A 2.5 2.0 1.5 1.0 0.5 VGS = 10V 0.0 -60 -40 -20 0 20 40 60 A 80 100 120 140 160 180 TJ , Junction Temperature (°C) Fig 4. Normalized On-Resistance Vs. Temperature IRFI540NPbF 2400 V GS , Gate-to-Source Voltage (V) 2000 C, Capacitance (pF) 20 V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd Ciss C oss = C ds + C gd I D = 16A V DS = 80V V DS = 50V V DS = 20V 16 1600 12 Coss 1200 800 Crss 400 0 1 10 100 A 4 FOR TEST CIRCUIT SEE FIGURE 13 0 0 20 40 60 80 VDS , Drain-to-Source Voltage (V) Q G , Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 100 A 1000 OPERATION IN THIS AREA LIMITED BY R DS(on) I D , Drain Current (A) ISD , Reverse Drain Current (A) 8 100 TJ = 175°C 100 10µs 100µs 10 1ms TJ = 25°C VGS = 0V 10 0.4 0.8 1.2 1.6 VSD , Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage A 2.0 TC = 25°C TJ = 175°C Single Pulse 1 1 10ms 10 100 A 1000 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area IRFI540NPbF V GS ID , Drain Current (A) RD VDS 20 RG 15 D.U.T. + -V DD 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 10 Fig 10a. Switching Time Test Circuit 5 VDS 90% 0 25 50 75 100 125 150 175 TC , Case Temperature ( °C) 10% VGS td(on) Fig 9. Maximum Drain Current Vs. Case Temperature tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 D = 0.50 1 0.20 0.10 0.05 0.1 0.01 0.00001 0.02 0.01 PDM t1 t2 SINGLE PULSE (THERMAL RESPONSE) 0.0001 Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJC + TC 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 10 IRFI540NPbF D.U.T. RG + - VDD IAS 10 V tp 0.01Ω Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp VDD EAS , Single Pulse Avalanche Energy (mJ) L VDS 700 TOP 600 BOTTOM ID 6.6A 11A 16A 500 400 300 200 100 0 VDD = 25V 25 50 75 100 125 150 Starting TJ , Junction Temperature (°C) VDS Fig 12c. Maximum Avalanche Energy Vs. Drain Current IAS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF 10 V QGS D.U.T. QGD + V - DS VGS VG 3mA Charge Fig 13a. Basic Gate Charge Waveform IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit A 175 IRFI540NPbF Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + RG • • • • Driver Gate Drive P.W. + dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Period D= - VDD P.W. Period VGS=10V D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS ISD * IRFI540NPbF TO-220 Full-Pak Package Outline TO-220 Full-Pak Part Marking Information E XAMP L E : T H IS IS AN IR F I840G WIT H AS S E MB L Y L OT COD E 3432 AS S E MB L E D ON WW 24 1999 IN T H E AS S E MB L Y L IN E "K " Note: "P" in assembly line position indicates "Lead-Free" IN T E R N AT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT COD E P AR T N U MB E R IR F I840G 924K 34 32 DAT E CODE YE AR 9 = 1999 WE E K 24 L IN E K Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.11/03