IRF IRFS31N20DTRL

PD- 93805B
IRFB31N20D
IRFS31N20D
IRFSL31N20D
SMPS MOSFET
HEXFET® Power MOSFET
Applications
l High frequency DC-DC converters
VDSS
200V
Benefits
Low Gate-to-Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design, (See
App. Note AN1001)
TO-220AB
l Fully Characterized Avalanche Voltage
IRFB31N20D
and Current
RDS(on) max
ID
0.082Ω
31A
l
D2Pak
IRFS31N20D
TO-262
IRFSL31N20D
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TA = 25°C
PD @TC = 25°C
VGS
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current 
Power Dissipation ‡
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt ƒ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torqe, 6-32 or M3 screw†
Max.
31
21
124
3.1
200
1.3
± 30
2.1
-55 to + 175
Units
A
W
W/°C
V
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Typical SMPS Topologies
l
Telecom 48V Input Forward Converters
Notes  through ‡ are on page 11
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1
2/14/00
IRFB/IRFS/IRFSL31N20D
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
V(BR)DSS
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min.
200
–––
–––
3.0
–––
–––
–––
–––
Typ.
–––
0.25
–––
–––
–––
–––
–––
–––
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.082 Ω
VGS = 10V, ID = 18A „
5.5
V
VDS = VGS, ID = 250µA
25
VDS = 200V, VGS = 0V
µA
250
VDS = 160V, VGS = 0V, TJ = 150°C
100
VGS = 30V
nA
-100
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min.
17
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
70
18
33
16
38
26
10
2370
390
78
2860
150
170
Max. Units
Conditions
–––
S
VDS = 50V, ID = 18A
110
I D = 18A
27
nC
VDS = 160V
49
VGS = 10V, „
–––
VDD = 100V
–––
ID = 18A
ns
–––
RG = 2.5Ω
–––
R D = 5.4Ω „
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 160V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 160V …
Avalanche Characteristics
Parameter
EAS
IAR
EAR
Single Pulse Avalanche Energy‚
Avalanche Current
Repetitive Avalanche Energy
Typ.
Max.
Units
–––
–––
–––
420
18
20
mJ
A
mJ
Typ.
Max.
Units
–––
0.50
–––
–––
0.75
–––
62
40
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
RθJA
Junction-to-Case
Case-to-Sink, Flat, Greased Surface †
Junction-to-Ambient†
Junction-to-Ambient‡
°C/W
Diode Characteristics
IS
ISM
VSD
trr
Qrr
ton
2
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
31
––– –––
showing the
A
G
integral reverse
––– ––– 124
S
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 18A, VGS = 0V „
––– 200 300
ns
TJ = 25°C, IF = 18A
––– 1.7 2.6
µC
di/dt = 100A/µs „
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRFB/IRFS/IRFSL31N20D
1000
1000
VGS
15V
12V
10V
8.0V
7.0V
6.5V
6.0V
BOTTOM 5.5V
VGS
15V
12V
10V
8.0V
7.0V
6.5V
6.0V
BOTTOM 5.5V
100
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
100
10
1
5.5V
0.1
0.1
1
20µs PULSE WIDTH
TJ = 25 °C
10
10
5.5V
100
Fig 1. Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
3.0
100
TJ = 175 ° C
10
TJ = 25 ° C
1
V DS = 50V
20µs PULSE WIDTH
6
7
8
9
10
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10
100
Fig 2. Typical Output Characteristics
1000
5
1
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
0.1
20µs PULSE WIDTH
TJ = 175 °C
1
0.1
11
ID = 30A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFB/IRFS/IRFSL31N20D
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance(pF)
10000
Ciss
1000
Coss
100
Crss
VGS , Gate-to-Source Voltage (V)
20
100000
10
100
VDS = 160V
VDS = 100V
VDS = 40V
16
12
8
4
10
1
ID = 18A
FOR TEST CIRCUIT
SEE FIGURE 13
0
1000
0
20
40
60
80
100
Q G , Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY RDS(on)
100
TJ = 175 ° C
10
TJ = 25 ° C
10us
100us
10
1ms
1
0.1
0.2
V GS = 0 V
0.4
0.6
0.8
1.0
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
I D , Drain Current (A)
100
1.2
TC = 25 ° C
TJ = 175 ° C
Single Pulse
1
1
10ms
10
100
1000
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFB/IRFS/IRFSL31N20D
30
RD
VDS
VGS
25
D.U.T.
I D , Drain Current (A)
RG
+
-VDD
20
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
15
10
Fig 10a. Switching Time Test Circuit
VDS
5
90%
0
25
50
75
100
125
TC , Case Temperature
150
175
( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.20
0.1
0.10
P DM
0.05
t1
0.02
0.01
t2
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFB/IRFS/IRFSL31N20D
D R IV E R
L
VDS
D .U .T
RG
+
V
- DD
IA S
20V
tp
0 .0 1 Ω
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D SS
tp
A
EAS , Single Pulse Avalanche Energy (mJ)
1000
1 5V
TOP
800
BOTTOM
ID
7.3A
15A
18A
600
400
200
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( °C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
QG
50KΩ
10 V
12V
QGS
.2µF
.3µF
QGD
D.U.T.
VG
+
V
- DS
VGS
3mA
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
6
Fig 13b. Gate Charge Test Circuit
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IRFB/IRFS/IRFSL31N20D
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
ƒ
+
‚
-
-
„
+

•
•
•
•
RG
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
D=
Period
+
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-channel HEXFET® Power MOSFETs
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7
IRFB/IRFS/IRFSL31N20D
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
2 .8 7 (.1 1 3 )
2 .6 2 (.1 0 3 )
1 0 .5 4 (.4 1 5 )
1 0 .2 9 (.4 0 5 )
-B -
3 .7 8 (.1 4 9 )
3 .5 4 (.1 3 9 )
4 .6 9 (.1 8 5 )
4 .2 0 (.1 6 5 )
-A -
1 .3 2 (.0 5 2 )
1 .2 2 (.0 4 8 )
6.4 7 (.2 5 5 )
6.1 0 (.2 4 0 )
4
1 5 .2 4 (.6 0 0 )
1 4 .8 4 (.5 8 4 )
1 .1 5 (.0 4 5 )
M IN
1
2
3
1 4 .0 9 (.5 5 5 )
1 3 .4 7 (.5 3 0 )
4 .0 6 (.1 6 0 )
3 .5 5 (.1 4 0 )
3X
1 .4 0 (.0 5 5 )
3X
1 .1 5 (.0 4 5 )
L E A D A S S IG N M E N T S
1 - GATE
2 - D R A IN
3 - S OU RC E
4 - D R A IN
0 .9 3 (.0 3 7 )
0 .6 9 (.0 2 7 )
0 .3 6 (.0 1 4 )
3X
M
B A M
0 .5 5 (.0 2 2 )
0 .4 6 (.0 1 8 )
2 .9 2 (.1 1 5 )
2 .6 4 (.1 0 4 )
2 .5 4 (.1 0 0)
2X
N O TE S :
1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 .
2 C O N T R O L L IN G D IM E N S IO N : IN C H
3 O U T L IN E C O N F O R M S T O J E D E C O U T L IN E T O -2 2 0 A B .
4 H E A T S IN K & L E A D M E A S U R E M E N T S D O N O T IN C L U D E B U R R S .
TO-220AB Part Marking Information
E X A M P L E : T H IS IS A N IR F 1 0 1 0
W IT H A S S E M B L Y
LOT C ODE 9B1M
A
IN T E R N A T IO N A L
R E C T IF IE R
LOGO
ASSEMBLY
LOT CODE
8
PART NU M BER
IR F 1 0 1 0
9246
9B
1M
D ATE CO DE
(Y Y W W )
YY = YEAR
W W = W EEK
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IRFB/IRFS/IRFSL31N20D
D2Pak Package Outline
1 0.54 (.4 15)
1 0.29 (.4 05)
1.4 0 (.055 )
M AX.
-A-
1.3 2 (.05 2)
1.2 2 (.04 8)
2
1.7 8 (.07 0)
1.2 7 (.05 0)
1
1 0.16 (.4 00 )
RE F.
-B -
4.69 (.1 85)
4.20 (.1 65)
6.47 (.2 55 )
6.18 (.2 43 )
15 .4 9 (.6 10)
14 .7 3 (.5 80)
3
2.7 9 (.110 )
2.2 9 (.090 )
2.61 (.1 03 )
2.32 (.0 91 )
5 .28 (.20 8)
4 .78 (.18 8)
3X
1.40 (.0 55)
1.14 (.0 45)
3X
5 .08 (.20 0)
0.5 5 (.022 )
0.4 6 (.018 )
0 .93 (.03 7 )
0 .69 (.02 7 )
0 .25 (.01 0 )
M
8.8 9 (.3 50 )
R E F.
1.3 9 (.0 5 5)
1.1 4 (.0 4 5)
B A M
M IN IM U M R E CO M M E ND E D F O O TP R IN T
1 1.43 (.4 50 )
NO TE S:
1 D IM EN S IO N S A FTER SO L D ER D IP.
2 D IM EN S IO N IN G & TO LE RA N C IN G PE R A N S I Y1 4.5M , 198 2.
3 C O N TRO L LIN G D IM EN SIO N : IN C H .
4 H E ATSINK & L EA D D IM EN S IO N S D O N O T IN C LU D E B UR R S.
LE A D A SS IG N M E N TS
1 - G A TE
2 - D R AIN
3 - S O U RC E
8.89 (.3 50 )
17 .78 (.70 0)
3 .8 1 (.15 0)
2 .08 (.08 2)
2X
2.5 4 (.100 )
2X
D2Pak Part Marking Information
IN TE R N A TIO N A L
R E C T IF IE R
LO G O
A S S E M B LY
LO T C O D E
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A
PART NUM BER
F530S
9 24 6
9B
1M
DATE CODE
(Y YW W )
YY = Y E A R
W W = W EEK
9
IRFB/IRFS/IRFSL31N20D
TO-262 Package Outline
TO-262 Part Marking Information
10
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IRFB/IRFS/IRFSL31N20D
D2Pak Tape & Reel Information
TR R
1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
4 .1 0 (.1 6 1 )
3 .9 0 (.1 5 3 )
F E E D D IR E C TIO N 1 .8 5 (.0 7 3 )
1 .60 (.06 3 )
1 .50 (.05 9 )
0 .3 6 8 (.0 14 5 )
0 .3 4 2 (.0 13 5 )
1 1 .60 (.4 5 7 )
1 1 .40 (.4 4 9 )
1 .6 5 (.0 6 5 )
15 .4 2 (.60 9 )
15 .2 2 (.60 1 )
2 4 .3 0 (.9 5 7 )
2 3 .9 0 (.9 4 1 )
TRL
10 .9 0 (.42 9 )
10 .7 0 (.42 1 )
1.7 5 (.0 69 )
1.2 5 (.0 49 )
4 .7 2 (.1 3 6)
4 .5 2 (.1 7 8)
1 6 .1 0 ( .6 3 4)
1 5 .9 0 ( .6 2 6)
FE E D D IR E C T IO N
1 3.50 (.5 32)
1 2.80 (.5 04)
2 7.40 (1.07 9)
2 3.90 (.941 )
4
3 30 .00
(1 4.1 73)
M A X.
Notes:
N O TE S :
1 . CO M FO R M S TO E IA- 418 .
2 . CO N TR O L LIN G D IM EN S IO N : M ILL IM ET E R .
3 . DIM EN S IO N M EA S UR E D @ H UB .
4 . IN C LU D ES F LA N G E D IS T O R T IO N @ O U T ER ED G E.
 Repetitive rating; pulse width limited by
max. junction temperature.
‚ Starting TJ = 25°C, L = 3.8mH
RG = 25Ω, IAS = 18A.
ƒ ISD ≤ 18A, di/dt ≤ 110A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
6 0.00 (2.36 2)
M IN .
26 .40 (1.03 9)
24 .40 (.9 61 )
3
30 .4 0 (1.19 7)
M A X.
4
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
… Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
† This is only applied to TO-220AB package
‡ This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
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Data and specifications subject to change without notice. 2/2000
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11