PD - 94390 IRLI3615 HEXFET® Power MOSFET l l l l l l Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175°C Operating Temperature Fast Switching Fully Avalanche Rated D VDSS = 150V RDS(on) = 0.085 Ω G ID = 14A S Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO-220 Fullpak eliminates the need for additional insulating hardware in commercial-industrial applications. The moulding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. This isolation is equivalent to using a 100 micron mica barrier with standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip or by a single screw fixing. TO-220 FULLPAK Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 srew Max. Units 14 9.8 56 45 0.30 ±16 340 8.4 4.5 5.0 -55 to + 175 A W W/°C V mJ A mJ V/ns °C 300 (1.6mm from case ) 10 lbf•in (1.1N•m) Thermal Resistance Parameter RθJC RθJA www.irf.com Junction-to-Case Junction-to-Ambient Typ. Max. Units ––– ––– 3.3 65 °C/W 1 01/30/02 IRLI3615 Electrical Characteristics @ TJ = 25°C (unless otherwise specified) ∆V(BR)DSS/∆TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) gfs Gate Threshold Voltage Forward Transconductance IDSS Drain-to-Source Leakage Current V(BR)DSS Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time LD Internal Drain Inductance LS Internal Source Inductance Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance IGSS Min. Typ. Max. Units Conditions 150 ––– ––– V VGS = 0V, ID = 250µA ––– 0.18 ––– V/°C Reference to 25°C, ID = 1mA ––– ––– 0.085 VGS = 10V, ID = 8.4A ––– ––– 0.095 Ω VGS = 5.0V, ID = 8.4A 1.0 ––– 2.0 V VDS = VGS, ID = 250µA 14 ––– ––– S VDS = 50V, ID = 8.4A ––– ––– 25 VDS = 150V, VGS = 0V µA ––– ––– 250 VDS = 120V, VGS = 0V, TJ = 150°C ––– ––– 100 VGS = 16V nA ––– ––– -100 VGS = -16V ––– ––– 140 ID = 8.4A ––– ––– 9.5 nC VDS = 120V ––– ––– 53 VGS = 10V, See Fig. 6 and 13 ––– 8.3 ––– VDD = 75V ––– 20 ––– ID = 8.4A ns ––– 110 ––– RG = 6.2Ω, VGS = 10V ––– 53 ––– RD = 8.9Ω, See Fig. 10 Between lead, ––– 4.5 ––– 6mm (0.25in.) nH from package ––– 7.5 ––– G and center of die contact ––– 1600 ––– VGS = 0V ––– 290 ––– pF VDS = 25V ––– 150 ––– ƒ = 1.0MHz, See Fig. 5 D S Source-Drain Ratings and Characteristics IS ISM VSD trr Q rr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– 14 showing the A G integral reverse ––– ––– 56 S p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 8.4A, VGS = 0V ––– 180 270 ns TJ = 25°C, IF = 8.4A ––– 1130 1700 nC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) Starting TJ = 25°C, L = 9.5mH RG = 25Ω, I AS = 8.4A. (See Figure 12) ISD ≤ 8.4A, di/dt ≤ 510A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. 2 Pulse width ≤ 300µs; duty cycle ≤ 2%. Caculated continuous current based on maximum allowable junction temperature; for recommended current-handling of the package refer to Design Tip # 93-4. www.irf.com IRLI3615 100 100 VGS 15V 10V 7.0V 5.5V 4.5V 4.0V 3.5V BOTTOM 2.7V I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) 10 2.7V 20µs PULSE WIDTH T = 25 C ° J 1 0.1 1 10 10 2.7V 100 TJ = 25 ° C TJ = 175 ° C 10 V DS = 50V 20µs PULSE WIDTH 6.0 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 7.0 R DS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 3.5 5.0 10 100 Fig 2. Typical Output Characteristics 100 4.0 ° J 1 VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 3.0 20µs PULSE WIDTH T = 175 C 1 0.1 VDS , Drain-to-Source Voltage (V) 1 2.0 VGS 15V 10V 7.0V 5.5V 4.5V 4.0V 3.5V BOTTOM 2.7V TOP TOP ID = 14A 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature ( °C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRLI3615 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd C, Capacitance(pF) 10000 Ciss 1000 Coss Crss 100 20 VGS , Gate-to-Source Voltage (V) 100000 10 ID = 8.4A VDS = 120V VDS = 75V VDS = 30V 16 12 8 4 FOR TEST CIRCUIT SEE FIGURE 13 0 1 10 100 0 1000 20 40 60 80 100 120 140 QG , Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 100 ID, Drain-to-Source Current (A) ISD , Reverse Drain Current (A) 1000 OPERATION IN THIS AREA LIMITED BY RDS(on) 100 10 TJ = 175 ° C 1 TJ = 25 ° C 0.1 0.2 V GS = 0 V 0.4 0.6 0.8 1.0 1.2 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 1.4 100µs 10 1ms 1 10ms Tc = 25°C Tj = 175°C Single Pulse 0.1 1 10 100 1000 VDS , Drain-toSource Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRLI3615 14 RD VDS VGS 12 D.U.T. I D , Drain Current (A) RG + -VDD 10 10V 8 Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 6 Fig 10a. Switching Time Test Circuit 4 VDS 2 90% 0 25 50 75 100 125 150 175 TC , Case Temperature ( ° C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 D = 0.50 1 0.20 0.10 0.05 PDM 0.1 0.02 0.01 t1 SINGLE PULSE (THERMAL RESPONSE) t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.01 0.00001 0.0001 0.001 0.01 0.1 1 10 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRLI3615 1 5V L VDS D .U .T RG IA S 20V D R IV E R + V - DD 0 .0 1 Ω tp Fig 12a. Unclamped Inductive Test Circuit A EAS , Single Pulse Avalanche Energy (mJ) 1000 TOP 800 BOTTOM ID 3.4A 5.9A 8.4A 600 400 200 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature ( °C) V (B R )D SS tp Fig 12c. Maximum Avalanche Energy Vs. Drain Current IAS Current Regulator Same Type as D.U.T. Fig 12b. Unclamped Inductive Waveforms 50KΩ QG 12V .2µF .3µF 10 V QGS + V - DS VGS VG 3mA Charge Fig 13a. Basic Gate Charge Waveform 6 D.U.T. QGD IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit www.irf.com IRLI3615 Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + • • • • RG dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Driver Gate Drive P.W. Period D= + - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS www.irf.com 7 IRLI3615 Package Outline TO-220 Fullpak Outline Dimensions are shown in millimeters (inches) 1 0 .6 0 (.4 1 7 ) 1 0 .4 0 (.4 0 9 ) ø 3 .4 0 (.1 3 3 ) 3 .1 0 (.1 2 3 ) 4 .8 0 (.1 8 9 ) 4 .6 0 (.1 8 1 ) -A 3 .7 0 (.1 4 5 ) 3 .2 0 (.1 2 6 ) 1 6 .0 0 (.6 3 0 ) 1 5 .8 0 (.6 2 2 ) 2 .8 0 (.1 1 0 ) 2 .6 0 (.1 0 2 ) L E A D A S S IG N M E N T S 1 - G A TE 2 - D R A IN 3 - S O U RC E 7 .10 (.2 8 0 ) 6 .70 (.2 6 3 ) 1 .1 5 (.0 4 5 ) M IN. N O TE S : 1 D IM E N S IO N ING & T O L E R A N C ING P E R A N S I Y 1 4 .5 M , 1 9 8 2 1 2 3 2 C O N T R O L L IN G D IM E N S ION : IN C H . 3.3 0 (.1 30 ) 3.1 0 (.1 22 ) -B - 1 3 .7 0 (.5 4 0 ) 1 3 .5 0 (.5 3 0 ) C A 3X 1 .4 0 (.0 5 5) 1 .0 5 (.0 4 2) 0 .9 0 (.0 35 ) 3 X 0 .7 0 (.0 28 ) 0 .2 5 (.0 1 0 ) 3X M A M 0.4 8 (.0 1 9 ) 0.4 4 (.0 1 7 ) 2 .8 5 (.1 1 2 ) 2 .6 5 (.1 0 4 ) B 2 .5 4 (.1 0 0 ) 2X D B M IN IM U M C R E E P A G E D IS T A NC E B E TW E E N A -B -C -D = 4.8 0 (.1 8 9 ) Part Marking Information TO-220 Fullpak EXAMPLE: T HIS IS AN IRFI840G WIT H ASSEMBLY LOT CODE 3432 ASSEMBLED ON WW 24 1999 IN T HE ASSEMBLY LINE "K" INT ERNAT IONAL RECT IFIER LOGO PART NUMBER IRFI840G 924K 34 ASSEMBLY LOT CODE 32 DAT E CODE YEAR 9 = 1999 WEEK 24 LINE K Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.01/02 8 www.irf.com