ISL43143, ISL43144, ISL43145 ® Data Sheet December 1, 2005 Low-Voltage, Single and Dual Supply, Quad SPST, High Performance Analog Switches Features The Intersil ISL43143–ISL43145 devices are CMOS, precision, quad SPST analog switches designed to operate from a single +2V to +12V supply or from a ±2V to ±6V supply. Targeted applications include battery powered equipment that benefit from the devices’ low power consumption (<1µW), low leakage currents (5nA max), and fast switching speeds (tON = 52ns, tOFF = 40ns). A 5Ω maximum RON flatness ensures signal fidelity, while channel-to-channel mismatch is guaranteed to be less than 2Ω. • Four Separately Controlled SPST Switches The ISL43143/ISL43144/ISL43145 are quad single-pole/ single-throw (SPST) devices. The ISL43143 has four normally closed (NC) switches; the ISL43144 has four normally open (NO) switches; the ISL43145 has two NO and two NC switches and can be used as a dual SPDT, or a dual 2:1 multiplexer. FN6037.3 • Fully Specified for 10% Tolerances at VS = ±5V and V+ = 12V, 5V and 3.3V • Pin Compatible with DG411/DG412/DG413 • ON Resistance (RON Max.) . . . . . . . . . . . . . . . . . . . . 25Ω • RON Matching Between Channels. . . . . . . . . . . . . . . . . . <1Ω • Low Power Consumption (PD) . . . . . . . . . . . . . . . . . . . .<1µW • Low Off Leakage Current (Max at 85°C) . . . . . . . . . 2.5nA • Fast Switching Action - tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52ns - tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40ns • Minimum 2000V ESD Protection per Method 3015.7 • TTL, CMOS Compatible • Pb-Free Plus Anneal Available (RoHS Compliant) Table 1 summarizes the performance of this family. Applications TABLE 1. FEATURES AT A GLANCE Number of Switches Configuration ±4.5V RON ±4.5V tON/tOFF 10.8V RON 10.8V tON/tOFF 4.5V RON 4.5V tON/tOFF 3V RON 3V tON/tOFF Packages ISL43143 ISL43144 ISL43145 4 4 4 All NC All NO 2 NC/2 NO 18Ω 18Ω 18Ω 52ns/40ns 52ns/40ns 52ns/40ns 14Ω 14Ω 14Ω 40ns/27ns 40ns/27ns 40ns/27ns 30Ω 30Ω 30Ω 64ns/29ns 64ns/29ns 64ns/29ns 51Ω 51Ω 51Ω 120ns/50ns 120ns/50ns 120ns/50ns 16 Ld TSSOP, 16Ld QFN 4x4 • Battery Powered, Handheld, and Portable Equipment - Barcode Scanners - Laptops, Notebooks, Palmtops • Communications Systems - Radios - XDSL and PBX / PABX - RF “Tee” Switches - Base Stations • Test Equipment - Medical Ultrasound - Electrocardiograph - ATE • Audio and Video Switching • General Purpose Circuits - +3V/+5V DACs and ADCs - Digital Filters - Operational Amplifier Gain Switching Networks - High Frequency Analog Switching - High Speed Multiplexing Related Literature • Technical Brief TB363 “Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)” • AN557 “Recommended Test Procedures for Analog Switches” 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2003-2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL43143, ISL43144, ISL43145 (Note 1) 15 COM2 IN1 IN2 COM2 16 IN2 IN1 1 COM1 2 16 15 14 13 NC1 1 12 NC2 V- 2 11 V+ 14 NC2 NC1 3 V- ISL43143 (QFN) TOP VIEW COM1 ISL43143 (TSSOP) TOP VIEW 13 V+ 4 3 10 N.C. NC4 6 11 NC3 NC4 4 9 9 IN3 14 COM2 COM1 3 V- 13 V+ 4 GND 5 12 N.C. 11 COM3 COM4 6 10 NO3 IN4 8 9 IN3 16 15 14 13 COM1 1 12 COM2 V- 2 11 V+ GND 3 10 N.C. COM4 4 9 5 NO4 NO4 7 NO2 15 NO2 ISL43144 (QFN) TOP VIEW IN1 IN2 COM2 16 15 14 13 15 COM2 NO1 2 14 NC2 COM1 3 V- 8 ISL43145 (QFN) TOP VIEW 16 IN2 IN1 1 7 NO1 ISL43145 (TSSOP) TOP VIEW 6 COM3 NO3 NO1 2 8 IN2 16 IN2 7 IN3 IN1 1 6 IN1 ISL43144 (TSSOP) TOP VIEW 5 IN4 IN4 8 NC3 COM3 10 COM3 COM4 7 IN3 GND IN4 12 N.C. COM4 GND 5 NO1 Pinouts 13 V+ 4 COM1 1 12 NC2 V- 2 11 V+ 10 N.C. COM4 4 9 10 COM3 NO4 7 9 IN3 IN4 8 5 6 7 8 COM3 3 IN3 GND 11 NC3 IN4 12 N.C. NO4 GND 5 COM4 6 NC3 NOTE: 1. Switches Shown for Logic “0” Input. 2 FN6037.3 December 1, 2005 ISL43143, ISL43144, ISL43145 Truth Table Ordering Information ISL43143 ISL43144 ISL43145 PART NO. * LOGIC SW 1, 2, 3, 4 SW 1, 2, 3, 4 SW 1, 4 SW 2, 3 0 ON OFF OFF ON 1 OFF ON ON OFF ISL43143IV NOTE: Logic “0” ≤ 0.8V. Logic “1” ≥ 2.4V. Pin Descriptions PIN FUNCTION V+ Positive Power Supply Input V- Negative Power Supply Input. Connect to GND for Single Supply Configurations. GND Ground Connection IN Digital Control Input COM Analog Switch Common Pin NO Analog Switch Normally Open Pin NC Analog Switch Normally Closed Pin N.C. No Internal Connection PART MARKING 43143IV TEMP. RANGE (°C) PACKAGE PKG. DWG. # -40 to 85 16 Ld TSSOP M16.173 ISL43143IVZ 43143IVZ (Note 2) -40 to 85 16 Ld TSSOP M16.173 (Pb-free) ISL43143IR -40 to 85 16 Ld QFN L16.4x4 ISL43143IRZ 43143IRZ (Note 2) -40 to 85 16 Ld QFN (Pb-free) L16.4x4 ISL43144IV -40 to 85 16 Ld TSSOP M16.173 ISL43144IVZ 43144IVZ (Note 2) -40 to 85 16 Ld TSSOP M16.173 (Pb-free) ISL43144IR -40 to 85 16 Ld QFN L16.4x4 ISL43144IRZ 43144IRZ (Note 2) -40 to 85 16 Ld QFN (Pb-free) L16.4x4 ISL43145IV -40 to 85 16 Ld TSSOP M16.173 ISL43145IVZ 43145IVZ (Note 2) -40 to 85 16 Ld TSSOP M16.173 (Pb-free) ISL43145IR -40 to 85 16 Ld QFN L16.4x4 -40 to 85 16 Ld QFN (Pb-free) L16.4x4 43143IR 43144IV 43144IR 43145IV 43145IR ISL43145IRZ 43145IRZ (Note 2) *Most surface mount devices are available on tape and reel; add “-T” to suffix. NOTE: 2. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3 FN6037.3 December 1, 2005 ISL43143, ISL43144, ISL43145 Absolute Maximum Ratings Thermal Information V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V V- to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15 to 0.3V All Other Pins (Note 3) . . . . . . . . . . . . . .((V-) - 0.3V) to ((V+) + 0.3V) Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 30mA Peak Current, IN, NO, NC, or COM (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . 100mA ESD Rating (Per MIL-STD-883 Method 3015). . . . . . . . . . . . . .>2kV Thermal Resistance (Typical) θJA (°C/W) 16 Ld TSSOP Package (Note 4) . . . . . . . . . . . . . . . 150 16 Ld QFN Package (Note 5) . . . . . . . . . . . . . . . . . . 75 Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C Moisture Sensitivity (See Technical Brief TB363) All Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1 Maximum Storage Temperature Range . . . . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C (TSSOP - Lead Tips Only) Operating Conditions Temperature Range ISL4314XIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 3. Signals on NC, NO, COM, or IN exceeding V+ or V- are clamped by internal diodes. Limit forward diode current to maximum current ratings. 4. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 5. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379 and Tech Brief TB389. Electrical Specifications: ±5V Supply Test Conditions: VSUPPLY = ±4.5V to ±5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5), Unless Otherwise Specified PARAMETER TEST CONDITIONS TEMP (°C) (NOTE 6) MIN Full V- - V+ V 25 - 18 25 Ω TYP (NOTE 6) MAX UNITS ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON VS = ±4.5V, ICOM = 10mA, VNO or VNC = ±3.5V, See Figure 5 Full - - 30 Ω RON Matching Between Channels, ∆RON VS = ±4.5V, ICOM = 10mA, VNO or VNC = ±3V 25 - 0.5 2 Ω Full - - 4 Ω RON Flatness, RFLAT(ON) VS = ±4.5V, ICOM = 10mA, VNO or VNC = 0V, ±3V, Note 8 Ω NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) VS = ±5.5V, VCOM = ±4.5V, VNO or VNC = +4.5V, Note 7 COM OFF Leakage Current, ICOM(OFF) VS = ±5.5V, VCOM = ±4.5V, VNO or VNC = +4.5V, Note 7 COM ON Leakage Current, ICOM(ON) VS = ±5.5V, VCOM = VNO or VNC = ±4.5V, Note 7 25 - - 5 Full - - 5 Ω 25 -0.1 - 0.1 nA Full -2.5 - 2.5 nA 25 -0.1 - 0.1 nA Full -2.5 - 2.5 nA 25 -0.2 - 0.2 nA Full -5 - 5 nA Input Voltage High, VINH Full 2.4 1.6 - V Input Voltage Low, VINL Full - 1.5 0.8 V VS = ±5.5V, VIN = 0V or V+ Full -1 - 1 µA VS = ±4.5V, VNO or VNC = ±3V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V, See Figure 1 25 - 52 65 ns Full - - 75 ns 25 - 40 50 ns DIGITAL INPUT CHARACTERISTICS Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF VS = ±4.5V, VNO or VNC = ±3V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V, See Figure 1 Break-Before-Make Time Delay (ISL43145 only), tD VS = ±5.5V, VNO or VNC = ±3V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V, See Figure 3 Charge Injection, Q CL = 1.0nF, VG = 0V, RG = 0Ω, See Figure 2 NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 4 Full - - 55 ns Full 5 19 - ns 25 - - 5 pC 25 - 10 - pF FN6037.3 December 1, 2005 ISL43143, ISL43144, ISL43145 Electrical Specifications: ±5V Supply Test Conditions: VSUPPLY = ±4.5V to ±5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5), Unless Otherwise Specified (Continued) PARAMETER TEST CONDITIONS TEMP (°C) (NOTE 6) MIN TYP (NOTE 6) MAX UNITS COM OFF Capacitance, CCOM(OFF) f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 25 - 26 - pF COM ON Capacitance, CCOM(ON) f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 25 - 34 - pF OFF Isolation RL = 50Ω, CL = 15pF, f = 1MHz, VNO or VNC = 1VRMS, See Figures 4 and 6 25 - 71 - dB Crosstalk, Note 9 25 - -89 - dB Power Supply Rejection Ratio RL = 50Ω, CL = 5pF, f = 1MHz 25 - 58 - dB Full ±2 - ±6 V POWER SUPPLY CHARACTERISTICS Power Supply Range VS = ±5.5V, VIN = 0V or V+, Switch On or Off Positive Supply Current, I+ Negative Supply Current, I- 25 -1 0.01 1 µA Full -1 - 1 µA 25 -1 0.01 1 µA Full -1 - 1 µA NOTES: 6. VIN = Input voltage to perform proper function. 7. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 8. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at 25°C. 9. Flatness is defined as the delta between the maximum and minimum RON values over the specified voltage range. 10. Between any two switches. Electrical Specifications: 5V Supply PARAMETER Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5), Unless Otherwise Specified TEST CONDITIONS TEMP (°C) MIN (NOTE 6) Full 0 - V+ V 25 - 30 40 Ω TYP MAX (NOTE 6) UNITS ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 3.5V, See Figure 5 Full - - 50 Ω RON Matching Between Channels, ∆RON V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 3V 25 - 0.5 3 Ω Full - - 4 Ω RON Flatness, RFLAT(ON) V+ = 5.5V, ICOM = 1.0mA, VNO or VNC = 1V, 2V, 3V, Note 8 25 - 4.4 6 Ω Full - - 8 Ω NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V, Note 7 25 -0.1 - 0.1 nA Full -2.5 - 2.5 nA COM OFF Leakage Current, ICOM(OFF) V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V, Note 7 25 -0.1 - 0.1 nA Full -2.5 - 2.5 nA COM ON Leakage Current, ICOM(ON) V+ = 5.5V, VCOM = VNO or VNC = 1V, 4.5V, Note 7 25 -0.2 - 0.2 nA Full -5 - 5 nA Full 2.4 1.5 - V DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINH Input Voltage Low, VINL Input Current, IINH, IINL Full - 1.4 0.8 V V+ = 5.5V, VIN = 0V or V+ Full -1 - 1 µA V+ = 4.5V, VNO or VNC = 3V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V, See Figure 1 25 - 64 80 ns Full - - 90 ns 25 - 29 40 ns DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF V+ = 4.5V, VNO or VNC = 3V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V, See Figure 1 Break-Before-Make Time Delay (ISL43145 only), tD V+ = 5.5V, VNO or VNC = 3V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V, See Figure 3 5 Full - - 45 ns Full 15 39 - ns FN6037.3 December 1, 2005 ISL43143, ISL43144, ISL43145 Electrical Specifications: 5V Supply Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5), Unless Otherwise Specified (Continued) TEMP (°C) MIN (NOTE 6) TYP 25 - 1.2 2 pC NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 25 - 10 - pF COM OFF Capacitance, CCOM(OFF) f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 25 - 26 - pF COM ON Capacitance, CCOM(ON) f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 25 - 34 - pF OFF Isolation 25 - 71 - dB Crosstalk, Note 9 RL = 50Ω, CL = 15pF, f = 1MHz, VNO or VNC = 1VRMS, See Figures 4 and 6 25 - -89 - dB Power Supply Rejection Ratio RL = 50Ω, CL = 5pF, f = 1MHz 25 - 58 - dB PARAMETER TEST CONDITIONS Charge Injection, Q CL = 1.0nF, VG = 0V, RG = 0Ω, See Figure 2 MAX (NOTE 6) UNITS POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ V+ = 5.5V, VIN = 0V or V+, Switch On or Off Negative Supply Current, I- Electrical Specifications: 3.3V Supply PARAMETER 25 -1 0.01 1 µA Full -1 - 1 µA 25 -1 0.01 1 µA Full -1 - 1 µA Test Conditions: V+ = +3.0V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5), Unless Otherwise Specified TEST CONDITIONS TEMP (°C) MIN (NOTE 6) TYP MAX (NOTE 6) UNITS Full 0 - V+ V ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG V+ = 3V, ICOM = 1.0mA, VNO or VNC = 1.5V See Figure 5 25 - 51 60 Ω Full - - 70 Ω RON Matching Between Channels, ∆RON V+ = 3V, ICOM = 1.0mA, VNO or VNC = 1.5V 25 - 0.5 3 Ω Full - - 4 Ω RON Flatness, RFLAT(ON) V+ = 3V, ICOM = 1.0mA, VNO or VNC = 0.5V, 1.5V, Note 8 Ω ON Resistance, RON 25 - 12 17 Full - - 17 Ω NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) V+ = 3.6V, VCOM = 1V, 3V, VNO or VNC = 3V, 1V, Note 7 25 -0.1 - 0.1 nA Full -2.5 - 2.5 nA COM OFF Leakage Current, ICOM(OFF) V+ = 3.6V, VCOM = 1V, 3V, VNO or VNC = 3V, 1V, Note 7 25 -0.1 - 0.1 nA Full -2.5 - 2.5 nA COM ON Leakage Current, ICOM(ON) V+ = 3.6V, VCOM = VNO or VNC = 1V, 3V, Note 7 25 -0.2 - 0.2 nA Full -5 - 5 nA Input Voltage High, VINH Full 2.4 1.0 - V Input Voltage Low, VINL Full - 0.9 0.8 V V+ = 3.6V, VIN = 0V or V+ Full -1 - 1 µA V+ = 3.0V, VNO or VNC = 1.5V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V, See Figure 1 25 - 120 138 ns Full - - 160 ns 25 - 50 60 ns DIGITAL INPUT CHARACTERISTICS Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF V+ = 3.0V, VNO or VNC = 1.5V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V, See Figure 1 Break-Before-Make Time Delay (ISL43145 only), tD V+ = 3.6V, VNO or VNC = 1.5V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V, See Figure 3 Charge Injection, Q CL = 1.0nF, VG = 0V, RG = 0Ω, See Figure 2 Full - - 65 ns Full 30 60 - ns 25 - 1 2 pC NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 25 - 10 - pF COM OFF Capacitance, CCOM(OFF) f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 25 - 26 - pF COM ON Capacitance, CCOM(ON) f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 25 - 34 - pF 6 FN6037.3 December 1, 2005 ISL43143, ISL43144, ISL43145 Electrical Specifications: 3.3V Supply PARAMETER Test Conditions: V+ = +3.0V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5), Unless Otherwise Specified (Continued) TEST CONDITIONS OFF Isolation TEMP (°C) MIN (NOTE 6) TYP MAX (NOTE 6) UNITS RL = 50Ω, CL = 15pF, f = 1MHz, VNO or VNC = 1VRMS, See Figures 4 and 6 25 - 71 - dB Crosstalk, Note 9 25 - -89 - dB Power Supply Rejection Ratio RL = 50Ω, CL = 5pF, f = 1MHz 25 - 58 - dB POWER SUPPLY CHARACTERISTICS V+ = 3.6V, VIN = 0V or V+, Switch On or Off Positive Supply Current, I+ Negative Supply Current, I- Electrical Specifications: 12V Supply PARAMETER 25 -1 0.01 1 µA Full -1 - 1 µA 25 -1 0.01 1 µA Full -1 - 1 µA Test Conditions: V+ = +10.8V to +13.2V, V- = GND = 0V, VINH = 3.0V, VINL = 0.8V (Note 5), Unless Otherwise Specified TEST CONDITIONS TEMP (°C) MIN (NOTE 6) Full 0 - V+ V 25 - 14 20 Ω Full - - 30 Ω Ω TYP MAX (NOTE 6) UNITS ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 9V See Figure 5 RON Matching Between Channels, ∆RON V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 9V RON Flatness, RFLAT(ON) V+ = 13.2V, ICOM = 1.0mA, VNO or VNC = 3V, 6V, 9V, Note 8 NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) V+ = 13V, VCOM = 1V, 12V, VNO or VNC = 12V, 1V, Note 7 COM OFF Leakage Current, ICOM(OFF) V+ = 13V, VCOM = 1V, 12V, VNO or VNC = 12V, 1V, Note 7 COM ON Leakage Current, ICOM(ON) V+ = 13V, VCOM = VNO or VNC = 1V, 12V, Note 7 25 - 0.3 2 Full - - 4 Ω 25 - 1.7 2 Ω Full - - 3 Ω 25 -0.1 - 0.1 nA Full -2.5 - 2.5 nA 25 -0.1 - 0.1 nA Full -2.5 - 2.5 nA 25 -0.2 - 0.2 nA Full -5 - 5 nA Input Voltage High, VINH Full 3.2 2.8 - V Input Voltage Low, VINL Full - 2.2 0.8 V V+ = 13V, VIN = 0V or V+ Full -1 - 1 µA Turn-ON Time, tON V+ = 10.8V, VNO or VNC = 10V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V, See Figure 1 25 - 40 50 ns Turn-OFF Time, tOFF V+ = 10.8V, VNO or VNC = 10V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V, See Figure 1 DIGITAL INPUT CHARACTERISTICS Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Break-Before-Make Time Delay (ISL43145 only), tD V+ = 13.2V, VNO or VNC = 10V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V, See Figure 3 Charge Injection, Q CL = 1.0nF, VG = 0V, RG = 0Ω, See Figure 2 Full - - 83 ns 25 - 27 35 ns Full - - 40 ns Full 5 20 - ns 25 - 12 14 pC NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 25 - 10 - pF COM OFF Capacitance, CCOM(OFF) f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 25 - 26 - pF COM ON Capacitance, CCOM(ON) f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 25 - 34 - pF OFF Isolation RL = 50Ω, CL = 15pF, f = 1MHz, VNO or VNC = 1VRMS, See Figures 4 and 6 25 - 71 - dB Crosstalk, Note 9 25 - -89 - dB Power Supply Rejection Ratio RL = 50Ω, CL = 5pF, f = 1MHz 25 - 58 - dB 7 FN6037.3 December 1, 2005 ISL43143, ISL43144, ISL43145 Electrical Specifications: 12V Supply Test Conditions: V+ = +10.8V to +13.2V, V- = GND = 0V, VINH = 3.0V, VINL = 0.8V (Note 5), Unless Otherwise Specified (Continued) PARAMETER TEST CONDITIONS TEMP (°C) MIN (NOTE 6) TYP MAX (NOTE 6) UNITS POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ V+ = 13V, VIN = 0V or V+, Switch On or Off µA 25 -1 0.01 1 Full -1 - 1 µA 25 -1 0.01 1 µA Full -1 - 1 µA Negative Supply Current, I- Test Circuits and Waveforms 3V LOGIC INPUT V+ tr < 20ns tf < 20ns 50% 0V C SWITCH INPUT tOFF VOUT NO or NC VNX SWITCH VNX INPUT C COM VOUT IN 90% 90% 0V LOGIC INPUT tON C V- Logic input waveform is inverted for switches that have the opposite logic sense. CL 35pF RL 300Ω GND SWITCH OUTPUT Repeat test for all switches. CL includes fixture and stray capacitance. RL V OUT = V (NO or NC) -----------------------------R L + R ( ON ) FIGURE 1B. TEST CIRCUIT FIGURE 1A. MEASUREMENT POINTS FIGURE 1. SWITCHING TIMES V+ SWITCH OUTPUT VOUT ∆VOUT RG C VOUT NO or NC COM 3V LOGIC INPUT ON ON VG OFF GND 0V C Q = ∆VOUT x CL V- Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 2A. MEASUREMENT POINTS IN CL LOGIC INPUT Repeat test for all switches. CL includes fixture and stray capacitance. FIGURE 2B. TEST CIRCUIT FIGURE 2. CHARGE INJECTION 8 FN6037.3 December 1, 2005 ISL43143, ISL43144, ISL43145 Test Circuits and Waveforms (Continued) V+ 3V C C LOGIC INPUT 0V VOUT1 NO1 VNX COM1 VOUT2 RL1 300Ω NC2 90% 90% SWITCH OUTPUT VOUT1 COM2 IN1 RL2 300Ω 0V IN2 90% SWITCH OUTPUT VOUT2 0V 90% LOGIC INPUT CL2 35pF GND tD tD CL1 35pF C V- CL includes fixture and stray capacitance. Reconfigure accordingly to test SW3 and SW4. FIGURE 3B. TEST CIRCUIT FIGURE 3A. MEASUREMENT POINTS FIGURE 3. BREAK-BEFORE-MAKE TIME (ISL43145 ONLY) V+ V+ C C RON = V1/1mA SIGNAL GENERATOR NO or NC NO or NC VNX 0V or 2.4V IN 1mA COM ANALYZER 0.8V or 2.4V IN V1 COM GND GND RL C C V- V- Repeat test for all switches. Repeat test for all switches. FIGURE 4. OFF ISOLATION TEST CIRCUIT FIGURE 5. RON TEST CIRCUIT V+ V+ C SIGNAL GENERATOR NO1 or NC1 50Ω COM1 NO or NC IN2 IN2 0V or 2.4V COM2 ANALYZER 0V or 2.4V IN 0V or 2.4V NO CONNECTION NO2 or NC2 GND IMPEDANCE ANALYZER COM GND RL C V- FIGURE 6. CROSSTALK TEST CIRCUIT 9 V- FIGURE 7. CAPACITANCE TEST CIRCUIT FN6037.3 December 1, 2005 ISL43143, ISL43144, ISL43145 Detailed Description Power-Supply Considerations The ISL43143–ISL43145 quad analog switches offer precise switching capability from a bipolar ±2V to ±6V or a single 2V to 12V supply with low on-resistance (18Ω) and high speed switching (tON = 52ns, tOFF = 40ns). The devices are especially well suited for portable battery powered equipment thanks to the low operating supply voltage (2V), low power consumption (1µW), low leakage currents (5nA max). High frequency applications also benefit from the wide bandwidth, and the very high OFF isolation and crosstalk rejection. The ISL4314X construction is typical of most CMOS analog switches, in that they have three supply pins: V+, V-, and GND. V+ and V- drive the internal CMOS switches and set their analog voltage limits, so there are no connections between the analog signal path and GND. Unlike switches with a 13V maximum supply voltage, the ISL4314X 15V maximum supply voltage provides plenty of room for the 10% tolerance of 12V supplies (±6V or 12V single supply), as well as room for overshoot and noise spikes. Supply Sequencing And Overvoltage Protection As with any CMOS device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the IC. All I/O pins contain ESD protection diodes from the pin to V+ and to V- (see Figure 8). To prevent forward biasing these diodes, V+ and V- must be applied before any input signals, and input signal voltages must remain between V+ and V-. If these conditions cannot be guaranteed, then one of the following two protection methods should be employed. Logic inputs can easily be protected by adding a 1kΩ resistor in series with the input (see Figure 8). The resistor limits the input current below the threshold that produces permanent damage, and the sub-microamp input current produces an insignificant voltage drop during normal operation. Adding a series resistor to the switch input defeats the purpose of using a low RON switch, so two small signal diodes can be added in series with the supply pins to provide overvoltage protection for all pins (see Figure 8). These additional diodes limit the analog signal from 1V below V+ to 1V above V-. The low leakage current performance is unaffected by this approach, but the switch resistance may increase, especially at low supply voltages. OPTIONAL PROTECTION DIODE V+ OPTIONAL PROTECTION RESISTOR INX This family of switches performs equally well when operated with bipolar or single voltage supplies, and bipolar supplies need not be symmetrical. The minimum recommended supply voltage is 2V or ±2V. It is important to note that the input signal range, switching times, and ON-resistance degrade at lower supply voltages. Refer to the electrical specification tables and Typical Performance Curves for details. V+ and GND power the internal logic (thus setting the digital switching point) and level shifters. The level shifters convert the logic levels to switched V+ and V- signals to drive the analog switch gate terminals, so switch parameters especially RON - are strong functions of both supplies. Logic-Level Thresholds V+ and GND power the internal logic stages, so V- has no affect on logic thresholds. This switch family is TTL compatible (0.8V and 2.4V) over a V+ supply range of 2.5V to 10V (see Figure 17). At 12V the VIH level is about 2.8V, so for best results use a logic family the provides a VOH greater than 3V. The digital input stages draw supply current whenever the digital input voltage is not at one of the supply rails (see Figure 18). Driving the digital input signals from GND to V+ with a fast transition time minimizes power dissipation. The ISL43143-ISL43145 switches have been designed to minimize the supply current whenever the digital input voltage is not driven to the supply rails (0V to V+). For example driving the device with 3V logic while operating with dual or single 5V supplies the device draws only 10µA of current (see Figure 18 for VIN = 3V). Similiar devices of competitors can draw 8 times this amount of current. High-Frequency Performance VNO or NC VCOM In 50Ω systems, signal response is reasonably flat even past 200MHz (see Figure 19). Figure 19 also illustrates that the frequency response is very consistent over a wide V+ range, and for varying analog signal levels. OPTIONAL PROTECTION DIODE An off switch acts like a capacitor and passes higher frequencies with less attenuation, resulting in signal feedthrough from a switch’s input to its output. OFF Isolation is the resistance to this feedthrough, while Crosstalk indicates the amount of feedthrough from one switch to another. Figure 20 details the high OFF Isolation and V- FIGURE 8. OVERVOLTAGE PROTECTION 10 FN6037.3 December 1, 2005 ISL43143, ISL43144, ISL43145 Crosstalk rejection provided by this family. At 10MHz, OFF isolation is about 50dB in 50Ω systems, decreasing approximately 20dB per decade as frequency increases. Higher load impedances decrease OFF Isolation and Crosstalk rejection due to the voltage divider action of the switch OFF impedance and the load impedance. Leakage Considerations Reverse ESD protection diodes are internally connected between each analog-signal pin and both V+ and V-. One of these diodes conducts if any analog signal exceeds V+ or V-. Virtually all the analog leakage current comes from the ESD diodes to V+ or V-. Although the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either V+ or V- and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the V+ and V- pins constitutes the analog-signalpath leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of the same or opposite polarity. There is no connection between the analog signal paths and GND. Typical Performance Curves TA = 25°C, Unless Otherwise Specified 25 V- = -5V 85°C 20 15 25°C -40°C 85°C 25°C -40°C 5 6 7 8 V+ (V) 9 10 11 12 13 45 25°C 85°C 25 25°C 20 -40°C 85°C V+ = 5V V- = 0V V+ = 12V 25°C V- = 0V -40°C 0 1 2 3 4 5 6 7 VCOM (V) 8 25°C 25 11 12 10 V+ = 12V -40°C 20 35 VS = ±3V 85°C 25 25°C 20 10 25 VS = ±5V 85°C VS = ±5V V+ = 3V 0 -40°C 15 V+ = 5V 5 Q (pC) 30 25°C 10 85°C 30 20 9 15 VS = ±2V ICOM = 1mA 35 RON (Ω) -40°C ICOM = 1mA V- = 0V FIGURE 10. ON RESISTANCE vs SWITCH VOLTAGE FIGURE 9. ON RESISTANCE vs POSITIVE SUPPLY VOLTAGE 40 30 15 20 18 16 14 12 10 8 V- = 0V 4 85°C 30 RON (Ω) RON (Ω) 85°C 3 50 40 20 35 V- = -3V 2 V+ = 3V 60 25°C -40°C 10 35 30 25 20 15 10 200 150 125 100 75 50 25 0 70 VCOM = (V+) - 1V ICOM = 1mA -5 15 -40°C 10 -10 5 -5 -4 -3 -2 -1 0 1 2 3 4 VCOM (V) FIGURE 11. ON RESISTANCE vs SWITCH VOLTAGE 11 5 -5 -2.5 0 2.5 5 VCOM (V) 7.5 10 12.5 FIGURE 12. CHARGE INJECTION vs SWITCH VOLTAGE FN6037.3 December 1, 2005 ISL43143, ISL43144, ISL43145 Typical Performance Curves TA = 25°C, Unless Otherwise Specified (Continued) 50 300 VCOM = (V+) - 1V VCOM = (V+) - 1V V- = 0V V- = 0V 250 40 tOFF (ns) tON (ns) 200 85°C 150 25°C 85°C 30 25°C 100 20 -40°C -40°C 50 0 10 2 3 4 5 6 7 8 9 10 11 12 2 3 4 5 6 7 V+ (V) 8 9 10 11 12 V+ (V) FIGURE 13. TURN - ON TIME vs POSITIVE SUPPLY VOLTAGE FIGURE 14. TURN - OFF TIME vs POSITIVE SUPPLY VOLTAGE 150 300 200 VCOM = (V+) - 1V V- = -5V -40°C 250 -40°C 100 25°C VCOM = (V+) - 1V V- = -5V 25°C 150 25°C 100 85°C tOFF (ns) 85°C 50 tON (ns) 25°C 50 -40°C 0 250 V- = -3V 200 -40°C 0 300 V- = -3V 250 -40°C -40°C 200 150 150 100 25°C 50 -40°C 0 2 25°C 100 85°C 50 3 4 5 6 7 V+ (V) 8 9 10 11 FIGURE 15. TURN - ON TIME vs POSITIVE SUPPLY VOLTAGE 85°C 0 12 2 3 4 5 6 7 V+ (V) 8 9 11 12 FIGURE 16. TURN - OFF TIME vs POSITIVE SUPPLY VOLTAGE 3.0 70 VINH V- = -5V to 0V V+ = +5V -40°C 2.5 25°C 60 2.0 85°C 1.5 50 1.0 V- = 0V to -5V I+CC (µA) VINH AND VINL (V) 10 0.5 3.0 VINL 2.5 40 30 -40°C 20 25°C 2.0 1.5 10 1.0 85°C V- = 0V to -5V 0.5 2 3 4 5 6 7 8 V+ (V) 9 10 11 FIGURE 17. DIGITAL SWITCHING POINT vs POSITIVE SUPPLY VOLTAGE 12 12 13 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VIN (V) FIGURE 18. POSITIVE SUPPLY CURRENT vs DIGITAL INPUT VOLTAGE FN6037.3 December 1, 2005 ISL43143, ISL43144, ISL43145 -10 VS = ±2V or V+ = 5V (VIN = 4VP-P) 0 VS = ±5V (VIN = 5VP-P) GAIN -3 VS = ±2V (VIN = 4VP-P) V+ = 5V (VIN = 4VP-P) VS = ±5V (VIN = 5VP-P) V+ = 2.7V (VIN = 2VP-P) 45 90 135 180 PHASE (DEGREES) 0 PHASE RL = 50Ω 1 10 100 600 40 -50 50 -60 60 ISOLATION -70 70 -80 80 CROSSTALK -90 90 ALL HOSTILE CROSSTALK -100 100 -110 1k 10k 100k 1M 10M 110 100M 500M FREQUENCY (Hz) FIGURE 19. FREQUENCY RESPONSE FIGURE 20. CROSSTALK AND OFF ISOLATION V+ = 3V to 12V or VS = ±2V to ±5V RL = 50Ω Die Characteristics SUBSTRATE POTENTIAL (POWERED UP): VIN = 1VP-P V- 10 PSRR (dB) 30 -40 FREQUENCY (MHz) 0 20 OFF ISOLATION (dB) V+ = 2.7V (VIN = 2VP-P) 3 10 V+ = 3V to 12V or -20 VS = ±2V to ±5V RL = 50Ω -30 CROSSTALK (dB) NORMALIZED GAIN (dB) Typical Performance Curves TA = 25°C, Unless Otherwise Specified (Continued) TRANSISTOR COUNT: 20 ISL43143: 209 ISL43144: 209 ISL43145: 209 30 -PSRR, SWITCH ON 40 PROCESS: 50 -PSRR, SWITCH OFF Si Gate CMOS 60 +PSRR, SWITCH OFF 70 +PSRR, SWITCH ON 0.3 1 10 100 FREQUENCY (MHz) 1000 FIGURE 21. ±PSRR vs FREQUENCY 13 FN6037.3 December 1, 2005 ISL43143, ISL43144, ISL43145 Quad Flat No-Lead Plastic Package (QFN) Micro Lead Frame Plastic Package (MLFP) L16.4x4 16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220-VGGC ISSUE C) MILLIMETERS SYMBOL MIN NOMINAL MAX NOTES A 0.80 0.90 1.00 - A1 - - 0.05 - A2 - - 1.00 9 A3 b 0.20 REF 0.23 D 0.35 5, 8 4.00 BSC D1 D2 0.28 9 - 3.75 BSC 1.95 2.10 9 2.25 7, 8 E 4.00 BSC - E1 3.75 BSC 9 E2 1.95 e 2.10 2.25 7, 8 0.65 BSC - k 0.25 - - - L 0.50 0.60 0.75 8 L1 - - 0.15 10 N 16 2 Nd 4 3 Ne 4 3 P - - 0.60 9 θ - - 12 9 Rev. 5 5/04 NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. 2. N is the number of terminals. 3. Nd and Ne refer to the number of terminals on each D and E. 4. All dimensions are in millimeters. Angles are in degrees. 5. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 7. Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. 9. Features and dimensions A2, A3, D1, E1, P & θ are present when Anvil singulation method is used and not present for saw singulation. 10. Depending on the method of lead termination at the edge of the package, a maximum 0.15mm pull back (L1) maybe present. L minus L1 to be equal to or greater than 0.3mm. 14 FN6037.3 December 1, 2005 ISL43143, ISL43144, ISL43145 Thin Shrink Small Outline Plastic Packages (TSSOP) M16.173 N 16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE INDEX AREA E 0.25(0.010) M 2 INCHES E1 GAUGE PLANE -B1 B M MIN MAX MIN MAX NOTES A - 0.043 - 1.10 - 0.05 0.15 - 0.85 0.95 - A2 L 0.05(0.002) -A- SYMBOL A1 3 A D -C- e α c 0.10(0.004) C A M B S 0.002 0.037 0.0075 0.012 0.19 0.30 9 c 0.0035 0.008 0.09 0.20 - D 0.193 0.201 4.90 5.10 3 E1 0.169 0.177 4.30 4.50 4 0.026 BSC E 0.246 L 0.020 N α NOTES: 0.006 0.033 b e A2 A1 b 0.10(0.004) M 0.25 0.010 SEATING PLANE MILLIMETERS 0.65 BSC 0.256 6.25 0.028 0.50 16 0o 6.50 0.70 16 8o 0o 6 7 8o 1. These package dimensions are within allowable dimensions of JEDEC MO-153-AB, Issue E. Rev. 1 2/02 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E1” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “b” does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. (Angles in degrees) All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 15 FN6037.3 December 1, 2005