LTC1772 Constant Frequency Current Mode Step-Down DC/DC Controller in SOT-23 U DESCRIPTIO FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ The LTC®1772 is a constant frequency current mode stepdown DC/DC controller providing excellent AC and DC load and line regulation. The device incorporates an accurate undervoltage lockout feature that shuts down the LTC1772 when the input voltage falls below 2.0V. High Efficiency: Up to 94% High Output Currents Easily Achieved Wide VIN Range: 2.5V to 9.8V Constant Frequency 550kHz Operation Burst Mode® Operation at Light Load Low Dropout: 100% Duty Cycle Tiny 6-Lead SOT-23 Package 0.8V Reference Allows Low Output Voltages Current Mode Operation for Excellent Line and Load Transient Response Low Quiescent Current: 270µA Shutdown Mode Draws Only 8µA Supply Current ±2.5% Reference Accuracy The LTC1772 provides a ±2.5% output voltage accuracy and consumes only 270µA of quiescent current. For applications where efficiency is a prime consideration, the LTC1772 is configured for Burst Mode operation, which enhances efficiency at low output current. To further maximize the life of a battery source, the external P-channel MOSFET is turned on continuously in dropout (100%dutycycle).In shutdown, the device draws a mere 8µA. High constant operating frequency of 550kHz allows the use of a small external inductor. U APPLICATIO S ■ ■ ■ ■ ■ ■ One or Two Lithium-Ion-Powered Applications Cellular Telephones Wireless Modems Portable Computers Distributed 3.3V, 2.5V or 1.8V Power Systems Scanners The LTC1772 is available in a small footprint 6-lead SOT-23. , LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. U TYPICAL APPLICATIO C1 10µF 10V 1 ITH/RUN PGATE 6 2 220pF 3 GND VFB VIN SENSE – C1: TAIYO YUDEN LMK325BJ106K-T C2A: SANYO 6TPA47M C2B: AVX 0805ZC105KAT1A D1: MOTOROLA MBRM120T3 L1: MURATA LQN6C-4R7 M1: FAIRCHILD FDC638P R1: IRC LRC-LR1206-01-R030F 5 4 D1 + C2A 47µF 6V VIN = 3.3V 90 L1 M1 4.7µH LTC1772 10k 100 C2B 1µF 10V VOUT 2.5V 2A 174k 80.6k EFFICIENCY (%) R1 0.03Ω Efficiency vs Load Current VIN 2.5V TO 9.8V VIN = 4.2V 80 VIN = 6V 70 VIN = 9.8V VIN = 8.4V 60 50 VOUT = 2.5V 40 1772 F01a 1 10 100 1000 LOAD CURRENT (mA) 10000 1772 F01b Figure 1. High Efficiency, High Output Current 2.5V/2A Regulator 1772fb 1 LTC1772 W U PACKAGE/ORDER INFORMATION U W W W (Note 1) Input Supply Voltage (VIN).........................– 0.3V to 10V SENSE–, PGATE Voltages ............. – 0.3V to (VIN + 0.3V) VFB, ITH /RUN Voltages .............................– 0.3V to 2.4V PGATE Peak Output Current (<10µs) ......................... 1A Storage Ambient Temperature Range ... – 65°C to 150°C Operating Temperature Range LTC1772CS6 ........................................... 0°C to 70°C LTC1772ES6 (Note 2) ........................ – 40°C to 85°C LTC1772IS6 (Note 2) ......................... – 40°C to 85°C LTC1772HS6 (Notes 2,3) ................. – 40°C to 140°C Junction Temperature (Note 3) ............................. 150°C Lead Temperature (Soldering, 10 sec).................. 300°C U ABSOLUTE MAXIMUM RATINGS TOP VIEW ITH/RUN 1 GND 2 VFB 3 6 PGATE 5 VIN 4 SENSE – ORDER PART NUMBER LTC1772CS6 LTC1772ES6 LTC1772IS6 LTC1772HS6 S6 PART MARKING S6 PACKAGE 6-LEAD PLASTIC SOT-23 θJA = 230°C/ W LTIL LTIM LTB7 LTBRY Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 4.2V unless otherwise specified. (Note 2) PARAMETER CONDITIONS Input DC Supply Current Normal Operation Sleep Mode Shutdown UVLO Typicals at VIN = 4.2V (Note 4) 2.4V ≤ VIN ≤ 9.8V 2.4V ≤ VIN ≤ 9.8V 2.4V ≤ VIN ≤ 9.8V, VITH /RUN = 0V VIN < UVLO Threshold MIN TYP MAX UNITS 270 230 8 6 420 370 22 10 µA µA µA µA Undervoltage Lockout Threshold VIN Falling (LTC1772C) VIN Falling (LTC1772E, LTC1772I, LTC1772H) VIN Rising ● ● 1.60 1.55 1.85 2.00 2.00 2.10 2.30 2.35 2.40 V V V Shutdown Threshold (at ITH /RUN) (LTC1772C) (LTC1772E, LTC1772I, LTC1772H) ● ● 0.20 0.15 0.35 0.35 0.50 0.55 V V Start-Up Current Source VITH/RUN = 0V Regulated Feedback Voltage (Note 5) (LTC1772C) (Note 5) (LTC1772E, LTC1772I, LTC1772H) 0.25 0.5 0.85 µA ● ● 0.780 0.770 0.800 0.800 0.820 0.830 V V Output Voltage Line Regulation 2.4V ≤ VIN ≤ 9.8V (Note 5) 0.05 mV/V Output Voltage Load Regulation ITH/RUN Sinking 5µA (Note 5) ITH/RUN Sourcing 5µA (Note 5) 2.5 2.5 mV/µA mV/µA VFB Input Current (Note 5) Overvoltage Protect Threshold Measured at VFB 0.820 Overvoltage Protect Hysteresis 10 50 nA 0.860 0.895 V 20 500 550 120 mV Oscillator Frequency VFB = 0.8V VFB = 0V Gate Drive Rise Time CLOAD = 3000pF Gate Drive Fall Time CLOAD = 3000pF 40 ns Peak Current Sense Voltage (Note 6) 120 mV 40 650 kHz kHz ns 1772fb 2 LTC1772 ELECTRICAL CHARACTERISTICS Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC1772E is guaranteed to meet specifications from 0°C to 70°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTC1772I is guaranteed to meet specified performance from –40°C to 85°C. The LTC1772H is guaranteed to meet specified performance from –40°C to 140°C. Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD • θJA°C/W) Operation at high junction temperatures degrades operating lifetimes. Operating lifetimes at junction temperatures greater than 125°C is derated to 1000 hours. Note 4: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. Note 5: The LTC1772 is tested in a feedback loop that servos VFB to the output of the error amplifier. Note 6: Peak current sense voltage is reduced dependent on duty cycle to a percentage of value as given in Figure 2. U W TYPICAL PERFOR A CE CHARACTERISTICS Reference Voltage vs Temperature 10 VIN = 4.2V 8 810 805 800 795 790 785 780 775 –55 –35 –15 5 25 45 65 85 105 125 145 TEMPERATURE (°C) 2.10 6 2.06 4 2.02 2 0 –2 –4 1.86 1.78 1.74 –55 –35 –15 5 25 45 65 85 105 125 145 TEMPERATURE (°C) 1772 G03 1772 G02 Shutdown Threshold vs Temperature 550 VIN = 4.2V TA = 25°C 120 1.90 –8 Maximum (VIN – SENSE –) Voltage vs Duty Cycle 130 1.94 1.82 –10 –55 –35 –15 5 25 45 65 85 105 125 145 TEMPERATURE (°C) VIN FALLING 1.98 –6 1772 G01 510 VIN = 4.2V 470 110 TRIP VOLTAGE (V) TRIP VOLTAGE (mV) VFB VOLTAGE (mV) 815 2.14 VIN = 4.2V TRIP VOLTAGE (V) 820 NORMALIZED FREQUENCY (%) 825 Undervoltage Lockout Trip Voltage vs Temperature Normalized Frequency vs Temperature 100 90 80 70 430 390 350 310 270 230 60 50 190 20 30 40 50 60 70 80 DUTY CYCLE (%) 90 100 1772 G04 150 –55 –35 –15 5 25 45 65 85 105 125 145 TEMPERATURE (°C) 1772 G05 1772fb 3 LTC1772 U U U PIN FUNCTIONS ITH/RUN (Pin 1): This pin performs two functions. It serves as the error amplifier compensation point as well as the run control input. The current comparator threshold increases with this control voltage. Nominal voltage range for this pin is 0.7V to 1.9V. Forcing this pin below 0.35V causes the device to be shut down. In shutdown all functions are disabled and the PGATE pin is held high. VFB (Pin 3): Receives the feedback voltage from an external resistive divider across the output. SENSE – (Pin 4): The Negative Input to the Current Comparator. VIN (Pin 5): Supply Pin. Must be closely decoupled to GND Pin 2. PGATE (Pin 6): Gate Drive for the External P-Channel MOSFET. This pin swings from 0V to VIN. GND (Pin 2): Ground Pin. W FUNCTIONAL DIAGRA U VIN SENSE – 5 4 U + ICMP – VIN RS1 SLOPE COMP OSC PGATE SWITCHING LOGIC AND BLANKING CIRCUIT R Q S 6 – FREQ FOLDBACK + SHORT-CIRCUIT DETECT 0.3V OVP BURST CMP + 0.15V SLEEP – VIN EAMP + – VREF + 60mV + VREF 0.8V 0.5µA VFB + – 1 ITH/RUN 3 VIN VIN 0.3V – 0.35V VOLTAGE REFERENCE + SHDN CMP VREF 0.8V – GND SHDN UV 2 UNDERVOLTAGE LOCKOUT 1.2V 1772 FD 1772fb 4 LTC1772 U OPERATIO (Refer to Functional Diagram) Main Control Loop The LTC1772 is a constant frequency current mode switching regulator. During normal operation, the external P-channel power MOSFET is turned on each cycle when the oscillator sets the RS latch (RS1) and turned off when the current comparator (ICMP) resets the latch. The peak inductor current at which ICMP resets the RS latch is controlled by the voltage on the ITH/RUN pin, which is the output of the error amplifier EAMP. An external resistive divider connected between VOUT and ground allows the EAMP to receive an output feedback voltage VFB. When the load current increases, it causes a slight decrease in VFB relative to the 0.8V reference, which in turn causes the ITH/RUN voltage to increase until the average inductor current matches the new load current. The main control loop is shut down by pulling the ITH/RUN pin low. Releasing ITH/RUN allows an internal 0.5µA current source to charge up the external compensation network. When the ITH/RUN pin reaches 0.35V, the main control loop is enabled with the ITH/RUN voltage then pulled up to its zero current level of approximately 0.7V. As the external compensation network continues to charge up, the corresponding output current trip level follows, allowing normal operation. Comparator OVP guards against transient overshoots > 7.5% by turning off the external P-channel power MOSFET and keeping it off until the fault is removed. Burst Mode Operation The LTC1772 enters Burst Mode operation at low load currents. In this mode, the peak current of the inductor is set as if VITH/RUN = 1V (at low duty cycles) even though the voltage at the ITH/RUN pin is at a lower value. If the inductor’s average current is greater than the load requirement, the voltage at the ITH/RUN pin will drop. When the ITH/RUN voltage goes below 0.85V, the sleep signal goes high, turning off the external MOSFET. The sleep signal goes low when the ITH/RUN voltage goes above 0.925V and the LTC1772 resumes normal operation. The next oscillator cycle will turn the external MOSFET on and the switching cycle repeats. Dropout Operation When the input supply voltage decreases towards the output voltage, the rate of change of inductor current during the ON cycle decreases. This reduction means that the external P-channel MOSFET will remain on for more than one oscillator cycle since the inductor current has not ramped up to the threshold set by EAMP. Further reduction in input supply voltage will eventually cause the P-channel MOSFET to be turned on 100%, i.e., DC. The output voltage will then be determined by the input voltage minus the voltage drop across the MOSFET, the sense resistor and the inductor. Undervoltage Lockout To prevent operation of the P-channel MOSFET below safe input voltage levels, an undervoltage lockout is incorporated into the LTC1772. When the input supply voltage drops below approximately 2.0V, the P-channel MOSFET and all circuitry is turned off except the undervoltage block, which draws only several microamperes. Short-Circuit Protection When the output is shorted to ground, the frequency of the oscillator will be reduced to about 120kHz. This lower frequency allows the inductor current to safely discharge, thereby preventing current runaway. The oscillator’s frequency will gradually increase to its designed rate when the feedback voltage again approaches 0.8V. Overvoltage Protection As a further protection, the overvoltage comparator in the LTC1772 will turn the external MOSFET off when the feedback voltage has risen 7.5% above the reference voltage of 0.8V. This comparator has a typical hysteresis of 20mV. 1772fb 5 LTC1772 U OPERATIO (Refer to Functional Diagram) Slope Compensation and Inductor’s Peak Current 110 100 The inductor’s peak current is determined by: VITH – 0.7 10(RSENSE ) when the LTC1772 is operating below 40% duty cycle. However, once the duty cycle exceeds 40%, slope compensation begins and effectively reduces the peak inductor current. The amount of reduction is given by the curves in Figure 2. SF = IOUT/IOUT(MAX) (%) IPK = 90 80 70 60 50 IRIPPLE = 0.4IPK AT 5% DUTY CYCLE IRIPPLE = 0.2IPK AT 5% DUTY CYCLE 40 30 20 VIN = 4.2V 10 0 10 20 30 40 50 60 70 80 90 100 DUTY CYCLE (%) 1772 F02 Figure 2. Maximum Output Current vs Duty Cycle U W U U APPLICATIONS INFORMATION The basic LTC1772 application circuit is shown in Figure 1. External component selection is driven by the load requirement and begins with the selection of L1 and RSENSE (= R1). Next, the power MOSFET, M1 and the output diode D1 are selected followed by CIN (= C1) and COUT (= C2). RSENSE Selection for Output Current RSENSE is chosen based on the required output current. With the current comparator monitoring the voltage developed across RSENSE, the threshold of the comparator determines the inductor’s peak current. The output current the LTC1772 can provide is given by: IOUT = 0.12 I − RIPPLE RSENSE 2 where IRIPPLE is the inductor peak-to-peak ripple current (see Inductor Value Calculation section). A reasonable starting point for setting ripple current is IRIPPLE = (0.4)(IOUT). Rearranging the above equation, it becomes: RSENSE = 1 for Duty Cycle < 40% (10)(IOUT ) However, for operation that is above 40% duty cycle, slope compensation effect has to be taken into consideration to select the appropriate value to provide the required amount of current. Using Figure 2, the value of RSENSE is: RSENSE = SF (10)(IOUT )(100) Inductor Value Calculation The operating frequency and inductor selection are interrelated in that higher operating frequencies permit the use of a smaller inductor for the same amount of inductor ripple current. However, this is at the expense of efficiency due to an increase in MOSFET gate charge losses. The inductance value also has a direct effect on ripple current. The ripple current, IRIPPLE, decreases with higher inductance or frequency and increases with higher VIN or VOUT. The inductor’s peak-to-peak ripple current is given by: IRIPPLE = VIN − VOUT ⎛ VOUT + VD ⎞ ⎜ ⎟ f(L) ⎝ VIN + VD ⎠ 1772fb 6 LTC1772 U W U U APPLICATIONS INFORMATION where f is the operating frequency. Accepting larger values of IRIPPLE allows the use of low inductances, but results in higher output voltage ripple and greater core losses. A reasonable starting point for setting ripple current is IRIPPLE = 0.4(IOUT(MAX)). Remember, the maximum IRIPPLE occurs at the maximum input voltage. In Burst Mode operation on the LTC1772, the ripple current is normally set such that the inductor current is continuous during the burst periods. Therefore, the peakto-peak ripple current must not exceed: 0.03 IRIPPLE ≤ RSENSE This implies a minimum inductance of: LMIN = VIN − VOUT ⎛ VOUT + VD ⎞ ⎜ ⎟ ⎛ 0.03 ⎞ ⎝ VIN + VD ⎠ f⎜ ⎟ ⎝ RSENSE ⎠ (Use VIN(MAX) = VIN) A smaller value than L MIN could be used in the circuit; however, the inductor current will not be continuous during burst periods. Inductor Core Selection Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite, molypermalloy or Kool Mµ® cores. Actual core loss is independent of core size for a fixed inductor value, but it is very dependent on inductance selected. As inductance increases, core losses go down. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates “hard,” which means that inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Molypermalloy (from Magnetics, Inc.) is a very good, low loss core material for toroids, but it is more expensive than ferrite. A reasonable compromise from the same manufacturer is Kool Mµ. Toroids are very space efficient, especially when you can use several layers of wire. Because they generally lack a bobbin, mounting is more difficult. However, new designs for surface mount that do not increase the height significantly are available. Power MOSFET Selection An external P-channel power MOSFET must be selected for use with the LTC1772. The main selection criteria for the power MOSFET are the threshold voltage VGS(TH) and the “on” resistance RDS(ON), reverse transfer capacitance CRSS and total gate charge. Since the LTC1772 is designed for operation down to low input voltages, a sublogic level threshold MOSFET (RDS(ON) guaranteed at VGS = 2.5V) is required for applications that work close to this voltage. When these MOSFETs are used, make sure that the input supply to the LTC1772 is less than the absolute maximum VGS rating, typically 8V. The required minimum RDS(ON) of the MOSFET is governed by its allowable power dissipation. For applications that may operate the LTC1772 in dropout, i.e., 100% duty cycle, at its worst case the required RDS(ON) is given by: RDS(ON) DC= 100% = PP (IOUT(MAX) )2 (1+ δp) where PP is the allowable power dissipation and δp is the temperature dependency of RDS(ON). (1 + δp) is generally given for a MOSFET in the form of a normalized RDS(ON) vs temperature curve, but δp = 0.005/°C can be used as an approximation for low voltage MOSFETs. In applications where the maximum duty cycle is less than 100% and the LTC1772 is in continuous mode, the RDS(ON) is governed by: RDS(ON) ≅ PP (DC )IOUT 2 (1+ δp) where DC is the maximum operating duty cycle of the LTC1772. 1772fb 7 LTC1772 U W U U APPLICATIONS INFORMATION Output Diode Selection The catch diode carries load current during the off-time. The average diode current is therefore dependent on the P-channel switch duty cycle. At high input voltages the diode conducts most of the time. As VIN approaches VOUT the diode conducts only a small fraction of the time. The most stressful condition for the diode is when the output is short-circuited. Under this condition the diode must safely handle IPEAK at close to 100% duty cycle. Therefore, it is important to adequately specify the diode peak current and average power dissipation so as not to exceed the diode ratings. Under normal load conditions, the average current conducted by the diode is: ⎛V −V ⎞ ID = ⎜ IN OUT ⎟ IOUT ⎝ VIN + VD ⎠ The allowable forward voltage drop in the diode is calculated from the maximum short-circuit current as: VF ≈ PD ISC(MAX) where PD is the allowable power dissipation and will be determined by efficiency and/or thermal requirements. A fast switching diode must also be used to optimize efficiency. Schottky diodes are a good choice for low forward drop and fast switching times. Remember to keep lead length short and observe proper grounding (see Board Layout Checklist) to avoid ringing and increased dissipation. CIN and COUT Selection In continuous mode, the source current of the P-channel MOSFET is a square wave of duty cycle (VOUT + VD)/ (VIN + VD). To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: 1/ 2 VOUT (VIN − VOUT )] [ CIN Required IRMS ≈ IMAX VIN This formula has a maximum value at VIN = 2VOUT, where IRMS = IOUT /2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that capacitor manufacturer’s ripple current ratings are often based on 2000 hours of life. This makes it advisable to further derate the capacitor, or to choose a capacitor rated at a higher temperature than required. Several capacitors may be paralleled to meet the size or height requirements in the design. Due to the high operating frequency of the LTC1772, ceramic capacitors can also be used for CIN. Always consult the manufacturer if there is any question. The selection of COUT is driven by the required effective series resistance (ESR). Typically, once the ESR requirement is satisfied, the capacitance is adequate for filtering. The output ripple (∆VOUT) is approximated by: ⎛ 1 ⎞ ∆VOUT ≈ IRIPPLE ⎜ ESR + ⎟ ⎝ 4 fC OUT ⎠ where f is the operating frequency, COUT is the output capacitance and IRIPPLE is the ripple current in the inductor. The output ripple is highest at maximum input voltage since ∆IL increases with input voltage. Manufacturers such as Nichicon, United Chemicon and Sanyo should be considered for high performance throughhole capacitors. The OS-CON semiconductor dielectric capacitor available from Sanyo has the lowest ESR (size) product of any aluminum electrolytic at a somewhat higher price. Once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. In surface mount applications, multiple capacitors may have to be paralleled to meet the ESR or RMS current handling requirements of the application. Aluminum electrolytic and dry tantalum capacitors are both available in surface mount configurations. In the case of tantalum, it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS, AVX TPSV and KEMET T510 series of surface mount tantalum, available in case heights ranging from 2mm to 4mm. Other capacitor types include Sanyo OS-CON, Nichicon PL series and Panasonic SP. 1772fb 8 LTC1772 U W U U APPLICATIONS INFORMATION Low Supply Operation Efficiency Considerations Although the LTC1772 can function down to approximately 2V, the maximum allowable output current is reduced when VIN decreases below 3V. Figure 3 shows the amount of change as the supply is reduced down to 2V. Also shown in Figure 3 is the effect of VIN on VREF as VIN goes below 2.3V. The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: where η1, η2, etc. are the individual losses as a percentage of input power. NORMALIZED VOLTAGE (%) 105 VREF 100 Although all dissipative elements in the circuit produce losses, four main sources usually account for most of the losses in LTC1772 circuits: 1) LTC1772 DC bias current, 2) MOSFET gate charge current, 3) I2R losses and 4) voltage drop of the output diode. VITH 95 90 85 80 75 2.0 2.2 2.4 2.6 2.8 INPUT VOLTAGE (V) 3.0 1772 F03 Figure 3. Line Regulation of VREF and VITH Setting Output Voltage The LTC1772 develops a 0.8V reference voltage between the feedback (Pin 3) terminal and ground (see Figure 4). By selecting resistor R1, a constant current is caused to flow through R1 and R2 to set the overall output voltage. The regulated output voltage is determined by: ⎛ R2⎞ VOUT = 0.8 ⎜ 1 + ⎟ ⎝ R1⎠ For most applications, an 80k resistor is suggested for R1. To prevent stray pickup, locate resistors R1 and R2 close to LTC1772. VOUT LTC1772 VFB Efficiency = 100% – (η1 + η2 + η3 + ...) R2 3 R1 1772 F04 Figure 4. Setting Output Voltage 1. The VIN current is the DC supply current, given in the electrical characteristics, that excludes MOSFET driver and control currents. VIN current results in a small loss which increases with VIN. 2. MOSFET gate charge current results from switching the gate capacitance of the power MOSFET. Each time a MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from VIN to ground. The resulting dQ/dt is a current out of VIN which is typically much larger than the DC supply current. In continuous mode, IGATECHG = f(Qp). 3. I2R losses are predicted from the DC resistances of the MOSFET, inductor and current shunt. In continuous mode the average output current flows through L but is “chopped” between the P-channel MOSFET (in series with RSENSE) and the output diode. The MOSFET RDS(ON) plus RSENSE multiplied by duty cycle can be summed with the resistances of L and RSENSE to obtain I2R losses. 4. The output diode is a major source of power loss at high currents and gets worse at high input voltages. The diode loss is calculated by multiplying the forward voltage times the diode duty cycle multiplied by the load current. For example, assuming a duty cycle of 50% with a Schottky diode forward voltage drop of 1772fb 9 LTC1772 U U W U APPLICATIONS INFORMATION 0.4V, the loss increases from 0.5% to 8% as the load current increases from 0.5A to 2A. 5. Transition losses apply to the external MOSFET and increase at higher operating frequencies and input voltages. Transition losses can be estimated from: Transition Loss = 2(VIN)2IO(MAX)CRSS(f) Other losses including CIN and COUT ESR dissipative losses, and inductor core losses, generally account for less than 2% total additional loss. Foldback Current Limiting As described in the Output Diode Selection, the worst-case dissipation occurs with a short-circuited output when the diode conducts the current limit value almost continuously. To prevent excessive heating in the diode, foldback current limiting can be added to reduce the current in proportion to the severity of the fault. Foldback current limiting is implemented by adding diodes DFB1 and DFB2 between the output and the ITH/RUN pin as shown in Figure 5. In a hard short (VOUT = 0V), the current VOUT LTC1772 R2 ITH /RUN VFB will be reduced to approximately 50% of the maximum output current. PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC1772. These items are illustrated graphically in the layout diagram in Figure 6. Check the following in your layout: 1. Is the Schottky diode closely connected between ground (Pin 2) and drain of the external MOSFET? 2. Does the (+) plate of CIN connect to the sense resistor as closely as possible? This capacitor provides AC current to the MOSFET. 3. Is the input decoupling capacitor (0.1µF) connected closely between VIN (Pin 5) and ground (Pin 2)? 4. Connect the end of RSENSE as close to VIN (Pin 5) as possible. The VIN pin is the SENSE + of the current comparator. 5. Is the trace from SENSE – (Pin 4) to the Sense resistor kept short? Does the trace connect close to RSENSE? 6. Keep the switching node PGATE away from sensitive small signal nodes. + DFB1 R1 7. Does the VFB pin connect directly to the feedback resistors? The resistive divider R1 and R2 must be connected between the (+) plate of COUT and signal ground. DFB2 1772 F05 Figure 5. Foldback Current Limiting 1 ITH/RUN PGATE CIN LTC1772 RITH 2 GND VIN 5 3 VFB SENSE – L1 RSENSE 0.1µF CITH VIN + 6 4 VOUT M1 + D1 COUT R1 BOLD LINES INDICATE HIGH CURRENT PATHS R2 1772 F06 Figure 6. LTC1772 Layout Diagram (See PC Board Layout Checklist) 1772fb 10 LTC1772 U TYPICAL APPLICATIO LTC1772 High Efficiency, Small Footprint 3.3V to 1.8V/0.5A Regulator 1 R4 10k C3 220pF ITH/RUN PGATE 6 L1 M1 10µH LTC1772 2 3 GND VFB VIN SENSE – 5 VIN 3.3V C1 10µF 10V R1 0.15Ω + D1 4 C2 47µF 6V C1: TAIYO YUDEN CERAMIC L1: COILTRONICS UP1B-100 LMK325BJ106K-T M1: Si3443DV C2: SANYO POSCAP 6TPA47M R1: DALE 0.25W D1: MOTOROLA MBRM120T3 VOUT 1.8V 0.5A R2 100k R3 80.6k 1772 TA02 U PACKAGE DESCRIPTION S6 Package 6-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1636) 0.62 MAX 2.90 BSC (NOTE 4) 0.95 REF 1.22 REF 3.85 MAX 2.62 REF 1.4 MIN 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.30 – 0.45 6 PLCS (NOTE 3) 0.95 BSC 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 0.09 – 0.20 (NOTE 3) 1.90 BSC S6 TSOT-23 0302 NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 1772fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LTC1772 U TYPICAL APPLICATIONS LTC1772 3.3V to 5V/1A Boost Regulator R1 0.033Ω VIN 3.3V C1 47µF 16V ×2 L1 4.7µH D1 U1 1 R4 10k ITH/RUN PGATE 6 2 2 3 VIN GND SENSE – VFB C1: AVXTPSE476M016R0047 C2: AVXTPSE107M010R0100 D1: IR10BQ015 4 VOUT 5V 1A C2 100µF 10V ×2 + M1 3 LTC1772 C3 220pF 5 5 4 R2 422k R3 80.6k U1: FAIRCHILD NC7SZ04 L1: MURATA LQN6C-4R7 M1: Si9804 R1: DALE 0.25W ALSO SEE LTC1872 FOR THIS APPLICATION 1772 TA03 LTC1772 5V/0.5A Flyback Regulator R1 0.033Ω 1 R4 10k ITH/RUN PGATE 6 M1 LTC1772 2 C3 220pF 3 VIN GND VFB SENSE – 5 4 VIN 2.5V TO 9.8V C2 47µF 16V ×2 C5 150pF R6 CERAMIC 100Ω D1 VOUT 5V 0.5A T1 R5 22Ω C1: AVXTPSE476M016R0047 C2: AVXTPSE107M010R0100 D1: IR10BQ015 • C4 10µH 100pF CERAMIC + 10µH • M1: Si9803 R1: DALE 0.25W T1: COILTRONICS CTX10-4 C2 100µF 10V ×2 R2 52.3k R3 10k 1772 TA04 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1147 Series High Efficiency Step-Down Switching Regulator Controllers 100% Duty Cycle, 3.5V ≤ VIN ≤ 16V LT1375/LT1376 1.5A, 500kHz Step-Down Switching Regulators High Frequency, Small Inductor, High Efficiency LTC1622 Low Input Voltage Current Mode Step-Down DC/DC Controller VIN 2V to 10V, IOUT Up to 4.5A, Synchronizable to 750kHz Optional Burst Mode Operation, 8-Lead MSOP LTC1624 High Efficiency SO-8 N-Channel Switching Regulator Controller N-Channel Drive, 3.5V ≤ VIN ≤ 36V TM LTC1625 No RSENSE Synchronous Step-Down Regulator 97% Efficiency, No Sense Resistor LTC1627 Low Voltage, Monolithic Synchronous Step-Down Regulator Low Supply Voltage Range: 2.65V to 8V, IOUT = 0.5A LTC1649 3.3V Input Synchronous Controller No Need for 5V Supply, Uses Standard Logic Gate MOSFETs; IOUT up to 15A LTC1702 550kHz, 2 Phase, Dual Synchronous Controller Two Channels; Minimum CIN and COUT, IOUT up to 15A LTC1735 Single, High Efficiency, Low Noise Synchronous Switching Controller High Efficiency 5V to 3.3V Conversion at up to 15A LTC1771 Ultra-Low Supply Current Step-Down DC/DC Controller 10µA Supply Current, 93% Efficiency, 1.23V ≤ VOUT ≤ 18V; 2.8V ≤ VIN ≤ 20V LTC1872 SOT-23 Step-Up Controller 2.5V ≤ VIN ≤ 9.8V; 550kHz; 90% Efficiency No RSENSE is a trademark of Linear Technology Corporation. 1772fb 12 Linear Technology Corporation LT/LT 0605 500 REV B • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 1999