M74HC191 4 BIT SYNCHRONOUS UP/DOWN COUNTERS ■ ■ ■ ■ ■ ■ ■ HIGH SPEED : fMAX = 61 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 191 DESCRIPTION The M74HC191 is an high speed CMOS 4-BIT SYNCHRONOUS UP/DOWN COUNTER fabricated with silicon gate C2MOS technology. State changes of the counter are synchronous with the LOW-to-HIGH transition of the Clock Pulse Input. An asynchronous parallel load input overrides counting and loads the data present on the DATA inputs into the flip-flops, which makes it possible to use the circuits as programmable counters. A count enable input serves as the carry/borrow DIP SOP TSSOP ORDER CODES PACKAGE TUBE DIP SOP TSSOP M74HC191B1R M74HC191M1R T&R M74HC191RM13TR M74HC191TTR input in multi-stage counters. Control input, Down/ Up, determines whether a circuit counts up or down. A MAX/MIN output and a Ripple Clock output provide overflow/underflow indication and make possible a variety of methods for generating carry/borrow signals in multi-stage counter applications. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS August 2001 1/14 M74HC191 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 3, 2, 6, 7 QA to QD NAME AND FUNCTION Flip-Flop Outputs Count Enable Input ENABLE (Active LOW) U/D Parallel Data Input LOAD Load Input (Active LOW) MA/MI OUT Terminal Count Output Ripple Clock Output RC (Active LOW) Clock Input (LOW to CLOCK HIGH, edge triggered) DA to DD Data Inputs GND Ground (0V) Vcc Positive Supply Voltage 4 5 11 12 13 14 15, 1, 10, 9 8 16 TRUTH TABLE INPUTS OUTPUTS FUNCTION LOAD ENABLE D/U CLOCK QA QB QC QD X a b c d L X X H L L UP COUNT UP COUNT H L H DOWN COUNT DOWN COUNT H H X NO CHANGE NO COUNT H X X NO CHANGE NO COUNT X : Don’t Care a - d : The level of steady state inputs a through d respectively 2/14 PRESET DATA M74HC191 LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays 3/14 M74HC191 TIMING CHART ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Supply Voltage Value Unit -0.5 to +7 V -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 V DC Input Diode Current ± 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ± 50 mA VI DC Input Voltage VO DC Output Voltage IIK ICC or IGND DC VCC or Ground Current PD Power Dissipation Tstg Storage Temperature TL Lead Temperature (10 sec) V 500(*) mW -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C 4/14 M74HC191 RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Value Supply Voltage VI Input Voltage VO Output Voltage Top Operating Temperature Input Rise and Fall Time tr, tf Unit 2 to 6 V 0 to VCC V 0 to VCC V -55 to 125 °C VCC = 2.0V 0 to 1000 ns VCC = 4.5V 0 to 500 ns VCC = 6.0V 0 to 400 ns DC SPECIFICATIONS Test Condition Symbol VIH VIL VOH VOL II ICC Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current Quiescent Supply Current Value TA = 25°C VCC (V) Min. 2.0 4.5 6.0 2.0 4.5 6.0 Typ. Max. 1.5 3.15 4.2 -40 to 85°C -55 to 125°C Min. Min. Max. 1.5 3.15 4.2 0.5 1.35 1.8 Max. 1.5 3.15 4.2 0.5 1.35 1.8 V 0.5 1.35 1.8 2.0 IO=-20 µA 1.9 2.0 1.9 1.9 4.5 IO=-20 µA 4.4 4.5 4.4 4.4 6.0 IO=-20 µA 5.9 6.0 5.9 5.9 4.5 IO=-4.0 mA 4.18 4.31 4.13 4.10 5.68 Unit V V 6.0 IO=-5.2 mA 2.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=20 µA 0.0 0.1 0.1 0.1 6.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=4.0 mA 0.17 0.26 0.33 0.40 6.0 IO=5.2 mA 0.18 0.26 0.33 0.40 6.0 VI = VCC or GND ± 0.1 ±1 ±1 µA 6.0 VI = VCC or GND 4 40 80 µA 5.8 5.63 5.60 V 5/14 M74HC191 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time (CLOCK - Q) tPLH tPHL Propagation Delay Time (CLOCK - RCO) tPLH tPHL Propagation Delay Time (CLOCK MAX/MIN) tPLH tPHL Propagation Delay Time (LOAD - Q) tPLH tPHL Propagation Delay Time (DATA - Q) tPLH tPHL Propagation Delay Time (ENABLE RCO) tPLH tPHL Propagation Delay Time (D/U - RCO) tPLH tPHL Propagation Delay Time (D/U - MAX/ MIN) fMAX Maximum Clock Frequency tW(H) tW(L) Minimum Pulse Width (CLOCK) tW(L) Minimum Pulse Width (LOAD) ts ts th 6/14 Minimum Set-up Time(SI, PI - CK) Minimum Set-up Time(S0, S1 - CK) Minimum Hold Time VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 Value TA = 25°C Min. 6.2 31 37 Typ. Max. 30 8 7 92 23 20 39 13 11 120 30 26 108 27 23 84 21 18 39 13 11 63 21 18 64 18 15 9 37 44 40 10 9 36 9 8 80 20 17 16 4 3 75 15 13 180 36 31 120 24 20 240 48 41 205 41 35 175 35 30 105 21 18 180 36 31 160 32 27 -40 to 85°C -55 to 125°C Min. Min. Max. 95 19 16 225 45 38 150 30 26 300 60 51 255 51 43 220 44 37 130 26 22 225 45 38 200 40 34 4 20 24 100 20 17 75 15 13 175 35 30 50 10 9 0 0 0 Max. 110 22 19 270 54 46 180 36 31 360 72 61 310 61 53 265 53 45 160 32 27 270 54 46 240 48 41 3.4 17 20 125 25 21 95 19 16 220 44 37 60 12 11 0 0 0 Unit ns ns ns ns ns ns ns ns ns MHz 150 30 26 110 22 19 265 53 45 75 15 13 0 0 0 ns ns ns ns ns M74HC191 Test Condition Symbol tREM Parameter Minimum Removal Time (CLEAR) Value TA = 25°C VCC (V) Min. 2.0 4.5 6.0 Typ. Max. 12 3 3 50 10 9 -40 to 85°C -55 to 125°C Min. Min. Max. 60 12 11 Unit Max. 65 15 13 ns CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter VCC (V) Value TA = 25°C Min. Typ. Max. 10 CIN Input Capacitance 5.0 5 CPD Power Dissipation Capacitance (note 1) 5.0 112 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) 7/14 M74HC191 WAVEFORM 1: PROPAGATION DELAY TIME, MINIMUM PULSE WIDTH (CLOCK)(f=1MHz; 50% duty cycle) WAVEFORM 2 : PROPAGATION DELAY TIME, SETUP AND HOLD TIME (A-D TO LOAD) (f=1MHz; 50% duty cycle) 8/14 M74HC191 WAVEFORM 3 : MINIMUM PULSE WIDTH (LOAD) AND REMOVAL TIME (LOAD TO CLOCK) (f=1MHz; 50% duty cycle) WAVEFORM 4 : PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle) 9/14 M74HC191 WAVEFORM 5 : PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle) WAVEFORM 6 : SETUP AND HOLD TIME (f=1MHz; 50% duty cycle) 10/14 M74HC191 Plastic DIP-16 (0.25) MECHANICAL DATA mm. inch DIM. MIN. a1 0.51 B 0.77 TYP MAX. MIN. TYP. MAX. 0.020 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L Z 3.3 0.130 1.27 0.050 P001C 11/14 M74HC191 SO-16 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45° (typ.) D 9.8 10 0.385 0.393 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.62 0.024 8° (max.) PO13H 12/14 M74HC191 TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0° L 0.45 A 0.60 0.0256 BSC 8° 0° 0.75 0.018 8° 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 13/14 M74HC191 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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