Order this document by MC145436A/D SEMICONDUCTOR TECHNICAL DATA Advance Information The MC145436A is a low–power and improved input sensitivity version of the MC14LC5436. The MC145436A is a silicon gate CMOS LSI device containing the filter and decoder for detection of a pair of tones conforming to the DTMF standard with outputs in hexadecimal. Switched capacitor filter technology is used together with digital circuitry for the timing control and output circuits. The MC145436A provides excellent power line noise and dial tone rejection and is suitable for applications in central office equipment, PABX, and keyphone systems, remote control equipment and consumer telephony products. The MC145436A offers the following performance features: • • • • • • • • Single + 5 V Power Supply Detects All 16 Standard Digits Uses Inexpensive 3.58 MHz Crystal Provides Guard Time Controls to Improve Speech Immunity Output in 4–Bit Hexadecimal Code Built–In 60 Hz and Dial Tone Rejection Pin Compatible with SSI–204, MC145436, and MC14LC5436 Functional and Applicational Compatible with MC145436 and MC14LC5436 P SUFFIX PLASTIC DIP CASE 646 14 1 DW SUFFIX SOG PACKAGE CASE 751G 16 1 ORDERING INFORMATION MC145436AP Plastic DIP MC145436ADW SOG Package PIN ASSIGNMENTS PDIP D2 1 14 D4 D1 2 13 D8 ENB 3 12 DV VDD 4 11 ATB GT 5 10 Xin Xen 6 9 Xout Ain 7 8 GND D2 1 16 D4 D1 2 15 D8 SOG ENB 3 14 DV VDD 4 13 NC NC 5 12 ATB GT 6 11 Xin Xen 7 10 Xout Ain 8 9 GND NC = NO CONNECTION This document contains information on a new product. Specifications and information herein are subject to change without notice. REV 1 1/96 Motorola, Inc. 1996 MOTOROLA MC145436A 1 BLOCK DIAGRAM 697 Ain 60 Hz REJECTION FILTER BS1 770 GT TIMING CIRCUIT 852 DV 941 PREAMP 1209 BS2 OUTPUT DECODER 1336 ENB 1477 1633 D1 ATB VOLTAGE REF Xen Xin Xout MC145436A 2 ÷8 CLOCK GEN D2 OUTPUT REGISTER CHIP CLOCKS D4 D8 MOTOROLA MAXIMUM RATINGS (Voltages Referenced to GND Unless Otherwise Noted) Symbol Value Unit VDD – 0.5 to + 6.0 V Input Voltage, Any Pin Except Ain Vin – 0.5 to VDD + 0.5 V Input Voltage, Ain Vin VDD – 10 to VDD + 0.5 V I ± 10 mA PD 100 mW TA – 40 to + 85 °C Tstg – 65 to + 150 °C Rating DC Supply Voltage DC Current Drain per Pin Power Dissipation Operating Temperature Range Storage Temperature Range This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid applications of any voltage higher than the maximum rated voltages to this high impedance circuit. For proper operation it is recommended that Vin and Vout be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD. Reliability of operation is enhanced if unused inputs are tied to and appropriate logic voltage level (e.g., either VSS or VDD). ELECTRICAL CHARACTERISTICS (All Polarities Referenced to VSS = 0 V, VDD = 5.0 V ± 10%, TA = – 40 to + 85°C, Unless Otherwise Noted) Symbol Min Typ Max Unit DC Supply Voltage VDD 4.5 5 5.5 V Supply Current (fCLK = 3.58 MHz) IDD — 5 8 mA Parameter Input Current GT ENB, Xin, Xen Iin — — — — 450 ±1 µA Input Voltage Low ENB, GT, Xen VIL — — 1.5 V Input Voltage High ENB, GT, Xen VIH 3.5 — — V IOH 800 — — µA Iout Data and DV Pins: Vout = 4.5 V (Source) Iout Data and DV Pins: Vout = 0.4 V (Sink) Input Impedance Fanout Input Capacitance IOL 1.0 — — mA Ain Rin 90 100 — kΩ ATB Fout — — 10 Xen, ENB Cin — 6 — pF ANALOG CHARACTERISTICS (VDD = 5.0 V ± 10%, TA = – 40 to + 85°C, Unless Otherwise Noted) Min Typ Max Unit Signal Level for Detection (Ain) – 35 — –2 dBm Twist = High Tone/Low Tone – 10 — 10 dB Frequency Detect Bandwidth ± (1.5 + 2 Hz) ± 2.5 ± 3.5 % fO 60 Hz Tolerance — — 0.8 Vr ms Dial Tone Tolerance (Note 1) (Dial Tone 330 + 440) — — 0 dB Noise Tolerance (Notes 1 and 2) — — – 12 dB Power Supply Noise (Wide Band) — — 10 mV p–p Talk Off (Mitel Tape #CM7290) — 2 — Hits Parameter NOTES: 1. Referenced to lower amplitude tone. 2. Bandwidth limited (0 to 3.4 kHz) Gaussian Noise. MOTOROLA MC145436A 3 AC CHARACTERISTICS (VDD = 5.0 V ± 10%, TA = – 40 to + 85°C) Symbol Min Typ Max Unit Tone On Time For Detection For Rejection TONEon 40 — — — — 20 ms Pause Time For Detection For Rejection TONEoff 40 — — — — 20 ms Detect Time GT = 0 GT = 1 tdet 22 32 — — 40 50 ms Release Time GT = 0 GT = 1 trel 28 18 — — 40 30 ms Data Setup Time tsu 7 — — µs Data Hold Time th 4.2 4.6 5 ms tw(GT) 18 — — µs tlag(DV) — — 5 ms ENB High to Output DV* tEHDV — 120 500 ns ENB Low to Output High–Z* tELDZ — 110 300 ns Characteristic Pulse Width GT DV Reset Lag Time * Data out: CL = 35 pF k RL = 500 Ω . TIMING DIAGRAM TONEon ANALOG INPUT (Ain) TONEoff TONE BURST 1 TONE BURST 2 tdet trel D1, D2 D4, D8 HIGH–Z tsu HIGH–Z th DV tELDZ tlag(DV) tEHDV tELDZ ENB tw(GT) GT MC145436A 4 MOTOROLA PIN DESCRIPTIONS VDD Positive Power Supply (PDIP, SOG — Pin 4) The digital supply pin, which is connected to the positive side of the power supply. VSS Ground (PDIP — Pin 8, SOG — Pin 9) Ground return pin is typically connected to the system ground. D1, D2, D4, D8 Data Output (PDIP — Pins 2, 1, 14, 13; SOG — Pins 2, 1, 16, 15) These digital outputs provide the hexadecimal codes corresponding to the detected digit. The digital outputs become valid after a tone pair has been detected and are cleared when a valid pause is timed. See Table 1 for hexadecimal codes.These output pins are high impedance when the enable pin is at logic 0. ENB Enable (PDIP, SOG — Pin 3) Outputs D1, D2, D4, D8 are enabled when ENB is at a logic 1, and high impedance (disabled) when ENB is at a logic 0. GT Guard Time (PDIP — Pin 5, SOG — Pin 6) The guard time control input provides two sets of detected time and release time, both within the allowed ranges of tone on and tone off (see Figure 1). A longer tone detect time rejects signals too short to be considered valid. With GT = 1, talk off performance is improved, since it reduces the probability that tones simulated by speech will maintain signal conditions long enough to be accepted. In addition, a shorter release time reduces the probability that a pause simulated by an interrupt in speech will be detected as a valid pause. On the other hand, a shorter tone detect time with a long Table 1. Hexadecimal Codes Output Code Digit D8 D4 D2 D1 1 0 0 0 1 2 0 0 1 0 3 0 0 1 1 4 0 1 0 0 5 0 1 0 1 6 0 1 1 0 7 0 1 1 1 8 1 0 0 0 9 1 0 0 1 0 1 0 1 0 * 1 0 1 1 # 1 1 0 0 A 1 1 0 1 B 1 1 1 0 C 1 1 1 1 D 0 0 0 0 MOTOROLA release time would be appropriate for an extremely noisy environment where fast acquisition time and immunity to dropouts would be required. In general, the tone signal time generated by a telephone is 100 ms, nominal, followed by a pause of about 100 ms. A high–to–low or low–to–high transition on the GT pin resets the internal logic and the MC145436A is immediately ready to accept a new tone input. If left open, this pin is internally pulled to ground. Xen Oscillator Enable (PDIP — Pin 6, SOG — Pin 7) A logic 1 on Xen enables the on–chip crystal oscillator. When using alternate time base from the ATB pin, Xen should be tied to VSS. Ain Analog Input (PDIP — Pin 7, SOG — Pin 8) This pin accepts the analog input and is internally biased so that the input signal may be ac coupled. The input may be dc coupled so long as it does not exceed the positive supply (see Figure 2). Xin/Xout Oscillator In and Oscillator Out (PDIP — Pins 10, 9; SOG — Pins 11, 10) These pins connect to an internal crystal oscillator. In operation, a parallel resonant crystal is connected from X in to X out, as well as a 1 M Ω resistor in parallel with the crystal. When using the alternate clock source from ATB, X in should be tied to VDD. ATB Alternate Time Base (PDIP — Pin 11, SOG — Pin 12) This pin serves as a frequency reference when more than one MC145436A is used, so that only one crystal is required for multiple MC145436As. When doing so, all ATB pins should be tied together as shown in Figure 3. When only one MC145436A is used, this pin should be left unconnected. The output frequency of ATB is 447.4 kHz. DV Data Valid (PDIP — Pin 12, SOG — Pin 14) DV signals a detection by going high after a valid tone pair is sensed and decoded at output pins D1, D2, D4, D8. DV remains high until a loss of the current DTMF signal occurs or until a transition in GT occurs. GUARD TIME 5 VDD Figure 1. Guard Time MC145436A 5 Vin VDD t VDD Vin u VDD 0.01 µF 10 pF 7 Ain VDD 10 pF 7 Ain 100 kΩ 100 kΩ Figure 2. Analog Input (Operational Information Based on PDIP Package) 3.58 MHz Xin Xout 1 MΩ ATB MC145436A VDD Xen VDD Xin ATB MC145436A Xen TO OTHER MC145436As Figure 3. Multiple MC145436As MC145436A 6 STD DTMF (Hz) COL 1 COL 2 COL 3 COL 4 697 1 2 3 A ROW 1 770 4 5 6 B ROW 2 852 7 8 9 C ROW 3 941 * 0 # D ROW 4 1209 1336 1477 1633 STD DTMF (Hz) Figure 4. 4 × 4 Keyboard Matrix MOTOROLA PACKAGE DIMENSIONS P SUFFIX PLASTIC DIP CASE 646–06 14 8 1 7 NOTES: 1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE POSITION AT SEATING PLANE AT MAXIMUM MATERIAL CONDITION. 2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 4. ROUNDED CORNERS OPTIONAL. B A F DIM A B C D F G H J K L M N L C J N H G D SEATING PLANE K M INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.300 BSC 0_ 10_ 0.015 0.039 MILLIMETERS MIN MAX 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.62 BSC 0_ 10_ 0.39 1.01 DW SUFFIX SOG PACKAGE CASE 751G–02 –A– 16 9 –B– 8X P 0.010 (0.25) 1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. M B M 8 16X J D 0.010 (0.25) M T A S B S F R X 45 _ C –T– 14X MOTOROLA G K SEATING PLANE M DIM A B C D F G J K M P R MILLIMETERS MIN MAX 10.15 10.45 7.40 7.60 2.35 2.65 0.35 0.49 0.50 0.90 1.27 BSC 0.25 0.32 0.10 0.25 0_ 7_ 10.05 10.55 0.25 0.75 INCHES MIN MAX 0.400 0.411 0.292 0.299 0.093 0.104 0.014 0.019 0.020 0.035 0.050 BSC 0.010 0.012 0.004 0.009 0_ 7_ 0.395 0.415 0.010 0.029 MC145436A 7 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. 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Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, Toshikatsu Otsuki, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–3521–8315 MFAX: [email protected] – TOUCHTONE (602) 244–6609 INTERNET: http://Design–NET.com HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 MC145436A 8 ◊ *MC145436A/D* MC145436A/D MOTOROLA