ISO-9001 CERTIFIED BY DSCC M.S.KENNEDY CORP. HIGH EFFICIENCY, 4 AMP STEP-DOWN SWITCHING REGULATORS 4707 Dey Road Liverpool, N.Y. 13088 5030 SERIES (315) 701-6751 FEATURES: MIL-PRF-38534 QUALIFIED Up To 95% Efficiency For 5V Version 4 Amp Output Current 4.5V to 30V Input Range Preset 2.5V, 3.3V or 5.0V Output Versions 300KHz Switching Frequency @ 1 Amp User Programmable Soft-Start Quiescent Current < 0.5mA User Programmable Current Limit DESCRIPTION: The MSK 5030 series are high efficiency, 4 amp, step-down switching regulators. The output voltage is configured for 2.5V, 3.3V or 5.0V internally and the input range is 4.5V to 30V. The operating frequency of the MSK 5030 is 300KHz and is internally set. An external "soft start" capacitor allows the user to control how quickly the output comes up to regulation voltage after the application of an input. An extremely low quiescent current of typically less than 0.5mA and 95% operating efficiency keeps the total internal power dissipation of the MSK 5030 down to an absolute minimum. A surface mount version, MSK 5040, is also available if desired. EQUIVALENT SCHEMATIC TYPICAL APPLICATIONS PIN-OUT INFORMATION 1 2 3 4 5 Step-down Switching Regulator Microprocessor Power Source High Efficiency Low Voltage Subsystem Power Supply 1 Cton Enable Sense High Sense Low Ground 8 Output 7 Input 6 PGround Rev. E 6/02 ABSOLUTE MAXIMUM RATINGS Input Voltage Enable Voltage Output Current Sense Pin Voltage Thermal Resistance (Each MOSFET) ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ -0.3V, +36V -0.3V, +36V 4.0 Amps -0.3V, +7V ○ TST TLD ○ TC ○ Storage Temperature Range -65°C to +150°C Lead Temperature Range 300°C (10 Seconds) Case Operating Temperature MSK5030 Series -40°C to +85°C MSK5030B/E Series -55°C to +125°C Junction Temperature +150°C ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ 15°C/W ○ ○ ○ ○ TJ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ELECTRICAL SPECIFICATIONS Parameter Group A MSK 5030B/E SERIES Test Conditions 1 Input Supply Range 2 MSK 5030 SERIES Units Subgroup Min. Typ. Max. 1,2,3 4.5 - 30 5.0 - 30 V Min. Typ. Max. Output Voltage 5030-2.5 8 IOUT=1A VIN=4.5V 1 2.40 2.51 2.63 2.26 2.51 2.76 V Output Voltage 5030-3.3 8 IOUT=1A VIN=4.5V 1 3.19 3.35 3.47 3.05 3.35 3.55 V Output Voltage 5030-5.0 8 IOUT=1A VIN=6V 1 4.85 5.1 5.25 4.75 5.1 5.35 V Within SOA 1 4.0 4.5 - 4.0 4.5 - A Output not current limited - - 2.5 - - 2.5 - % IOUT=1A 6V≤VIN≤30V 1,2,3 - 0.04 0.07 - 0.04 0.08 %/V Output Current 2 Load Regulation 2 Line Regulation Quiescent Power Consumption 2 Oscillator Frequency 2 IOUT=0mA - - 5.0 - - 5.0 - mW Internal IOUT≥1.5A - 270 300 330 270 300 330 KHz High 1,2,3 2.0 - - 2.0 - - V Low 1,2,3 - - 0.5 - - 0.5 V VEN=VIN 1 - 0.5 2.0 - 0.5 2.0 µA VEN=0V 1 - 0.2 2.0 - 0.2 2.0 µA VEN=0V VIN=30V 1 - 1.0 5.0 - 1.0 5.0 µA Positive 1 80 100 120 75 100 125 mV Negative 1 -50 -100 -160 -45 -100 -165 mV Source 1 2.5 4.0 6.5 2.5 4.0 6.5 µA Fault Sink 1 2.0 - - 2.0 - - mA 5030-2.5 VIN=4.5V IOUT=1A 1 - 80 - - 80 - % 5030-3.3 VIN=4.5V IOUT=1A 1 - 90 - - 90 - % 5030-5.0 VIN=6V IOUT=1A 1 - 95 - - 95 - % 7 Enable Input Voltage 2 Enable Input Current 2 Disabled Quiescent Current 2 Current Limit Threshold 2 Cton Current 2 Efficiency 2 NOTES: 1 2 3 4 5 6 VIN=Enable, 5mV≤(sense high-sense low)≤75mV, IL=0A, COUT=5x220µF, CIN=2x22µF, CTON=0.01µF unless otherwise specified. Guaranteed by design but not tested. Typical parameters are representative of actual device performance but are for reference only. All output parameters are tested using a low duty cycle pulse to maintain TJ = TC. Industrial grade and "E" suffix devices shall be tested to subgroup 1 unless otherwise specified. Military grade devices ('B' suffix) shall be 100% tested to subgroups 1,2 and 3. Subgroup 1 TA=TC=+25°C Subgroup 2 TA=TC=+125°C Subgroup 3 TA=TC=-55°C 7 Actual switching frequency is load dependent. Refer to typical performance curves. 8 Alternate output voltages are available. Please contact the factory. 2 Rev. E 6/02 APPLICATION NOTES INPUT CAPACITOR SELECTION: CURRENT LIMITING: The MSK 5030 is equipped with a pair of sense pins that are used to sense the load current using an external resistor (Rs). The current-limit circuit resets the main PWM latch and turns off the internal high-side MOSFET switch whenever the voltage difference between Sense High and Sense Low exceeds 100mV. This limiting occurs in both current flow directions, putting the threshold limit at ±100mV. The tolerance on the positive current limit is ±20%. The external low-value sense resistor must be sized for 80mV/Rs to guarantee enough load capacity. Load components must be designed to withstand continuous current stresses of 120mV/Rs. For very high-current applications, it may be useful to wire the sense inputs with a twisted pair instead of PCB traces. This twisted pair needn't be anything unique, perhaps two pieces of wire-wrap wire twisted together. Low inductance current sense resistors, such as metal film surface mount styles are best. The MSK 5030 has an internal high frequency ceramic capacitor (0.1uF) between VIN and GND. Connect a low-ESR bulk capacitor directly to the input pin of the MSK 5030. Select the bulk input filter capacitor according to input ripplecurrent requirements and voltage rating, rather than capacitor value. Electrolytic capacitors that have low enough ESR to meet the ripple-current requirement invariably have more than adequate capacitance values. Aluminum-electrolytic capacitors are preferred over tantalum types, which could cause powerup surge-current failure when connecting to robust AC adapters or low-impedance batteries. RMS input ripple current is determined by the input voltage and load current, with the worst possible case occuring at VIN = 2 x VOUT: IRMS = ILOAD X √VOUT(VIN-VOUT) VIN OUTPUT CAPACITOR SELECTION: SOFT START/Cton: The internal soft-start circuitry allows a gradual increase of the internal current-limit level at start-up for the purpose of reducing input surge currents, and possibly for power-supply sequencing. In Disable mode, the soft-start circuit holds the Cton capacitor discharged to ground. When Enable goes high, a 4µA current source charges the Cton capacitor up to 3.2V. The resulting linear ramp causes the internal current-limit threshold to increase proportionally from 20mV to 100mV. The output capacitors charge up relatively slowly, depending on the Cton capacitor value. The exact time of the output rise depends on output capacitance and load current and is typically 1mS per nanofarad of soft-start capacitance. With no capacitor connected, maximum current limit is reached typically within 10µS. The output capacitor values are generally determined by the ESR and voltage rating requirements rather than capacitance requirements for stability. Low ESR capacitors that meet the ESR requirement usually have more output capacitance than required for stability. Only specialized low-ESR capacitors intended for switching-regulator applications, such as AVX TPS, Sprague 595D, Sanyo OS-CON, Nichicon PL series or Kemet T510 series should be used. The capacitor must meet minimum capacitance and maximum ESR values as given in the following equations: CF > 2.5V(1 + VOUT/VIN(MIN)) VOUT x RSENSE x f ENABLE FUNCTION: RESR < RSENSE x VOUT 2.5V These equations provide 45 degrees of phase margin to ensure jitter-free fixed-frequency operation and provide a damped output response for zero to full-load step charges. Lower quality capacitors can be used if the load lacks large step charges. Bench testing over temperature is recommended to verify acceptable noise and transient response. As phase margin is reduced, the first symptom is timing jitter, which shows up in the switching waveforms. Technically speaking, this typically harmless jitter is unstable operation, since the swithcing frequency is non-constant. As the capacitor ESR is increased, the jitter becomes worse. Eventually, the load-transient waveform has enough ringing on it that the peak noise levels exceed the output voltage tolerance. With zero phase margin and instability present, the output voltage noise never gets much worse than IPEAK x RESR (under constant loads). Designers of industrial temperature range digital systems can usually multiply the calculated ESR value by a factor of 1.5 without hurting stability or transient response. The output ripple is usually dominated by the ESR of the filter capacitors and can be approximated as IRIPPLE x RESR. Including the capacitive term, the full equation for ripple in the continuous mode is VNOISE(p-p)=IRIPPLE x (RESR + 1/(2πfC)). In idle mode, the inductor current becomes discontinuous with high peaks and widely spaced pulses, so the noise can actually be higher at light load compared to full load. In idle mode, the output ripple can be calculated as follows: The MSK 5030 is enabled by applying a logic level high to the Enable pin. A logic level low will disable the device and quiescent input current will reduce to approximately 1µA. The Enable threshold voltage is 1V. If automatic start up is required, simply connect the pin to VIN. Maximum Enable voltage is +36V. POWER DISSIPATION: In high current applications, it is very important to ensure that both MOSFETS are within their maximum junction temperature at high ambient temperatures. Temperature rise can be calculated based on package thermal resistance and worst case dissipation for each MOSFET. These worst case dissipations occur at minimum voltage for the high side MOSFET and at maximum voltage for the low side MOSFET. Calculate power dissipation using the following formulas: Pd (upper FET)=ILOAD² x 0.035Ω x DUTY + VIN x ILOAD x f x VIN x CRSS+20ns IGATE Pd (lower FET)=ILOAD² x 0.035Ω x (1-DUTY) DUTY= (VOUT+VQ2) (VIN-VQ1) Where: VQ1 or VQ2 (on state voltage drop)=ILOAD x 0.035Ω CRSS=94pF IGATE=1A During output short circuit, Q2, the synchronous-rectifier MOSFET, will have an increased duty factor and will see additional stress. This can be calculated by: Q2 DUTY=1VQ2 VIN(MAX)-VQ1 Where: VQ1 or VQ2=(120MV/RSENSE)x0.035 VNOISE(p-p)= 0.02 x RESR + 0.0003 x 4.7µH x [1/VOUT + 1/(VIN-VOUT)] RSENSE (RSENSE)² x C 3 Rev. E 6/02 APPLICATION NOTES CONT'D MODES OF OPERATION: Under heavy loads, the MSK 5030 operates in full PWM mode. Each pulse from the oscillator sets the internal PWM latch that turns on the high-side MOSFET. As the high-switch turns off, the synchronous rectifier latch is set. 60ns later the low-side MOSFET turns on until the start of the next clock cycle or until the inductor current crosses zero. Under fault conditions the current exceeds the ±100mV current-limit threshold and the high-side switch turns off. At light loads the inductor current does not exceed the 30mV threshold set by the minimum-current comparator. When this occurs, the MSK 5030 goes into idle mode, skipping most of the oscillator pulses in order to reduce the switching frequency and cut back gate-charge losses. The oscillator is gated off at light loads because the minimum-current comparator immediately resets the high-side latch at the start of each cycle. Refer to Table 1 for the operational characteristics. OPERATIONAL CHARACTERISTICS DESCRIPTION ENABLE LOAD 0 X DEVICE DISABLED 1 LOW <10% PULSE SKIPPING MODE DISCONTINUOUS INDUCTOR CURRENT 1 MED <30% PULSE SKIPPING MODE CONTINUOUS INDUCTOR CURRENT 1 HIGH >30% CONSTANT FREQ. PWM MODE CONTINUOUS INDUCTOR CURRENT TABLE 1 TYPICAL 3.3V APPLICATION CIRCUIT 4 Rev. E 6/02 TYPICAL PERFORMANCE CURVES 5 Rev. E 6/02 MECHANICAL SPECIFICATIONS ESD Triangle indicates Pin 1. NOTE: ALL DIMENSIONS ARE ±0.010 INCHES UNLESS OTHERWISE LABELED. ORDERING INFORMATION MSK5030-3.3 B SCREENING BLANK= INDUSTRIAL; E=EXTENDED RELIABILITY B=MIL-PRF-38534 CLASS H OUTPUT VOLTAGE 2.5=+2.5V; 3.3=+3.3V; 5.0=+5.0V GENERAL PART NUMBER The above example is a +3.3V, Military regulator. M.S. Kennedy Corp. 4707 Dey Road, Liverpool, New York 13088 Phone (315) 701-6751 FAX (315) 701-6752 www.mskennedy.com The information contained herein is believed to be accurate at the time of printing. MSK reserves the right to make changes to its products or specifications without notice, however, and assumes no liability for the use of its products. Please visit our website for the most recent revision of this datasheet. 6 Rev. E 6/02