NCV7420 LIN Transceiver with 3.3V or 5 V Voltage Regulator General Description V BB 1 14 VCC LIN 2 13 RxD GND 3 12 TxD GND 4 WAKE 5 INH 6 OTP_ZAP 7 11 GND 10 STB 9 EN 8 TEST SOIC 14 D SUFFIX CASE 751AP ORDERING INFORMATION Voltage Regulator LIN−Bus Transceiver • LIN compliant to specification revision 2.0 (backward • • • • compatible to version 1.3) and J2602 I3T high voltage technology Bus voltage ±45 V Transmission rate up to 20 kBaud SOIC 14 Green package This is a Pb−Free Device* Output voltage 5 V / ~50 mA or 3.3 V / ~50 mA Wake−up input Enable inputs for stand−by and sleep mode INH output for auxiliary purposes (switching of an external pull−up or resistive divider towards battery, control of an external voltage regulator etc.) Modes • Normal mode: LIN communication in either low (up to Protection • Thermal shutdown • Indefinite short−circuit protection on pins LIN and • WAKE towards supply and ground • • Load dump protection (45 V) • Bus pins protected against transients in an automotive • PIN CONFIGURATION See detailed ordering and shipping information in the package dimensions section on page 14 of this data sheet. KEY FEATURES • • • • • http://onsemi.com NCV7420 The NCV7420 is a fully featured local interconnect network (LIN) transceiver designed to interface between a LIN protocol controller and the physical bus. The transceiver is implemented in I3T technology enabling both high−voltage analog circuitry and digital functionality to co−exist on the same chip. The NCV7420 LIN device is a member of the in−vehicle networking (IVN) transceiver family of ON Semiconductor that integrates a LIN v2.0 physical transceiver and either a 3.3 V or a 5 V voltage regulator. It is designed to work in harsh automotive environment and is submitted to the TS16949 qualification flow. The LIN bus is designed to communicate low rate data from control devices such as door locks, mirrors, car seats, and sunroofs at the lowest possible cost. The bus is designed to eliminate as much wiring as possible and is implemented using a single wire in each node. Each node has a slave MCU−state machine that recognizes and translates the instructions specific to that function. The main attraction of the LIN bus is that all the functions are not time critical and usually relate to passenger comfort. • environment ESD protection level for LIN, INH, WAKE and Vbb up to ±8 kV EMI Compatibility 10 kBaud) or normal slope Sleep mode: VCC is switched “off” and no communication on LIN bus Stand−by mode: VCC is switched “on” but there is no communication on LIN bus Wake−up bringing the component from sleep mode into standby mode is possible either by LIN command or digital input signal on WAKE pin. Wake−up from LIN bus can also be detected and flagged when the chip is already in standby mode. • Integrated slope control *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2009 March, 2009 − Rev. 1 1 Publication Order Number: NCV7420/D NCV7420 Table 1. KEY TECHNICAL CHARACTERISTICS − 3.3 V version Symbol Parameter Min. Typ. Max. Unit 5 12 26 V Vbb Nominal battery operating voltage Vbb Load dump protection (Note 1) 45 V Ibb_SLP Supply current in sleep mode 20 mA Vcc_out (Note 5) Regulated Vcc output, Vcc load 1 mA−30 mA 3.23 3.30 3.37 V Regulated Vcc output, Vcc load 0 mA−50 mA 3.19 3.30 3.41 V Iout_max Maximum continuous Vcc output current (Note 2) 30 mA Maximum Vcc output current, thermal shutdown can occur (Note 2) 50 mA Operating DC voltage on WAKE pin 0 Vbb V Maximum rating voltage on WAKE pin −45 45 V V_wake Junction thermal shutdown temperature 165 195 °C Tamb Tj Operating ambient temperature −40 +105 °C Vesd Electrostatic discharge voltage (LIN, WAKE, VBB) System HBM (Note 3) −8 +8 kV Electrostatic discharge voltage (LIN, INH, WAKE, VBB) HBM (Note 4) −4 +4 kV Electrostatic discharge voltage (other pins) HBM (Note 4) −2 +2 kV Table 2. KEY TECHNICAL CHARACTERISTICS − 5 V version Symbol Parameter Min. Typ. Max. Unit 6 12 26 V Load dump protection (Note 1) 45 V Ibb_SLP Supply current in sleep mode 20 mA Vcc_out (Note 5) Regulated Vcc output, Vcc load 1 mA−30 mA 4.9 5.0 5.1 V Regulated Vcc output, Vcc load 0 mA−50 mA 4.83 5.0 5.17 V Iout_max Maximum continuous Vcc output current (Note 2) 30 mA Maximum Vcc output current, thermal shutdown can occur (Note 2) 50 mA Operating DC voltage on WAKE pin 0 Vbb V Maximum rating voltage on WAKE pin −45 45 V Junction thermal shutdown temperature 165 195 °C Tamb Operating ambient temperature −40 +105 °C Vesd Electrostatic discharge voltage (LIN, WAKE, VBB) System HBM (Note 3) −8 +8 kV Electrostatic discharge voltage (LIN, INH, WAKE, VBB) HBM (Note 4) −4 +4 kV Electrostatic discharge voltage (other pins) HBM (Note 4) −2 +2 kV Vbb Nominal battery operating voltage Vbb V_wake Tj 1. The applied transients shall be in accordance with ISO 7637 part 1, test pulse 5. The device complies with functional class C; class A can be reached depending on the application and external components. 2. Current limitation is set above 50 mA but thermal shutdown can occur for currents above 30 mA 3. Equivalent to discharging a 150 pF capacitor through a 330 W resistor conform to IEC Standard 1000−4−2. LIN bus filter 220 pF, Vbb blocking capacitor 100 nF, 3k3/10n R/C network on WAKE. 4. Equivalent to discharging a 100 pF capacitor through a 1.5 kW resistor conform to MIL STD 883 method 3015.7. 5. Vcc voltage must be properly stabilized by external capacitors: capacitor of min. 80 nF with ESR<10 mW in parallel with a capacitor of min. 8 mF, ESR<1W. http://onsemi.com 2 NCV7420 VBB VCC OTP_ZAP INH V−reg Osc VCC Band− gap STB State & Wake−up Control VBB WAKE EN RxD Thermal shutdown COMP LIN Filter VCC TxD Slope Control time−out VBB TEST POR VCC NCV7420 GND Figure 1. Block Diagram Typical Application number and capacitance of Slave devices, the pull−up resistance of all devices (Master & Slave), and the required time constant of the system, respectively. Vcc voltage must be properly stabilized by external capacitors: capacitor of min. 80 nF (ESR < 10 mW) in parallel with a capacitor of min. 8 mF (ESR < 1 W). Application Schematic The EMC immunity of the Master−mode device can be further enhanced by adding a capacitor between the LIN output and ground. The optimum value of this capacitor is determined by the length and capacitance of the LIN bus, the Master Node 10 uF 100nF WAKE 10nF GND 5 WAKE V CC V BB 11 1 RxD 12 9 10 7 3 4 11 8 GND TxD EN 10 uF 100nF Micro controller LIN STB WAKE GND GND 5 KL30 LIN− BUS KL31 Figure 2. Typical Application Diagram http://onsemi.com 3 LIN 2 WAKE V CC 14 NCV7420 LIN 2 V CC 14 13 220pF 1 nF LIN 11 1 NCV7420 1 kW INH V BB 10 uF 100nF VBAT 10nF 10 uF 100nF VBAT 13 12 9 10 7 3 4 11 8 GND Slave Node VCC RxD TxD EN Micro controller STB GND NCV7420 Table 3. PIN DESCRIPTION Pin Name Description 1 VBB Battery supply input 2 LIN LIN bus output/input 3 GND Ground 4 GND Ground 5 WAKE 6 INH 7 OTP_ZAP 8 TEST 9 EN Enable input, transceiver in normal operation mode when high 10 STB Standby mode control input 11 GND Ground 12 TxD Transmit data input, low in dominant state 13 RxD Receive data output; low in dominant state; push−pull output 14 Vcc Supply voltage (output) High voltage digital input pin to switch the part from sleep− to standby mode Inhibit output Supply for programming of trimming bits at factory testing, should be grounded in the application Digital input for factory testing, should be grounded in the application Overall Functional Description with EMC performance due to reduced slew rate of the LIN output. The junction temperature is monitored via a thermal shutdown circuit that switches the LIN transmitter and voltage regulator off when temperature exceeds the TSD trigger level. NCV7420 has four operating states (normal mode, low slope mode, stand−by mode, and sleep mode) that are determined by the input signals EN, WAKE, STB, and TxD. LIN is a serial communication protocol that efficiently supports the control of mechatronic nodes in distributed automotive applications. The domain is class−A multiplex buses with a single master node and a set of slave nodes. NCV7420 is designed as a master or slave node for the LIN communication interface with an integrated 3.3 V or 5 V voltage regulator having a current capability up to 50 mA for supplying any external components (microcontroller). NCV7420 contains the LIN transmitter, LIN receiver, voltage regulator, power−on−reset (POR) circuits and thermal shutdown (TSD). The LIN transmitter is optimised for the maximum specified transmission speed of 20 kBaud Operating States NCV7420 provides four operating states, two modes for normal operation with communication, one stand-by without communication and one low power mode with very low current consumption. See Figure 3. http://onsemi.com 4 NCV7420 Stand−by mode − − − − − EN goes from 0 to 1 while TxD = 1 EN goes from 1 to 0 while STB = 1 EN goes from 1 to 0 while STB = 1 Local wake−up or LIN wake−up Normal mode (low slope) EN goes from 1 to 0 while STB = 0 Vcc: “on” LIN TX: “on” INH: “high”/”floating” Term: 30k W RxD: LIN data − − − − − Normal mode (normal slope) Vcc: “on” LIN TX: “on” INH: “high”/”floating” Term: 30k W RxD: LIN data EN goes from 1 to 0 while STB = 0 Vcc: “on” LIN TX: “off” INH: “floating” Term: “current ” source” RxD: high/low EN goes from 0 to 1 while TxD = 0 Power up Vbb − − − − − − − − − − Sleep mode Vcc: “off” LIN TX: “off” INH: “floating” Term: “current source” RxD: =VCC Figure 3. State Diagram Table 4. MODE SELECTION Mode Vcc RxD INH LIN 30 kW on LIN Note Normal − Slope ON Low = Dominant State High = Recessive State High if STB=High during state transition; Floating otherwise Normal Slope ON (Note 6) Normal − Low Slope ON Low = Dominant State High = Recessive State High if STB=High during state transition; Floating otherwise Low Slope ON (Note 7) Stand−by ON Low after LIN wakeup, high otherwise Floating OFF OFF (Note 8) Sleep OFF Clamped to Vcc Floating OFF OFF 6. The normal slope mode is entered when pin EN goes HIGH while TxD is in HIGH state during EN transition. 7. The low slope mode is entered when pin EN goes HIGH while TxD is in LOW state during EN transition. LIN transmitter gets on only after TxD returns to high after the state transition. 8. The stand−by mode is entered automatically after power−up. Normal Slope Mode are longer). This further reduces the EMC emission. As a consequence the maximum speed on the LIN bus is reduced up to 10 kBaud. This mode is suited for applications where the communication speed is not critical. The mode selection is done by EN=HIGH when TxD pin is LOW. In order not to transmit immediately a dominant state on the bus (because TxD=LOW), the LIN transmitter is enabled only after TxD returns to HIGH. If STB pin is high during the standby−to−low slope mode transition, INH pin is pulled high. Otherwise, it stays floating. In normal slope mode the transceiver can transmit and receive data via LIN bus with speed up to 20 kBaud. The transmit data stream of the LIN protocol is present on the TxD pin and converted by the transmitter into a LIN bus signal with controlled slew rate to minimize EMC emission. The receiver consists of the comparator that has a threshold with hysteresis in respect to the supply voltage and an input filter to remove bus noise. The LIN output is pulled HIGH via an internal 30 kW pull-up resistor. For master applications it is needed to put an external 1 kW resistor with a serial diode between LIN and Vbb (or INH). See Figure 2. The mode selection is done by EN=HIGH when TxD pin is HIGH. If STB pin is high during the standby-to-normal slope mode transition, INH pin is pulled high. Otherwise, it stays floating. Stand−by Mode The stand−by mode is always entered after power−up of the NCV7420. It can also be entered from normal mode when the EN pin is low and the stand−by pin is high. From sleep mode it can be entered after a local wake−up or LIN wakeup. In stand−by mode the Vcc voltage regulator for supplying external components (e.g. a microcontroller) stays active. Also the LIN receiver stays active to be able to detect a remote wake−up via bus. The LIN transmitter is Low Slope Mode In low slope mode the slew rate of the signal on the LIN bus is reduced (rising and falling edges of the LIN bus signal http://onsemi.com 5 NCV7420 Wake−up disabled and the slave internal termination resistor of 30 kW between LIN and Vbb is disconnected in order to minimize current consumption. Only a pull−up current source between Vbb and LIN is active. NCV7420 has two possibilities to wake−up from sleep or stand−by mode (see Figure 3): • Local wake−up: enables the transition from sleep mode to stand−by mode • Remote wake−up via LIN: enables the transition from sleep− to stand−by mode and can be also detected when already in standby mode. A local wake−up is only detected in sleep mode if a transition from LOW to HIGH or from HIGH to LOW is seen on the wake pin. Sleep Mode The Sleep Mode provides extreme low current consumption. This mode is entered when both EN and STB pins are LOW coming from normal mode. The internal termination resistor of 30 kW between LIN and Vbb is disconnected and also the Vcc regulator is switched off to minimize current consumption. Detection of Local Wake−Up Wake Detection of Local Wake−Up Wake VBB VBB 50% VBB typ. Sleep Mode Stand−by Mode 50% VBB typ. t Sleep Mode t Stand−by Mode Figure 4. Local Wake−up Signal A remote wake−up is only detected if a combination of (1) a falling edge at the LIN pin (transition from recessive to dominant) is followed by (2) a dominant level maintained for a time period > tWAKE and (3) again a rising edge at pin LIN (transition from dominant to recessive) happens. LIN Detection of Remote Wake−Up VBB LIN recessive level tWAKE 60% Vbb 40% Vbb LIN dominant level Stand−by Mode Sleep Mode t Figure 5. Remote Wake−up Behavior • RxD is kept LOW until normal mode is entered after a The wake−up source is distinguished by pin RxD in the stand−by mode: • RxD remains HIGH after power−up or local wake−up. remote wake−up (LIN). http://onsemi.com 6 NCV7420 Electrical Characteristics Definitions All voltages are referenced to GND (Pin 13). Positive currents flow into the IC. Table 5. ABSOLUTE MAXIMUM RATINGS – 3.3 V and 5 V versions Symbol Parameter Min. Max. Unit Vbb Battery voltage on pin Vbb (Note 9) −0.3 +45 V Vcc DC voltage on pin Vcc 0 +7 V I_Vcc Current delivered by the Vcc regulator 50 V_LIN LIN bus voltage (Note 10) −45 +45 V V_INH DC voltage on inhibit pin −0.3 Vbb + 0.3 V V_WAKE DC voltage on WAKE pin −45 45 V V_Dig_in mA DC input voltage on pins TxD, RxD, EN, STB −0.3 Vcc + 0.3 V Tjunc Maximum junction temperature −40 +165 °C Vesd Electrostatic discharge voltage (pins LIN, WAKE and Vbb) system HBM (Note 11) −8 +8 kV Electrostatic discharge voltage (pins LIN, INH, WAKE and Vbb) HBM (Note 12) −4 +4 kV Electrostatic discharge voltage (other pins) HBM (Note 12) −2.0 +2.0 kV Electrostatic discharge voltage; charge device model (Note 13) −250 +250 V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 9. The applied transients shall be in accordance with ISO 7637 part 1, test pulses 1, 2, 3a, 3b, and 5. The device complies with functional class C; class A can be reached depending on the application and external components. 10. The applied transients shall be in accordance with ISO 7637 part 1, test pulses 1, 2, 3a, and 3b. The device complies with functional class C; class A can be reached depending on the application and external components. 11. Equivalent to discharging a 150 pF capacitor through a 330 W resistor conform to IEC Standard 1000−4−2. LIN bus filter 220 pF, Vbb blocking capacitor 100 nF, 3k3/10n R/C network on WAKE. 12. Equivalent to discharging a 100 pF capacitor through a 1.5 kW resistor conform to MIL STD 883 method 3015.7. 13. Conform to EOS/ESD−DS5.3 (socket mode). http://onsemi.com 7 NCV7420 DC Characteristics – 3.3 V version (VBB = 5 V to 26 V; Tjunc = −40°C to +150°C; unless otherwise specified.) Table 6. DC CHARACTERISTICS SUPPLY − Pins VBB and VCC Symbol Max. Unit Ibb_ON Supply current Normal mode; LIN recessive 1 mA Ibb_STB Supply current Stand−by mode, Vbb = 5 – 18 V 60 mA Ibb_SLP Supply current Sleep mode, Vbb = 5 – 18 V 20 mA Vcc_out Regulator output voltage Vcc load 1 mA − 30 mA 3.23 3.30 3.37 V Regulator output voltage Vcc load 0 mA − 50 mA 3.19 3.30 3.41 V Iout_max_cont Maximum output current Vbb = 16 V; Tamb = 105°C 30 mA Iout_max_conta Maximum output current Vbb = 26 V; limited lifetime 30 mA Thermal shutdown can occur 50 mA 150 mA Max. Unit Iout_max_abs Iout_lim Parameter Conditions Absolute maximum output current Over−current limitation Min. Typ. 50 Table 7. DC CHARACTERISTICS LIN TRANSMITTER − Pin LIN Symbol Parameter Conditions Min. Typ. VLin_dom_LoSup LIN dominant output voltage TXD = low; Vbb = 7.3 V 1.2 V VLin_dom_HiSup LIN dominant output voltage TXD = low; Vbb = 18 V 2.0 V VLin_rec LIN recessive output voltage TXD = highH; Ilin = 0 mA Vbb − Vγ (Note 14) ILIN_lim Short circuit current limitation VLin = Vbb_max 40 Rslave Internal pull−up resistance 20 ILIN_off_dom LIN output current bus in dominant state Driver off; Vbb = 12 V ILIN_off_rec LIN output current bus in recessive state Driver off; Vbb = 12 V ILIN_no_GND Communication not affected Vbb = GND = 12 V; 0 < VLin < 18 V ILIN_no_Vbb LIN bus remains operational Vbb = GND = 0 V; 0 < VLin < 18 V V 200 33 47 −1 mA kW mA −1 20 mA 1 mA 100 mA Max. Unit Table 8. DC CHARACTERISTICS LIN RECEIVER − Pin LIN Symbol Parameter Conditions Min. Typ. Vrec_dom Receiver threshold LIN bus recessive → dominant 0.4 0.6 Vbb Vrec_rec Receiver threshold LIN bus dominant → recessive 0.4 0.6 Vbb Vrec_cnt Receiver centre voltage (Vbus_dom + Vbus_rec) /2 0.475 0.525 Vbb Vrec_hys Receiver hysteresis 0.05 0.175 Vbb Max. Unit 0.65 Vbb Table 9. DC CHARACTERISTICS I/Os Symbol Parameter Conditions Min. Typ. Pin WAKE V_wake_th Threshold voltage 0.35 14. Vγ is the forward diode voltage. Typically (over the complete temperature) Vγ = 1 V. 15. By one of the trimming bits, following reconfiguration can be done during chip−level testing in order to fit the NCV7420_3 into different interface: pins TxD and EN will have typ. 10 kW pull−down resistor to ground and pin WAKE will have typ. 10 mA pull−up current source. http://onsemi.com 8 NCV7420 DC Characteristics – 3.3 V version (VBB = 5 V to 26 V; Tjunc = −40°C to +150°C; unless otherwise specified.) Table 9. DC CHARACTERISTICS I/Os Symbol Parameter Conditions Min. Typ. Max. Unit Vwake = 0 V; Vbb = 18 V −1 −0.5 1 mA Sleep mode; rising and falling edge 8 54 ms 0.8 V Pin WAKE I_leak T_wake_min Input leakage current (Note 15) Debounce time Pins TxD and STB Vil Low level input voltage Vih High level input voltage 2.0 Rpu Pull−up resistance to Vcc (Note 15) 50 V 200 kW 0.75 V 1 mA 0.8 V Pin INH Delta_VH I_leak High level voltage drop IINH = 15 mA Leakage current Sleep mode; VINH = 0 V 0.35 −1 Pin EN Vil Low level input voltage Vih High level input voltage 2.0 Rpd Pull−down resistance to ground (Note 15) 50 V 200 kW 0.65 V Pin RxD Vol Low level output voltage Isink = 2 mA Voh High level output voltage Isource = −2 mA Vcc − 0.65 V Conditions Min. V Table 10. DC CHARACTERISTICS Symbol Parameter Typ. Max. Unit 4.75 V POR PORH_Vbb POR high level Vbb comparator PORL_Vbb POR low level Vbb comparator POR_Vbb_sl 3 V Maximum slope on Vbb to guarantee POR 50 V/ms PORH_Vcc POR high level Vcc comparator 3 V PORL_Vcc POR low level Vcc comparator POR_Vcc_hyst Hysteresis of POR level Vcc comparator 2 V 100 mV TSD Tj Tj_hyst Junction temperature For shutdown Thermal shutdown hysteresis 165 195 °C 9 18 °C 14. Vγ is the forward diode voltage. Typically (over the complete temperature) Vγ = 1 V. 15. By one of the trimming bits, following reconfiguration can be done during chip−level testing in order to fit the NCV7420_3 into different interface: pins TxD and EN will have typ. 10 kW pull−down resistor to ground and pin WAKE will have typ. 10 mA pull−up current source. http://onsemi.com 9 NCV7420 DC Characteristics – 5 V version − (VBB = 6 V to 26 V; Tjunc = −40°C to +150°C; unless otherwise specified.) Table 11. DC CHARACTERISTICS SUPPLY − Pins VBB and VCC Symbol Parameter Conditions Max. Unit Ibb_ON Supply current Normal mode; LIN recessive Min. Typ. 1 mA Ibb_STB Supply current Stand−by mode, Vbb = 6 – 18 V 60 mA Ibb_SLP Supply current Sleep mode, Vbb = 6 – 18 V 20 mA Vcc_out Regulator output voltage Vcc load 1 mA − 30 mA 4.9 5.0 5.1 V Regulator output voltage Vcc load 0 mA − 50 mA 4.83 5.0 5.17 V Iout_max_cont Maximum output current Vbb = 16 V; Tamb = 105°C 30 mA Iout_max_conta Maximum output current Vbb = 26 V; limited lifetime 30 mA Iout_max_abs Absolute maximum output current Thermal shutdown can occur 50 mA Iout_lim Over−current limitation 150 mA Max. Unit 50 Table 12. DC CHARACTERISTICS LIN TRANSMITTER − Pin LIN Symbol Parameter Conditions Min. VLin_dom_LoSup LIN dominant output voltage TXD = low; Vbb = 7.3 V 1.2 V VLin_dom_HiSup LIN dominant output voltage TXD = low; Vbb = 18 V 2.0 V VLin_rec LIN recessive output voltage TXD = highH; Ilin = 0 mA Vbb − Vγ (Note 16) ILIN_lim Short circuit current limitation VLin = Vbb_max 40 Rslave Internal pull−up resistance 20 ILIN_off_dom LIN output current bus in dominant state Driver off; Vbb = 12 V ILIN_off_rec LIN output current bus in recessive state Driver off; Vbb = 12 V ILIN_no_GND Communication not affected Vbb = GND = 12 V; 0 < VLin < 18 V ILIN_no_Vbb LIN bus remains operational Vbb = GND = 0 V; 0 < VLin < 18 V Typ. V 33 200 mA 47 kW −1 mA −1 20 mA 1 mA 100 mA Max. Unit Table 13. DC CHARACTERISTICS LIN RECEIVER − Pin LIN Symbol Parameter Conditions Min. Typ. Vrec_dom Receiver threshold LIN bus recessive → dominant 0.4 0.6 Vbb Vrec_rec Receiver threshold LIN bus dominant → recessive 0.4 0.6 Vbb Vrec_cnt Receiver center voltage (Vbus_dom + Vbus_rec) /2 0.475 0.525 Vbb Vrec_hys Receiver hysteresis 0.05 0.175 Vbb Max. Unit 0.65 Vbb Table 14. DC CHARACTERISTICS I/OS Symbol Parameter Conditions Min. Typ. Pin WAKE V_wake_th Threshold voltage 0.35 16. Vγ is the forward diode voltage. Typically (over the complete temperature) Vγ = 1 V. 17. By one of the trimming bits, following reconfiguration can be done during chip−level testing in order to fit the NCV7420_5 into different interface: pins TxD and EN will have typ. 10 kW pull−down resistor to ground and pin WAKE will have typ. 10 mA pull−up current source. http://onsemi.com 10 NCV7420 DC Characteristics – 5 V version − (VBB = 6 V to 26 V; Tjunc = −40°C to +150°C; unless otherwise specified.) Table 14. DC CHARACTERISTICS I/OS Symbol Parameter Conditions Min. Typ. Max. Unit Vwake = 0 V; Vbb = 18 V −1 −0.5 1 mA Sleep mode; rising and falling edge 8 54 ms 0.8 V Pin WAKE I_leak T_wake_min Input leakage current (Note 17) Debounce time Pins TxD and STB Vil Low level input voltage Vih High level input voltage 2.0 Rpu Pull−up resistance to Vcc (Note 17) 50 V 200 kW 0.75 V 1 mA 0.8 V Pin INH Delta_VH I_leak High level voltage drop IINH = 15 mA Leakage current Sleep mode; VINH = 0 V 0.35 −1 Pin EN Vil Low level input voltage Vih High level input voltage 2.0 Rpd Pull−down resistance to ground (Note 17) 50 V 200 kW 0.65 V Pin RxD Vol Low level output voltage Isink = 2 mA Voh High level output voltage Isource = −2 mA Vcc − 0.65 V Conditions Min. V Table 15. DC CHARACTERISTICS Symbol Parameter Typ. Max. Unit 4.75 V POR PORH_Vbb POR high level Vbb comparator PORL_Vbb POR low level Vbb comparator POR_Vbb_sl 3 V Maximum slope on Vbb to guarantee POR 50 V/ms PORH_Vcc POR high level Vcc comparator 4.5 V PORL_Vcc POR low level Vcc comparator POR_Vcc_hyst Hysteresis of POR level Vcc comparator 3 V 100 mV TSD Tj Tj_hyst Junction temperature For shutdown Thermal shutdown hysteresis 165 195 °C 9 18 °C 16. Vγ is the forward diode voltage. Typically (over the complete temperature) Vγ = 1 V. 17. By one of the trimming bits, following reconfiguration can be done during chip−level testing in order to fit the NCV7420_5 into different interface: pins TxD and EN will have typ. 10 kW pull−down resistor to ground and pin WAKE will have typ. 10 mA pull−up current source. http://onsemi.com 11 NCV7420 AC Characteristics – 3.3 V and 5 V versions − (VBB = 7 V to 18 V; Tjunc = −40°C to +150°C; unless otherwise specified.) Table 16. AC CHARACTERISTICS LIN TRANSMITTER − Pin LIN Symbol Conditions Min. D1 Duty Cycle 1 = tBUS_REC(min) / (2 x TBit) Parameter THREC(min) = 0.284 x Vbb THDOM(min) = 0.422 x Vbb TBIT = 50 ms 0.396 Typ. Max. D2 Duty Cycle 2 = tBUS_REC(max) / (2 x TBit) THREC(max) = 0.744 x Vbb THDOM(max) = 0.581 x Vbb TBIT = 50 ms 0.581 Unit T_fall_norm LIN falling edge Normal slope mode; Vbb = 12 V; L1, L2 (Note 18) 22.5 ms T_rise_norm LIN rising edge Normal slope mode; Vbb = 12 V; L1, L2 (Note 18) 22.5 ms T_sym_norm LIN slope symmetry Normal slope mode; Vbb = 12 V; L1, L2 (Note 18) 4 ms T_fall_norm LIN falling edge Normal slope mode; Vbb = 12 V; L3 (Note 18) 27 ms T_rise_norm LIN rising edge Normal slope mode; Vbb = 12 V; L3 (Note 18) 27 ms T_sym_norm LIN slope symmetry Normal slope mode; Vbb = 12 V; L3 (Note 18) 5 ms −4 −5 T_fall_low LIN falling edge Low slope mode (Note 19); Vbb = 12 V; L3 (Note 18) 62 ms T_rise_low LIN rising edge Low slope mode (Note 19); Vbb = 12 V; L3 (Note 18) 62 ms 30 150 ms 6 20 ms T_wake Dominant time−out for wake−up via LIN bus T_dom TxD dominant time−out TxD = low 18. The AC parameters are specified for following RC loads on the LIN bus: L1 = 1 kW / 1 nF; L2 = 660 W / 6.8 nF; L3 = 500 W / 10 nF. 19. Low slope mode is not compliant to the LIN 1.3 or LIN 2.0 standard. http://onsemi.com 12 NCV7420 TxD tBIT tBIT 50% t tBUS_dom(max) LIN tBUS_rec(min) THRec(max) THDom(max) Thresholds of receiving node 1 THRec(min) THDom(min) Thresholds of receiving node 2 t tBUS_dom(min) tBUS_rec(max) Figure 6. LIN Transmitter Duty Cycle LIN 100% 60% 60% 40% 40% 0% T_fall t T_rise Figure 7. LIN Transmitter Rising and Falling Times Table 17. AC CHARACTERISTICS LIN RECEIVER Symbol Pin LIN Parameter Conditions Trec_prop_down Propagation delay of receiver falling edge Trec_prop_up Propagation delay of receiver rising edge Trec_sym Propagation delay symmetry Trec_prop_down − Trec_prop_up http://onsemi.com 13 Min. Typ. Max. Unit 0.1 6 ms 0.1 6 ms −2 2 ms NCV7420 LIN Vbb 60% Vbb 40% Vbb t RxD trec_prop_down trec_prop_up 50% t Figure 8. LIN Receiver Timing ORDERING INFORMATION Container Description Package Shipping† Qty. Temperature Range NCV7420D23G LIN Transceiver + 3.3 V Vreg. SOIC 150 14 GREEN (JEDEC MS−012) Tube/Rail 55 −40°C to 105°C NCV7420D23R2G LIN Transceiver + 3.3 V Vreg. SOIC 150 14 GREEN (JEDEC MS−012) Tape & Reel 3000 −40°C to 105°C NCV7420D25G LIN Transceiver + 5 V Vreg. SOIC 150 14 GREEN (JEDEC MS−012) Tube/Rail 55 −40°C to 105°C NCV7420D25R2G LIN Transceiver + 5 V Vreg. SOIC 150 14 GREEN (JEDEC MS−012) Tape & Reel 3000 −40°C to 105°C Part Number †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 14 NCV7420 PACKAGE DIMENSIONS SOIC 14 CASE 751AP−01 ISSUE A http://onsemi.com 15 NCV7420 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 16 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NCV7420/D