ONSEMI P6SMB24AT3

P6SMB6.8AT3 Series
600 Watt Peak Power Zener
Transient Voltage
Suppressors
Unidirectional*
The SMB series is designed to protect voltage sensitive
components from high voltage, high energy transients. They have
excellent clamping capability, high surge capability, low zener
impedance and fast response time. The SMB series is supplied in
ON Semiconductor’s exclusive, cost-effective, highly reliable
Surmetic™ package and is ideally suited for use in communication
systems, automotive, numerical controls, process controls, medical
equipment, business machines, power supplies and many other
industrial/consumer applications.
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PLASTIC SURFACE MOUNT
ZENER OVERVOLTAGE
TRANSIENT SUPPRESSORS
5.8−171 VOLTS
600 WATT PEAK POWER
Specification Features:
•
•
•
•
•
•
•
•
•
Working Peak Reverse Voltage Range − 5.8 to 171 V
Standard Zener Breakdown Voltage Range − 6.8 to 200 V
Peak Power − 600 W @ 1 ms
ESD Rating of Class 3 (>16 KV) per Human Body Model
Maximum Clamp Voltage @ Peak Pulse Current
Low Leakage < 5 mA Above 10 V
UL 497B for Isolated Loop Circuit Protection
Response Time is Typically < 1 ns
Pb−Free Packages are Available
Cathode
Anode
SMB
CASE 403A
PLASTIC
MARKING DIAGRAM
AYWW
xx G
G
Mechanical Characteristics:
CASE: Void-free, transfer-molded, thermosetting plastic
FINISH: All external surfaces are corrosion resistant and leads are
readily solderable
MAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES:
260°C for 10 Seconds
LEADS: Modified L−Bend providing more contact area to bond pads
POLARITY: Cathode indicated by polarity band
MOUNTING POSITION: Any
MAXIMUM RATINGS
A
Y
WW
xx
G
= Assembly Location
= Year
= Work Week
= Device Code (Refer to page 3)
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Please See the Table on the Following Page
Device
Package
Shipping †
SMB
2500/Tape & Reel
SMB
(Pb−Free)
2500/Tape & Reel
*Please see P6SMB11CAT3 to P6SMB91CAT3 for Bidirectional devices.
P6SMBxxxAT3
P6SMBxxxAT3G
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2007
February, 2007 − Rev. 8
1
Publication Order Number:
P6SMB6.8AT3/D
P6SMB6.8AT3 Series
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Peak Power Dissipation (Note 1) @ TL = 25°C, Pulse Width = 1 ms
PPK
600
W
DC Power Dissipation @ TL = 75°C
Measured Zero Lead Length (Note 2)
Derate Above 75°C
Thermal Resistance from Junction−to−Lead
PD
3.0
W
RqJL
40
25
mW/°C
°C/W
W
mW/°C
°C/W
DC Power Dissipation (Note 3) @ TA = 25°C
Derate Above 25°C
Thermal Resistance from Junction−to−Ambient
PD
RqJA
0.55
4.4
226
Forward Surge Current (Note 4) @ TA = 25°C
IFSM
100
A
TJ, Tstg
−65 to +150
°C
Operating and Storage Temperature Range
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. 10 X 1000 ms, non−repetitive
2. 1″ square copper pad, FR−4 board
3. FR−4 board, using ON Semiconductor minimum recommended footprint, as shown in 403A case outline dimensions spec.
4. 1/2 sine wave (or equivalent square wave), PW = 8.3 ms, duty cycle = 4 pulses per minute maximum.
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted, VF = 3.5 V Max. @
IF (Note 4) = 30 A) (Note 5)
Symbol
Maximum Reverse Peak Pulse Current
VC
Clamping Voltage @ IPP
IR
VBR
IT
QVBR
IF
Parameter
IPP
VRWM
I
Working Peak Reverse Voltage
VC VBR VRWM
IR VF
IT
Maximum Reverse Leakage Current @ VRWM
Breakdown Voltage @ IT
Test Current
Maximum Temperature Coefficient of VBR
IF
Forward Current
VF
Forward Voltage @ IF
IPP
Uni−Directional TVS
5. 1/2 sine wave or equivalent, PW = 8.3 ms, non−repetitive
duty cycle
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2
V
P6SMB6.8AT3 Series
ELECTRICAL CHARACTERISTICS (Devices listed in bold, italic are ON Semiconductor Preferred devices.)
Breakdown Voltage
VRWM
(Note 6)
IR @
VRWM
V
mA
Min
Nom
VC @ IPP (Note 8)
@ IT
VC
IPP
QVBR
Ctyp
(Note 9)
Max
mA
V
A
%/°C
pF
VBR V (Note 7)
Device
Device
Marking
P6SMB6.8AT3, G
P6SMB7.5AT3, G
P6SMB8.2AT3, G
P6SMB9.1AT3, G
6V8A
7V5A
8V2A
9V1A
5.8
6.4
7.02
7.78
1000
500
200
50
6.45
7.13
7.79
8.65
6.8
7.51
8.2
9.1
7.14
7.88
8.61
9.55
10
10
10
1
10.5
11.3
12.1
13.4
57
53
50
45
0.057
0.061
0.065
0.068
2380
2180
2015
1835
P6SMB10AT3, G
P6SMB11AT3, G
P6SMB12AT3, G
P6SMB13AT3, G
10A
11A
12A
13A
8.55
9.4
10.2
11.1
10
5
5
5
9.5
10.5
11.4
12.4
10
11.05
12
13.05
10.5
11.6
12.6
13.7
1
1
1
1
14.5
15.6
16.7
18.2
41
38
36
33
0.073
0.075
0.078
0.081
1690
1550
1435
1335
P6SMB15AT3, G
P6SMB16AT3, G
P6SMB18AT3, G
P6SMB20AT3, G
15A
16A
18A
20A
12.8
13.6
15.3
17.1
5
5
5
5
14.3
15.2
17.1
19
15.05
16
18
20
15.8
16.8
18.9
21
1
1
1
1
21.2
22.5
25.2
27.7
28
27
24
22
0.084
0.086
0.088
0.09
1175
1110
1000
910
P6SMB22AT3,G
P6SMB24AT3, G
P6SMB27AT3, G
P6SMB30AT3, G
22A
24A
27A
30A
18.8
20.5
23.1
25.6
5
5
5
5
20.9
22.8
25.7
28.5
22
24
27.05
30
23.1
25.2
28.4
31.5
1
1
1
1
30.6
33.2
37.5
41.4
20
18
16
14.4
0.092
0.094
0.096
0.097
835
775
700
635
P6SMB33AT3, G
P6SMB36AT3, G
P6SMB39AT3, G
P6SMB43AT3, G
33A
36A
39A
43A
28.2
30.8
33.3
36.8
5
5
5
5
31.4
34.2
37.1
40.9
33.05
36
39.05
43.05
34.7
37.8
41
45.2
1
1
1
1
45.7
49.9
53.9
59.3
13.2
12
11.2
10.1
0.098
0.099
0.1
0.101
585
540
500
460
P6SMB47AT3, G
P6SMB51AT3, G
P6SMB56AT3, G
P6SMB62AT3, G
47A
51A
56A
62A
40.2
43.6
47.8
53
5
5
5
5
44.7
48.5
53.2
58.9
47.05
51.05
56
62
49.4
53.6
58.8
65.1
1
1
1
1
64.8
70.1
77
85
9.3
8.6
7.8
7.1
0.101
0.102
0.103
0.104
425
395
365
335
P6SMB68AT3, G
P6SMB75AT3, G
P6SMB82AT3, G
P6SMB91AT3, G
68A
75A
82A
91A
58.1
64.1
70.1
77.8
5
5
5
5
64.6
71.3
77.9
86.5
68
75.05
82
91
71.4
78.8
86.1
95.5
1
1
1
1
92
103
113
125
6.5
5.8
5.3
4.8
0.104
0.105
0.105
0.106
305
280
260
235
P6SMB100AT3, G
P6SMB110AT3, G
P6SMB120AT3, G
P6SMB130AT3, G
100A
110A
120A
130A
85.5
94
102
111
5
5
5
5
95
105
114
124
100
110.5
120
130.5
105
116
126
137
1
1
1
1
137
152
165
179
4.4
4.0
3.6
3.3
0.106
0.107
0.107
0.107
215
200
185
170
P6SMB150AT3, G
P6SMB160AT3, G
P6SMB170AT3, G
P6SMB180AT3, G
150A
160A
170A
180A
128
136
145
154
5
5
5
5
143
152
162
171
150.5
160
170
180
158
168
179
189
1
1
1
1
207
219
234
246
2.9
2.7
2.6
2.4
0.108
0.108
0.108
0.108
150
140
135
130
P6SMB200AT3, G
200A
171
5
190
200
210
1
274
2.2
0.108
115
6. A transient suppressor is normally selected according to the working peak reverse voltage (VRWM), which should be equal to or greater than
the DC or continuous peak operating voltage level.
7. VBR measured at pulse test current IT at an ambient temperature of 25°C.
8. Surge current waveform per Figure 2 and derate per Figure 3.
9. Bias Voltage = 0 V, F = 1 MHz, TJ = 25°C
* The “G” suffix indicates Pb−Free package available.
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3
P6SMB6.8AT3 Series
NONREPETITIVE
PULSE WAVEFORM
SHOWN IN FIGURE 2
PULSE WIDTH (tP) IS DEFINED AS
THAT POINT WHERE THE PEAK
CURRENT DECAYS TO 50% OF
IPP.
tr≤ 10 ms
100
10
PEAK VALUE − IPP
VALUE (%)
PP, PEAK POWER (kW)
100
I
HALF VALUE − PP
2
50
1
tP
0.1
0.1 ms
1 ms
10 ms
100 ms
1 ms
0
10 ms
0
1
2
Figure 1. Pulse Rating Curve
5
Figure 2. Pulse Waveform
160
10,000
140
P6SMB6.8AT3G
120
C, CAPACITANCE (pF)
PEAK PULSE DERATING IN % OF
PEAK POWER OR CURRENT @ TA = 25° C
4
t, TIME (ms)
tP, PULSE WIDTH
100
80
60
40
1000
P6SMB18AT3G
P6SMB51AT3G
100
P6SMB200AT3G
10
TJ = 25°C
f = 1 MHz
20
0
3
0
25
50
75
100
125
150
1
1
10
TA, AMBIENT TEMPERATURE (°C)
100
1000
BIAS VOLTAGE (VOLTS)
Figure 3. Pulse Derating Curve
Figure 4. Typical Junction Capacitance vs.
Bias Voltage
TYPICAL PROTECTION CIRCUIT
Zin
LOAD
Vin
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4
VL
P6SMB6.8AT3 Series
APPLICATION NOTES
RESPONSE TIME
minimum lead lengths and placing the suppressor device as
close as possible to the equipment or components to be
protected will minimize this overshoot.
Some input impedance represented by Zin is essential to
prevent overstress of the protection device. This impedance
should be as high as possible, without restricting the circuit
operation.
In most applications, the transient suppressor device is
placed in parallel with the equipment or component to be
protected. In this situation, there is a time delay associated
with the capacitance of the device and an overshoot
condition associated with the inductance of the device and
the inductance of the connection method. The capacitive
effect is of minor importance in the parallel protection
scheme because it only produces a time delay in the
transition from the operating voltage to the clamp voltage as
shown in Figure 5.
The inductive effects in the device are due to actual
turn-on time (time required for the device to go from zero
current to full current) and lead inductance. This inductive
effect produces an overshoot in the voltage across the
equipment or component being protected as shown in
Figure 6. Minimizing this overshoot is very important in the
application, since the main purpose for adding a transient
suppressor is to clamp voltage spikes. The SMB series have
a very good response time, typically < 1 ns and negligible
inductance. However, external inductive effects could
produce unacceptable overshoot. Proper circuit layout,
DUTY CYCLE DERATING
The data of Figure 1 applies for non-repetitive conditions
and at a lead temperature of 25°C. If the duty cycle increases,
the peak power must be reduced as indicated by the curves
of Figure 7. Average power must be derated as the lead or
ambient temperature rises above 25°C. The average power
derating curve normally given on data sheets may be
normalized and used for this purpose.
At first glance the derating curves of Figure 7 appear to be
in error as the 10 ms pulse has a higher derating factor than
the 10 ms pulse. However, when the derating factor for a
given pulse of Figure 7 is multiplied by the peak power value
of Figure 1 for the same pulse, the results follow the
expected trend.
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5
P6SMB6.8AT3 Series
V
V
Vin (TRANSIENT)
OVERSHOOT DUE TO
INDUCTIVE EFFECTS
Vin (TRANSIENT)
VL
VL
Vin
td
tD = TIME DELAY DUE TO CAPACITIVE EFFECT
t
t
Figure 5.
Figure 6.
1
0.7
DERATING FACTOR
0.5
0.3
0.2
PULSE WIDTH
10 ms
0.1
0.07
0.05
1 ms
0.03
100 ms
0.02
10 ms
0.01
0.1 0.2
0.5
1
2
5
10
D, DUTY CYCLE (%)
20
50 100
Figure 7. Typical Derating Factor for Duty Cycle
UL RECOGNITION
The entire series has Underwriters Laboratory
Recognition for the classification of protectors (QVGV2)
under the UL standard for safety 497B and File #E210057.
Many competitors only have one or two devices recognized
or have recognition in a non-protective category. Some
competitors have no recognition at all. With the UL497B
recognition, our parts successfully passed several tests
including Strike Voltage Breakdown test, Endurance
Conditioning,
Temperature
test,
Dielectric
Voltage-Withstand test, Discharge test and several more.
Whereas, some competitors have only passed a
flammability test for the package material, we have been
recognized for much more to be included in their Protector
category.
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6
P6SMB6.8AT3 Series
PACKAGE DIMENSIONS
SMB
CASE 403A−03
ISSUE F
HE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. D DIMENSION SHALL BE MEASURED WITHIN DIMENSION P.
E
b
DIM
A
A1
b
c
D
E
HE
L
L1
D
MIN
1.90
0.05
1.96
0.15
3.30
4.06
5.21
0.76
MILLIMETERS
NOM
MAX
2.13
2.45
0.10
0.20
2.03
2.20
0.23
0.31
3.56
3.95
4.32
4.60
5.44
5.60
1.02
1.60
0.51 REF
MIN
0.075
0.002
0.077
0.006
0.130
0.160
0.205
0.030
INCHES
NOM
0.084
0.004
0.080
0.009
0.140
0.170
0.214
0.040
0.020 REF
MAX
0.096
0.008
0.087
0.012
0.156
0.181
0.220
0.063
A
L
L1
A1
c
SOLDERING FOOTPRINT*
2.261
0.089
2.743
0.108
2.159
0.085
SCALE 8:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SURMETIC is a trademark of Semiconductor Components Industries, LLC.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
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Phone: 421 33 790 2910
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Phone: 81−3−5773−3850
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7
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
P6SMB6.8AT3/D