PIXART PAN101BOI-204

PAN101B
PAN101B CMOS OPTICAL NAVIGATION SENSOR
General Description
The PAN101B is a low cost CMOS process optical navigation sensor with DSP integration chip that serves as a
non-mechanical motion estimation engine for implementing a computer mouse.
Features
Key Specification
Single 3.0 volt power supply
Optical motion estimation technology
Power Supply
Complete 2-D motion sensor
No mechanical parts
Optical Lens
Accurate motion estimation over a wide
System Clock
range of surfaces
High speed motion detection up to 16+ Speed
inches/sec
Resolution
High resolution up to 800cpi
Shutdown pin for low power dissipation.
Frame Rate
Power saving mode during times of no
movement
Wide operating supply range
2.7V~3.6V
1:1
18.432 MHz
16+ inches/sec
400/800 cpi
3000 frames/sec
<15mA @Mouse moving (Normal)
Serial Interface for programming and data Operating
Current
transfer
< 5mA @Mouse not moving (sleep1)
I/O pin 5.0 volt tolerance
< 100uA @Shutdown mode
Package
< 2mA @Mouse not moving (sleep2)
Shrunk DIP20
Ordering Information
Order number
PAN101BOI-204
PAN101BOI-208
PAN101BSI-204
PAN101BSI-208
I/O
Open-drain output
Open-drain output
CMOS output
CMOS output
Resolution
400 cpi
800 cpi
400 cpi
800 cpi
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V1.4, FEB. 2003
PixArt Imaging Inc.
PAN101B
CMOS Optical Navigation Sensor
1. Pin Description
Pin No.
Name
Type
Definition
1
2
3
4
5
6
7
8
9
10
11
VSS_LED
LED
OSCOUT
OSCIN
VSSD
VSSA
VDDD
VDDA
VRB
VRT
VAY
GND
I/O
OUT
IN
GND
GND
PWR
PWR
BYPASS
BYPASS
BYPASS
LED ground
LED control
Resonator output
Resonator input
Chip digital ground
Chip analog ground
Chip digital power VDD, 3.0V
Chip analog power VDD, 3.0V
Analog voltage reference
Analog voltage reference
Analog voltage reference
12
XA
13
NC
14
XB
15
YA
16
NC
17
YB
18
SCLK
19
SDIO
20
PD
Open-drain OUT (PAN101BOI)
XA quadrature output
CMOS OUT (PAN101BSI)
-
No connection
Open-drain OUT (PAN101BOI)
XB quadrature output
CMOS OUT (PAN101BSI)
Open-drain OUT (PAN101BOI)
YA quadrature output
CMOS OUT (PAN101BSI)
Open-drain OUT (PAN101BOI)
No connection
YB quadrature output
CMOS OUT (PAN101BSI)
IN
Serial interface clock
Open-drain I/O (PAN101BOI)
Serial interface bi-direction data
CMOS I/O (PAN101BSI)
IN
1
Power down pin, active high
20
LB
+Y
10
RB
1
20
10
11
11
+X
Figure 1. Top View Pinout
Figure 2. Top View of Mouse
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V1.4, FEB. 2003
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PAN101B
CMOS Optical Navigation Sensor
2. Block Diagram and Operation
LED
DRIVE
POWER ON
RESET
CMOS
IMAGE
SENSOR
OUTPUTS
SERIAL
INTERFACE
XA
XB
YA
YB
SCLK
SDIO
QUADRATURE
OUTPUT
QUADRATURE
SERIAL
INTERFACE
DIGITAL
SIGNAL
PROCESSOR
CONTROL REGISTER
VOLTAGE REGULATOR
AND POWER CONTROL
LED
VSS_LED
OSCILLATOR
VDDD
VDDA
VSSD
VSSA
3V
POWER
PD
VRB
VRT
VAY
VOLTAGE
REFERENCE
OSCIN
OSCOUT
RESONATOR
Figure 3. Block Diagram
The PAN101B is a low cost CMOS-process optical navigation sensor with DSP integration chip that
serves as a non-mechanical motion estimation engine for implementing a computer mouse. It is based on
optical navigation technology, which measures changes in position by optically acquiring sequential
surface images (frames) and mathematically determining the direction and magnitude of movement. The
sensor is in a 20 pin optical package. The output format is two-channel quadrature (X and Y direction),
which emulates encoder phototransistors. The current X and Y information are also available in registers
accessed via a serial port.
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V1.4, FEB. 2003
PixArt Imaging Inc.
PAN101B
CMOS Optical Navigation Sensor
3. Registers and Operation
The PAN101B can be programmed through registers, via the serial port, and DSP configuration and
motion data can be read from these registers. All registers not listed are reserved, and should never be
written by firmware.
3.1 Registers
Address
0x00
0x01
0x02
0x03
0x04
0x05
Name
Product_ID
Reserved
Motion_Status
Delta_X
Delta_Y
Operation_Mode
R/W
R
R
R
R
R/W
Default
0x02
-
Data Type
Eight bits number with the product identifier.
Reserved for future.
Bit field
Eight bits 2’s complement number.
Eight bits 2’s complement number.
Bit field
3.2 Register descriptions
0x00
Product_ID
Bit
7
6
5
4
3
2
1
0
Field
PID7
PID6
PID5
PID4
PID3
PID2
PID1
PID0
Usage
The value in this register can not change, it can be used to verify that the serial communications link
is OK.
0x01
Reserved
Bit
7
6
Field
Usage
5
4
3
2
1
0
Reserved
Reserved for future
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PAN101B
CMOS Optical Navigation Sensor
0x02
Motion_Status
Bit
7
6
5
4
3
2
1
0
Field
Motion
Reserved
Reserved
DYOVF
DXOVF
Reserved
Reserved
RES
Usage
Register 0x02 allows the user to determine if motion has occurred since the last time it was read. If
so, then the user should read registers 0x03 and 0x04 to get the accumulated motion. It also tells if
the motion buffers have overflowed since the last reading. The current resolution is also shown.
Reading this register freezes the Delta_X and Delta_Y register values. Read this register before
reading the Delta_X and Delta_Y registers. If Delta_X and Delta_Y are not read before the motion
register is read a second time, the data in Delta_X and Delta_Y will be lost.
Notes
Field Name
Description
Motion
Motion since last report or PD
0 = No motion (Default)
1 = Motion occurred, data ready for reading in Delta_X and Delta_Y registers
Reserved
Reserved for future
Reserved
Reserved for future
DYOVF
DXOVF
Motion Delta Y overflow, ∆Y buffer has overflowed since last report
0 = no overflow (Default)
1 = Overflow has occurred
Motion Delta X overflow, ∆X buffer has overflowed since last report
0 = no overflow (Default)
1 = Overflow has occurred
Reserved
Reserved for future
Reserved
Reserved for future
RES
Resolution in counts per inch
0 = 800 (Default @ PAN101BXX-208)
1 = 400 (Default @ PAN101BXX-204)
0x03
Delta_X
Bit
7
6
5
4
3
2
1
0
Field
X7
X6
X5
X4
X3
X2
X1
X0
Usage
X movement is counts since last report. Absolute value is determined by resolution. Reading clears
the register. Report range –128~+127.
0x04
Delta_Y
Bit
7
6
5
4
3
2
1
0
Field
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
Usage
Y movement is counts since last report. Absolute value is determined by resolution. Reading clears
the register. Report range –128~+127.
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PAN101B
CMOS Optical Navigation Sensor
0x05
Operation_Mode
Bit
7
6
5
4
3
2
1
0
Field
Reserved
XY_enh
RES
Slp_enh
Slp2au
Slp2mu
Slp1mu
Wakeup
Usage
Register 0x05 allows the user to change the operation of the sensor. Shown below are the bits, their
default values, and optional values.
Operation_Mode[4:0]
“0xxxx”=Disable sleep mode
“10xxx”=Enable sleep mode1
“11xxx”=Enable sleep mode2
“1x100”=Force enter sleep23
“1x010”=Force enter sleep13
“1x001”=Force wakeup from sleep mode3
Notes:
1. Enable sleep mode, but disable automatic entering sleep2 mode, that is, only 2 modes will be
used, normal mode and sleep1 mode. After 1 sec not moving during normal mode, the chip will
enter sleep1 mode, and keep on sleep1 mode until moving is detected or wakeup is asserted.
2. Enable sleep mode full function, that is 3 modes will be used, normal mode, sleep1 mode and
sleep2 mode. After 1 sec not moving during normal mode, chip will enter sleep1 mode, and keep
on sleep1 mode until moving is detected or wakeup is asserted.
And after 90 sec not moving during sleep1 mode, the chip will enter sleep2 mode, and keep on
sleep2 mode until detect moving or force wakeup to normal mode.
Mode
Sleep1
Sleep2
Sampling rate @3000frame/sec
30/sec
3/sec
Active duty cycle @3000frame/sec
20%
2%
3. Only one of these three bits slp2mu_enh, slp1mu_enh, and wakeup can be set to 1 at the same
time, others have to be set to 0. After a period of time, the bits, which was set to 1, will be reset
to 0 by internal signal.
Notes
Field Name
Description
Reserved
Reserved for future, Please set Reserved= “0” (Default)
XY_enh
RES
Slp_enh
Slp2au
XY quadrature output enable/disable
0=disable
1= enable (Default)
Resolution in counts per inch
0 = 800 (Default @ PAN101BXX-208)
1 = 400 (Default @ PAN101BXX-204)
Sleep mode enable/disable
0 = Disable
1 = Enable (Default)
Automatic enter sleep2 mode enable/disable
0 = Disable
1 = Enable (Default)
Slp2mu
Manual enter sleep2 mode, set “1” will enter sleep2 and this bit will be reset to “0”
Slp1mu
Manual enter sleep1 mode, set “1” will enter sleep2 and this bit will be reset to “0”
Wakeup
Manual wake up from sleep mode, set “1” will enter wakeup and this bit will be
reset to “0”
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V1.4, FEB. 2003
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PAN101B
CMOS Optical Navigation Sensor
4. Specifications
Absolute Maximum Ratings
Symbol
Parameter
Min
Max
Unit
Notes
TSTG
Storage temperature
-40
85
℃
TA
Operating Temperature
-15
55
°C
260
°C
4.0
V
2
kV
All pins, human body model MIL
883 Method 3015
-0.5
5.5
V
PD, SDIO, SCLK, XA, XB, YA, YB
Typ.
Max.
Unit
Notes
40
°C
3.0
3.6
V
100
mV
Peak to peak within 0-100 MHz
18.432
24.576
MHz
Set by ceramic resonator
3000
4000
Lead Solder Temp
VDD
-0.5
DC supply voltage
ESD
VIN
DC input voltage
Recommend Operating Condition
Symbol
Parameter
Min.
Operating
0
TA
Temperature
VDD
Power supply voltage 2.7
VN
Supply noise
FCLK
Clock Frequency
FR
S
Frame Rate
Serial Port Clock
Frequency
Distance from lens
reference plane to
surface
Speed
A
Acceleration
R
Resolution
SCLK
Z
2.1
2.2
0
16
400
For 10 seconds, 1.6mm below
seating plane.
Frames/s 4000Frames/s @ FCLK=24.567MHz
FCLK /4
MHz
2.3
mm
Refer to Figure 4.
in/sec
3.9
g
800
cpi
Package Lid
Lens
Z
OBJECT SURFACE
Figure 4. Distance from Lens Reference Plane to Surface
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V1.4, FEB. 2003
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PAN101B
CMOS Optical Navigation Sensor
AC Operating Condition
Electrical Characteristics over recommended operating conditions. Typical values at 25 °C, VDD =3.0 V
Symbol
Parameter
Min. Typ.
Notes
Max. Unit
tPD
Power Down
0.5
us
500, 5
From PD↑. (Refer to Figure 5.)
Pulse width to reset the serial interface.
us
(Refer to Figure 5.)
From PD↓ to valid quad signals
ms
200usec + 128frames. (Refer to Figure 5.)
From VDD↑ to valid quad signals.
ms
400usec + 124frames.
Minimum hold time for valid data. (Refer to
us
Figure 14.)
After tCOMPUTE, all registers contain valid
data from first image after PD↓. Note that
an additional 128 frames for Auto-Exposure
ms
(AE) stabilization may be required if mouse
movement occurred while PD was high.
(Refer to Figure 8.)
ns Pull-up 10Kohm (PAN101BOI)
tPDW
PD Pulse Width
tPUPD
Power Up from PD↓
42.8
tPU
Power Up from VDD↑
41.7
tHOLD
SDIO read hold time
tCOMPUTE
Data delay after PD↓
tr,tf
Rise and Fall Times:
SDIO
25, 20
ns
CL = 30pf
tr,tf
Rise and Fall Times:
XA, XB, YA, YB
500, 5
ns
Pull-up 10Kohm (PAN101BOI)
25, 20
ns
CL = 30pf
tr,tf
Rise and Fall Times:
ILED
10, 10
ns
LED bin:N ; R1=100ohm
1
3
4
(PAN101BSI)
(PAN101BSI)
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PAN101B
CMOS Optical Navigation Sensor
DC Electrical Characteristics
Electrical Characteristics over recommended operating conditions. Typical values at 25 °C, V DD =3.0 V
Symbol
Parameter
Min.
Type: PWR
Supply Current
IDD
Mouse moving (Normal)
Supply Current
IDD
Mouse not moving (sleep1)
Supply Current
IDD
Mouse not moving (sleep2)
Supply Current
IDDPD
(Power Down)
Type: SCLK, SDIO, PD
VIH
Input voltage HIGH
VIL
Input voltage LOW
VOH
Output voltage HIGH
VOL
Output voltage LOW
Typ.
Max.
Unit
15
mA XA, XB, YA, YB, SCLK, SDIO = no load
5
mA
2
mA
100
uA PD, SCLK, SDIO = high
2
0.8
V
V
@I OH = 3mA (SDIO only)
0.2VDD
V
@I OL = 3mA (SDIO only)
V
When driving from an external source
V
When driving from an external source
0.8 VDD
Type: OSCIN
VIH
Input voltage HIGH
VIL
Input voltage LOW
2
0.8
Type: LED
VOL
Output voltage LOW
150
mV @I OL = 25mA
Type: XA, XB, YA, YB
VOH
Output voltage HIGH
VOL
Output voltage LOW
0.8 VDD
0.2VDD
V
@I OH = 3mA
V
@I OL = 3mA
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PAN101B
CMOS Optical Navigation Sensor
5. PD Pin Timing
PD
tPDW
1us,min
IDD
200us
tPD
0.5us
128frames
tCOMPUTE
4ms,min
Figure 5. PD minimum pulse width
PD
tPUPD
42.8ms
tPDW
1us,min
SCLK
1
Hi-Z
SDIO
2
3
4
5
6
7
8
9
1
0
1
1
ADDRESS(R/W)
1
2
1
3
1
4
1
5
1
6
1
5
1
6
DATA
Figure 6. Forcing PAN101B SDIO line to the Hi-Z state
tPDW
1us,min
PD
SCLK
1
Hi-Z
SDIO
2
3
4
5
6
7
8
9
1
0
ADDRESS(R/W)
1
1
1
2
1
3
1
4
DATA
Figure 7. Forcing PAN101B full chip reset and SDIO line to the Hi-Z state
PD
SCLK
tPDW
1us,min
1 2 3
4 5 6
7 8 9
Address=0x04
1 1
0 1
1
2
1
3
1 1
4 5
1
6
1
2
3
4
5
6
7
8
Address=0x02
Data=0xFF
9
1 1
0 1
1
2
1
3
1
4
1
5
1
6
Data=0x80
SDIO
tCOMPUTE
4ms,min
Figure 8. Read the motion data from PAN101B
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V1.4, FEB. 2003
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PAN101B
CMOS Optical Navigation Sensor
6. Quadrature Mode
The quadrature state of the PAN101B tells mouse controller which direction the mouse is moving in. The
output format is two channels quadrature (X and Y direction), which emulates encoder phototransistors.
The DSP generates the ∆x and ∆y relative displacement values that are converted into two channel
quadrature signals. PAN101B support 400cpi, 800cpi, two types of resolution. The following diagrams
show the timing for positive X motion, to the right or positive Y motion, up.
6.1 Quadrature Output Timing
X motion to the right
Y motion up
XA/YA
FOUR
83.3us
83.3us
83.3us
83.3us
83.3us
83.3us
XB/YB
XA/YA
THREE
166.7us
XB/YB
XA/YA
83.3us
TWO
250us
XB/YB
XA/YA
333.3us
ONE
XB/YB
333.3us @ 3000frames/second
Figure 9. Quadrature Output Timing
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PAN101B
CMOS Optical Navigation Sensor
6.2 Quadrature Output State Machine
The following state machine shows the states of the quadrature output pins. The three things to note are
that state 0 is entered after a power on reset. While the PD pin is asserted, the state machine is halted.
Once PD is de-asserted, the state machine picks up from where it left off. During times of mouse no
movement will entry power saving mode, until mouse was moved.
PD
POWER ON RESET
+
N
O
TI
EC
N
IR
O
D
TI
+
EC
IR
-D
D
IR
EC
-D
TI
IR
O
N
EC
TI
O
N
STATE 0
(0,0)
STATE 1
(0,1)
XA/YA XB/YB
STATE 3
(1,0)
N
O
TI
EC
IR
N
O
-D
TI
EC
IR
D
+
0
0
0
1
0
1
2
1
1
3
1
0
PD
-D
IR
EC
+
TI
D
O
IR
N
EC
TI
O
N
PD
X/Y output
STATE
STATE 2
(1,1)
PD
Figure 10. State Machine
6.3 Quadrature Output Waveform
The following diagrams show the waveform of the two channel quadrature outputs. If the X, Y is
motionless, the (XA, XB), (YA, YB) will keep in final state. Each state change (ex. STATE2 → STATE3)
is one count.
X MOTION TO THE RIGHT
Y MOTION UP
( + DIRECTION )
XA/YA
XB/YB
STATE3
(1,0)
STATE0
(0,0)
+
1
STATE1
(0,1)
+
1
STATE2
(1,1)
+
1
STATE0
(0,0)
STATE3
(1,0)
+
1
+
1
MOTION COUNT
X MOTION TO THE LEFT
Y MOTION DOWN
( - DIRECTION )
XA/YA
XB/YB
STATE0
(0,0)
STATE1
(0,1)
1
STATE3
(1,0)
1
STATE2
(1,1)
1
STATE1
(0,1)
1
STATE0
(0,0)
1
MOTION COUNT
Figure 11. Quadrature Output Waveform
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PAN101B
CMOS Optical Navigation Sensor
7. Serial Interface
The synchronous serial port is used to set and read parameters in the PAN101B, and can be used to read
out the motion information instead of the quadrature data pins.
SCLK: The serial clock line. It is always generated by the host micro-controller.
SDIO: The serial data line used for write and read data.
PD:
A third line is sometimes involved. PD (Power Down pin) is usually used to place the PAN101B
in a low power mode to meet USB suspend specification. PD can also be used to force resynchronization between the micro-controller and the PAN101B in case of an error.
7.1 Transmission Protocol
The transmission protocol is a two-wire link, half duplex protocol between the micro-controller and
PAN101B. All data changes on SDIO are initiated by the falling edge on SCLK. The host microcontroller always initiates communication; the PAN101B never initiates data transfers.
The transmission protocol consists of the two operation modes:
- Write Operation.
- Read Operation.
Both of the two operation modes consist of two bytes. The first byte contains the address (seven bits) and
has a bit7 as its MSB to indicate data direction. The second byte contains the data.
SECOND BYTE
FIRST BYTE
R /W
(1 BIT)
ADDRESS (7 BIT)
MSB
DATA (8 BIT)
LSB
LSB
MSB
Figure 12. Transmission Protocol
7.1.1 Write Operation
A write operation, which means that data is going from the micro-controller to the PAN101B, is always
initiated by the micro-controller and consists of two bytes. The first byte contains the address (seven bits)
and has a “1” as its MSB to indicate data direction. The second byte contains the data. The transfer is
synchronized by SCLK. The micro-controller changes SDIO on falling edges of SCLK. The PAN101B
reads SDIO on rising edges of SCLK.
SCLK
SDIO
DON'T
CARE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
A6
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
DON'T
CARE
SDIO driven by Micro-controller
Figure 13. Write Operation
7.1.2 Read Operation
A read operation, which means that data is going from the PAN101B to the micro-controller, is always
initiated by the micro-controller and consists of two bytes. The first byte contains the address, is written
by the micro-controller, and has a “0” as its MSB to indicate data direction. The second byte contains the
data and is driven by the PAN101B. The transfer is synchronized by SCLK. SDIO is changed on falling
edges of SCLK and read on every rising edge of SCLK. The micro-controller must go to a high Z state
after the last address data bit. The PAN101B will go to the high Z state after the last data bit.
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PAN101B
SCLK
SDIO
CMOS Optical Navigation Sensor
1
DON'T
CARE
0
2
A6
3
A5
4
A4
5
A3
6
A2
7
8
A1 A0
Hi-z
9
10
11
12
13
14
15
16
D7
D6
D5
D4
D3
D2
D1
D0
SDIO driven by Micro-controller
SCLK
Note "B"
1. Micro-controller send address to PAN101B.
2. Micro-controller release and set SDIO to Hi-Z after the last address bit.
8
7
9
Hi-Z
A0
A1
SDIO
R/W bit of next address
SDIO driven by PAN101B
Note "A"
Note "A"
Hi-z
D7
t HOLD
3us,min
Note "B"
SCLK
1. PAN101B send data to Micro-controller .
2. PAN101B release and set SDIO to Hi-Z after the last data bit.
16
1
Hi-Z
SDIO
D0
R/W bit of next address
SDIO driven by micro-controller
Figure 14. Read Operation
7.2 Re-Synchronous Serial Interface
There are times when the SDIO line from the PAN101B should be in the Hi-Z state. If the microprocessor
has completed a write to the PAN101B, the SDIO line is Hi-Z, since the SDIO pin is still configured as an
input. However, if the last operation from the microprocessor was a read, the PAN101B will hold the D0
state on SDIO until a rising edge of SCLK. To place the SDIO pin into the Hi-Z state, first raise the PD
pin, and then toggle the SCLK line from high to low to high. The SDIO line will now be in the Hi-Z state.
The PAN101B and the micro-controller might get out of synchronization due to following condition.
7.2.1 USB suspend
Termination of a transmission by the micro-controller may sometimes be required (for example, due to a
USB suspend interrupt during a read operation). To accomplish this the micro-controller should raise PD.
The PAN101B will not write to any register and will reset the serial port (but nothing else) and be
prepared for the beginning of future transmissions after PD goes low.
7.2.2 Firmware flaws error, or others error
The PAN101B and the micro-controller might get out of synchronization due to micro-controller
firmware flaws. The PD pin can stay high, with the PAN101B in the shutdown state, or the PD pin can be
lowered, returning the PAN101B to normal operation.
If the microprocessor and the PAN101B get out of sync, then the data either written or read from the
registers will be incorrect. In such a case, an easy way to solve this is to raise PD to re-sync the parts after
an incorrect read. The PAN101B will reset the serial port but will not reset the registers and be prepared
for the beginning of a new transmission
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PixArt Imaging Inc.
E-mail: [email protected]
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PixArt Imaging Inc.
PAN101B
CMOS Optical Navigation Sensor
7.2.3 Power on problem
The problem occurs if the PAN101B powers up before the microprocessor sets the SCLK and SDIO lines
to be output.
7.2.4 ESD events
The PAN101B and the micro-controller might get out of synchronization due to ESD events.
If the PAN101B and the micro-controller might get out of synchronization due to power on problem or
ESD events. An easy way to solve this is to reset PAN101B.
Power on reset to resync PAN101B
=> Reset full chip and SDIO line set to Hi-Z state)
VDD
1us,min
PD
SCLK
SDIO
1
Hi-Z
2
3
4
5
6
ADDRESS(R/W)
7
8
9
10 11 12 13 14 15 16
DATA
Figure 15. Power on reset to resync. PAN101B
7.3 Collision detection on SDIO
The only time that the PAN101B drives the SDIO line is during a READ operation. To avoid data
collisions, the micro-controller should release SDIO before the falling edge of SCLK after the last address
bit. The PAN101B begins to drive SDIO after the next falling edge of SCLK. The PAN101B release
SDIO of the rising SCLK edge after the last data bit. The micro-controller can begin driving SDIO any
time after that. In order to maintain low power consumption in normal operation or when the PD pin is
pulled high, the micro-controller should not leave SDIO floating until the next transmission (although that
will not cause any communication difficulties).
7.4 Error detection and recovery
1.The micro-controller can verify success of write operations by issuing a read command to the same
address and comparing written data to read data.
2. The micro-controller can verify the synchronization of the serial port by periodically reading the
product ID register.
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PixArt Imaging Inc.
E-mail: [email protected]
15
V1.4, FEB. 2003
+
AGND
+
VOUT
All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission.
+
AGND
+
VIN
10pF
10pF
10uF
C4
3.3V REGULATOR
Q1(AIC1722)
DGND
C2
C1
LED
C6
C5
0.1uF
C3
AGND
DGND
AGND
0.1uF
1uF
X1 18.432MHz
DGND
10
9
8
7
6
5
4
3
2
1
VRT
VRB
VDDA
10pF
10pF
10uF
C4
3.3V REGULATOR
Q1(AIC1722)
DGND
C2
C1
R1
C6
C5
0.1uF
C3
AGND
DGND
AGND
0.1uF
1uF
X1 18.432MHz
LED
D1
DGND
10
9
8
7
6
5
4
3
2
1
VSS_LED
VRT
VRB
VDDA
U1
VAY
XA
NC
XB
YA
NC
YB
SCLK
SDIO
PD
PAN101BSI
VDDD
VSSA
VSSD
OSCIN
OSCOUT
LED
VAY
XA
NC
XB
YA
NC
YB
SCLK
SDIO
PD
PAN101BOI
VDDD
VSSA
VSSD
OSCIN
OSCOUT
LED
VSS_LED
U1
Figure 17. Application circuit using serial interface with PAN101BSI
1uF
C7
GND
VIN PAD
VOUT
11
12
13
14
15
16
17
18
19
20
11
12
13
14
15
16
17
18
19
20
300K
R2
9
5
1
4
3
2
9
5
1
4
3
2
XTALOUT
P1.1
P0.7
VSS
VPP
VREG
D-/SDATA
D+/SCLK
VCC
P0.4
P0.5
P0.6
U2
XTALOUT
P1.1
P0.7
VSS
VPP
VREG
D-/SDATA
D+/SCLK
VCC
P0.4
P0.5
P0.6
CY7C63723-PC
XTALIN
P1.0
P0.0
P0.3
P0.2
P0.1
CY7C63723-PC
XTALIN
P1.0
P0.0
P0.3
P0.2
P0.1
U2
+
DGND
10uF
C9
+
10uF
C9
DGND
10
14
15
6
7
COM
ENCODER
B
A
ENSW1
DGND AGND
GND
D+/SCLK
VCC_5V
8
1.3K
DGND DGND
0.1uF
C8
R
M
L
DGND AGND
D-/SDATA
R6
SW3
SW2
SW1
COM
ENCODER
B
A
ENSW1
12
13
11
18
17
16
10
14
15
6
7
GND
D+/SCLK
VCC_5V
8
1.3K
DGND DGND
0.1uF
C8
R
M
L
D-/SDATA
R6
SW3
SW2
SW1
12
13
11
18
17
16
HEADER 4
4
3
2
1
JP1
HEADER 4
4
3
2
1
JP1
PAN101B
+
PixArt Imaging Inc.
E-mail: [email protected]
Figure 16. Application circuit using serial interface with PAN101BOI
1uF
C7
VIN
VIN PAD
GND
D1
+
R1
PixArt Imaging Inc.
CMOS Optical Navigation Sensor
8. Referencing application circuit
8.1 Recommended typical application using serial interface
16
V1.4, FEB. 2003
PixArt Imaging Inc.
PAN101B
CMOS Optical Navigation Sensor
Figure 18. Example printed circuit board layout. (PAN101BOI V.S CY7C63723-PC)
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PixArt Imaging Inc.
E-mail: [email protected]
17
V1.4, FEB. 2003
VIN
+
AGND
+
VOUT
10pF
10pF
10uF
C4
3.3V REGULATOR
Q1(AIC1722)
DGND
C2
C1
R1
C6
C5
0.1uF
C3
AGND
DGND
AGND
0.1uF
1uF
X1 18.432MHz
LED
D1
DGND
10
9
8
7
6
5
4
3
2
1
VRT
VRB
U1
VAY
XA
NC
XB
YA
NC
YB
SCLK
SDIO
PD
PAN101BOI
VDDA
VDDD
VSSA
VSSD
OSCIN
OSCOUT
LED
VSS_LED
11
12
13
14
15
16
17
18
19
20
All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission.
+
AGND
+
10pF
10pF
10uF
C4
3.3V REGULATOR
Q1(AIC1722)
DGND
C2
C1
C6
C5
0.1uF
C3
AGND
DGND
AGND
0.1uF
1uF
X1 18.432MHz
LED
D1
DGND
10
9
8
7
6
5
4
3
2
1
VRT
VRB
PD
VAY
XA
NC
XB
YA
NC
YB
SCLK
SDIO
PAN101BSI
VDDA
VDDD
VSSA
VSSD
OSCIN
OSCOUT
LED
VSS_LED
U1
11
12
13
14
15
16
17
18
19
20
Figure 20. Application circuit using quadrature output pins with PAN101BSI
1uF
C7
VIN
VIN PAD
GND
R1
Figure 19. Application circuit using quadrature output pins with PAN101BOI
1uF
C7
GND
VIN PAD
VOUT
VCC_5V
R3
R5
R4
300K 300K 300K 300K
R2
VCC_5V
9
4
3
2
1
5
U2
XTALOUT
P1.1
P0.7
VSS
VPP
VREG
D-/SDATA
D+/SCLK
VCC
P0.4
P0.5
P0.6
XTALIN
P0.3
P0.2
P0.1
P0.0
P1.0
U2
XTALOUT
P1.1
P0.7
VSS
VPP
VREG
D-/SDATA
D+/SCLK
VCC
P0.4
P0.5
P0.6
CY7C63723-PC
XTALIN
P0.3
P0.2
P0.1
P0.0
P1.0
CY7C63723-PC
9
4
3
2
1
5
10uF
C9
+
10uF
C9
DGND
D+/SCLK
VCC_5V
10
14
15
6
7
COM
ENCODER
B
A
ENSW 1
DGND AGND
GND
1.3K
DGND DGND
0.1uF
C8
R
M
L
DGND AGND
8
R6
SW3
SW2
SW1
COM
ENCODER
B
A
ENSW 1
12
10
14
15
6
7
GND
8
1.3K
VCC_5V
D+/SCLK
D-/SDATA
13
11
18
17
16
+
DGND
DGND DGND
0.1uF
C8
R
M
L
D-/SDATA
R6
SW3
SW2
SW1
12
13
11
18
17
16
HEADER 4
4
3
2
1
JP1
HEADER 4
4
3
2
1
JP1
PAN101B
+
PixArt Imaging Inc.
E-mail: [email protected]
+
.
PixArt Imaging Inc.
CMOS Optical Navigation Sensor
8.2 Application circuit using quadrature output pins
18
V1.4, FEB. 2003
PixArt Imaging Inc.
PAN101B
CMOS Optical Navigation Sensor
Figure 21. Example printed circuit board layout. (PAN101BOI V.S CY7C63723-PC)
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PixArt Imaging Inc.
E-mail: [email protected]
19
V1.4, FEB. 2003
AGND
+
VIN
+
C2 10pF
C1 10pF
R1
10uF
C4
3.3V REGULATOR
Q1(AIC1722)
DGND
VOUT
C6
C5
0.1uF
C3
AGND
AGND
0.1uF
1uF
DGND
X1
18.432MHz
LED
D1
DGND
10
9
8
7
6
5
4
3
2
1
VRT
VRB
All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission.
AGND
+
+
C2 10pF
10uF
C4
3.3V REGULATOR
Q1(AIC1722)
DGND
C1 10pF
R1
C6
C5
0.1uF
C3
AGND
AGND
0.1uF
1uF
DGND
X1
18.432MHz
LED
D1
DGND
10
9
8
7
6
5
4
3
2
1
VRT
VRB
PAN101BSI
VDDA
VDDD
VSSA
VSSD
OSCIN
OSCOUT
LED
VSS_LED
U1
igure 23. Application circuit using PS/2 interface with PAN101BSI
1uF
C7
VIN
VIN PAD
GND
PD
VAY
XA
NC
XB
YA
NC
YB
SCLK
SDIO
PD
VAY
XA
NC
XB
YA
NC
YB
SCLK
SDIO
PAN101BOI
VDDA
VDDD
VSSA
VSSD
OSCIN
OSCOUT
LED
VSS_LED
U1
Figure 22. Application circuit using PS/2 interface with PAN101BOI
1uF
C7
GND
VIN PAD
VOUT
11
12
13
14
15
16
17
18
19
20
11
12
13
14
15
16
17
18
19
20
DGND
DGND
DGND
51K
R6
DGND
51K
R6
16
7
2
13
12
15
14
16
7
2
13
12
15
14
10K 10K 10K 10K
R2 R3 R5 R4
U2
EM84510FP
OSCR
OPT
OSC.OUT
X2
X1
Y2
Y1
U2
L
R
M
R
M
L
VSS
Z1
Z2
VDD
CLK
DATA
VSS
Z1
Z2
VDD
CLK
DATA
EM84510FP
OSCR
OPT
OSC.OUT
X2
X1
Y2
Y1
ENSW1
COM
C8
+
C9
C8
+
C9
AGND
8
3
4
1
COM
ENCODER
B
A
DGND
0.1uF
10uF
AGND
VCC_5V
GND
CLK
ENSW1
10uF
5
R
M
L
DGND
0.1uF
DATA
SW3
SW2
SW1
ENCODER
B
A
VCC_5V
GND
6
9
10
11
8
3
4
1
CLK
5
R
M
L
DATA
SW3
SW2
SW1
6
9
10
11
HEADER 4
4
3
2
1
JP1
HEADER 4
4
3
2
1
JP1
PAN101B
+
PixArt Imaging Inc.
E-mail: [email protected]
+
.
PixArt Imaging Inc.
CMOS Optical Navigation Sensor
8.3 Typical application for PS/2 interface
20
V1.4, FEB. 2003
PixArt Imaging Inc.
PAN101B
CMOS Optical Navigation Sensor
Figure 24. Example printed circuit board layout. (PAN101BOI V.S EM84510FP)
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PixArt Imaging Inc.
E-mail: [email protected]
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PixArt Imaging Inc.
PAN101B
CMOS Optical Navigation Sensor
8.4 PCB layout consideration
1. Caps for pins 9, 10 MUST have trace lengths LESS than 5mm.
2. The ground wires of pin1(VSS_LED), pin5(VSSD), pin6(VSSA) must be separated from PS2/USB
connector ground node in PCB layout.
3. VSS_LED and VSSD must have trace lengths less than 100mm, VSSA must have trace lengths less
than 80mm, and typical trace width is 30mil.
4. The trace lengths of OSCOUT, OSCIN must less than 6mm.
PS2/USB onnector
D+/SCLK
PIN1
(VSS_LED)
D-/SDATA
DGND
VCC
PIN5
(VSSD)
GND
DGND
PIN6
(VSSA)
AGND
Figure 25. PCB layout consideration
8.5 Recommended value for R1
Radiometric intensity of LED
Bin limits (mW/Sr at 20mA)
Bin
Min
Max
N
14.7
17.7
P
17.7
21.2
Q
21.2
25.4
R
25.4
30.5
S
30.5
36.6
T
36.6
43.9
Note: Tolerance for each bin will be ± 15%
@5V:
LED bin
N
P
Q
R
S
T
R1 value (ohm)
100
100
100
120
120
120
Figure 26. Recommended value for R1
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PixArt Imaging Inc.
E-mail: [email protected]
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V1.4, FEB. 2003
PixArt Imaging Inc.
PAN101B
CMOS Optical Navigation Sensor
9. Package Information
9.1 Package Outline Drawing
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
19.30
0.760
3.20
0.126
9.98
0.393
1.02
0.040
5.08
0.200
1.46
0.0575
1.778
0.070
0.457
0.018
0.254
0.010
5 - 12
1
2
3
4
5
14.22
0.560
5.715
0.225
4.064
0.160
13.589
0.535
11.938
0.470
6
7
8
9
10
5.080
0.200
4.55
0.179
20
19
18
17
16
15
14
13
12
1. All dimensions in MM/INCH.
2. All dimensions tolerance: +/- 0.10mm
3. Maxmumflash: +0.2mm
11
5.56
0.2189
NOTES:
0.800
0.031
Figure 27. Package Outline Drawing
All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission.
PixArt Imaging Inc.
E-mail: [email protected]
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V1.4, FEB. 2003
PixArt Imaging Inc.
PAN101B
CMOS Optical Navigation Sensor
9.2 Recommended PCB Mechanical Cutouts and Spacing
4.064
0.160
27.153
1.069
2.286
0.090
6.985
0.275
10.998
0.433
7.544
0.297
26.010
1.024
0 ref.
16.942
0.667
4.445
0.175
1.194
0.047
0.711
0.028
Optical Center
0 ref.
1.194
0.047
4.445
0.175
6.985
0.275
0.711
0.028
7.544
0.297
3.251
0.128
All Dimensions : mm / inch
Figure 28. Recommended PCB Mechanical Cutouts and Spacing
10. Update history
Version
V1.0
V1.1
V1.2
V1.3
V1.4
Update
Creation, 1st version
8.4 PCB layout consideration
Figure 27. Package Outline Drawing
4. Specifications - DC Electrical Characteristics
Figure 27. Package Outline Drawing
3.2 Register descriptions
8.4 PCB layout consideration
Figure 25. PCB layout consideration
Figure 27. Package Outline Drawing
Date
07/02/2002
08/29/2002
10/02/2002
10/14/2002
02/10/2003
All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission.
PixArt Imaging Inc.
E-mail: [email protected]
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V1.4, FEB. 2003