PERICOM PI49FCT3806CQ

PI49FCT3805/PI49FCT3806
PI49FCT3805A/PI49FCT3806A
PI49FCT3805B/PI49FCT3806B
PI49FCT3805C/PI49FCT3806C
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3.3V Fast CMOS Buffer/Clock Driver
Features
Product Description
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3.3V version of PI49FCT805/806
Extremely low output skew: 0.5ns
Monitor ouput pin
Clock busing wih 3-state control
TTL inpu and CMOS output compatible
Industrial operation at–40°C to 85°C
Extremely low static power (1mW, typ.)
Hysteresis on all inputs
Packages available:
– 20-pin 300-mil wide SOIC (S)
– 20-pin 150-mil wide QSOP (Q)
– 20-pin 209-mil wide SSOP (H)
• Device models available on request
Pericom Semiconductor’s PI49FCT series of logic circuits are
produced using the Company’s advanced submicron CMOS
technology, achieving industry leading speed grades.
The PI49FCT3805 is a 3.3V non-inverting clock driver and the
PI49FCT3806 is a 3.3V inverting clock driver designed with two
independent groups of buffers. These buffers have 3-state Output
Enable inputs (active LOW) with a 1-in, 5-out configuration per
group. Each clock driver consist of two banks of drivers, driving five
outputs each from a standard TTL compatible CMOS input.
PI49FCT3805 Logic Block Diagram
PI49FCT3806 Logic Block Diagram
OEA
OEA
INA
INB
5
5
OA0-4
INA
OB0-4
INB
5
5
OA0-4
OB0-4
OEB
OEB
MON
MON
1
PS7007B
01/13/99
PI49FCT3805/3806
3.3V Fast CMOS Buffer/Clock Driver
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PI49FCT3805 Truth Table(1)
Product Pin Description
Pin Name
OEA, OEB
INA, INB
OAN, OBN
MON
GND
VCC
Inputs
Description
3-State Output Enable Inputs (Active LOW)
Clock Inputs
Clock Outputs
Monitor Output
Ground
Power
OEA, OEB
L
L
H
H
INA, INB
L
H
L
H
Note:
1. H = High Voltage Level
L = Low Voltage Level
Z = High Impedance
PI49FCT3806 Truth Table(1)
PI49FCT3805 Product Pin Configuration
Inputs
VCCA
OA0
OA1
OA2
GNDA
OA3
OA4
GNDQ
OEA
INA
1
20
2
19
3
18
4
17
20-Pin
5
16
H20
Q20
6
15
S20
7
14
8
13
9
12
10
11
Outputs
OAN, OBN
MON
L
L
H
H
Z
L
Z
H
OEA, OEB
L
L
H
H
VCCB
OB0
OB1
OB2
GNDB
OB3
OB4
INA, INB
L
H
L
H
Outputs
OAN, OBN
MON
H
H
L
L
Z
H
Z
L
Note:
1. H = High Voltage Level
L = Low Voltage Level
Z = High Impedance
MON
OEB
INB
PI49FCT3806 Product Pin Configuration
VCCA
OA0
OA1
OA2
GNDA
OA3
OA4
GNDQ
OEA
INA
1
20
2
19
3
18
4
17
20-Pin
5
16
H20
6
Q 2 0 15
S 2 0 14
7
8
13
9
12
10
11
VCCB
OB0
OB1
OB2
GNDB
OB3
OB4
MON
OEB
INB
Capacitance (TA = 25°C, f = 1 MHz)
Parameters(1)
Description
Test Conditions
Typ
Max.
Units
CIN
Input Capacitance
VIN = 0V
4.5
6.0
pF
COUT
Output Capacitance
VOUT = 0V
5.5
8.0
pF
Note:
1. This parameter is determined by device characterization but is not production tested.
2
PS7007B
01/13/99
PI49FCT3805/3806
3.3V Fast CMOS Buffer/Clock Driver
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Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended
periods may affect reliability.
Storage Temperature ............................................................ –65°C to +150°C
Ambient Temperature with Power Applied .............................. –40°C to +85°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) ......... –0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & I/O Only) ....... –0.5V to +7.0V
DC Input Voltage ....................................................................... –0.5V to +7.0V
DC Output Current ................................................................................ 120 mA
Power Dissipation .................................................................................... 0.5W
Operating Range
Ambient Temperature = –40°C to +85°C, Vcc = 3.3V ±0.3V
DC Electrical Characteristics (Over the Operating Range)
Symbol
Te s t Conditions (1)
De s cription
M in.
Typ.(2)
M ax.
VO H
Output HIGH voltage
VC C = 1.5V, VIN = VIH or VIL
IO H = –0.1mA
IO H = –8mA
VC C - 0.2
2.4(3)
–
3.0
–
–
VO L
Output LOW voltage
VC C = 1.5V, VIN = VIH or VIL
IO L = 0.1mA
IO L = 16mA
IO L = 24mA
–
–
–
–
0.2
0.3
0.2
0.4
0.5
VIH
Input HIGH voltage
Guaranteed Logic HIGH level
Input Pins
2.0
–
5.5
VIL
Input LOW voltage
Guaranteed Logic LOW level
Input Pins
–0.5
–
0.8
IIH
Input HIGH current
VC C = Max.
VIN = VC C (Input Pins)
–
–
1
IIL
Input LOW current
VC C = Max.
VIN = GND (Input
& I/O Pins)
–
–
–1
VO UT = VC C
VO UT = GND
–
–
–
–
1
–1
IOZH
IO ZL
High impedance
Output Current
VC C = Max
(3- State Output Pins)
VIK
Clamp diode voltage
VC C = Min., IIN = –18mA
–
–0.7
–1.2
(4 )
IO DH
Output HIGH current
VC C = 3.3V, VIN = VIH or VIL, VO UT = 1.5V
–35
–60
–110
IO DL
Output LOW current
VC C = 3.3V, VIN = VIH or VIL, VO UT = 1.5V(4)
50
90
200
IO S
Short circuit current(5)
VC C = Max.,VO UT = GND(5)
–60
–135
–240
VH
Input Hysteresis
–
150
–
Units
V
µA
V
mA
mV
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 3.3V, +25°C ambient and maximum loading.
3. VOH = VCC – 0.6V at rated current.
4. This parameter is determined by device characterization but is not production tested.
5. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
3
PS7007B
01/13/99
PI49FCT3805/3806
3.3V Fast CMOS Buffer/Clock Driver
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Power Supply Characteristics
Parameters Description
Test Conditions(1)
Min.
Typ(2)
Max.
Units
ICC
Quiescent Power
Supply Current
VCC = Max.
VIN = GND or VCC
—
3
30
µA
∆ICC
Supply Current per
Inputs @ TTL HIGH
VCC = Max.
VIN = VCC – 0.6V(3)
—
2.0
300
µA
ICCD
Supply Current per
Input per MHz(4)
VCC = Max.,
Outputs Open
OEA or OEB = GND
Per Output Toggling
50% Duty Cycle
VIN = VCC
VIN = GND
—
0.08
0.16
mA/
MHZ
IC
Total Power Supply
Current(6)
VCC = Max.,
Outputs Open
fO = 10 MHZ
50% Duty Cycle
OEA or OEB = GND
Mon. Outputs Toggling
VIN = VCC
VIN = GND
—
3.3
9.0(5)
VIN = VCC – 0.6V
VIN = GND
—
3.3
10.0(5)
VCC = Max.,
Outputs Open
fO = 2.5 MHZ
50% Duty Cycle
OEA or OEB = GND
Eleven Outputs Toggling
mA
(5)
VIN = VCC
VIN = GND
—
1.8
6.0
VIN = VCC – 0.6V
VIN = GND
—
1.8
7.0(5)
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at VCC = 3.3V, +25°C ambient.
3. Per TTL driven input (VIN = VCC – 0.6V); all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the IC formula. These limits are guaranteed but not tested.
6. IC
= IQUIESCENT + IINPUTS + IDYNAMIC
IC
= ICC + ∆ICC DHNT + ICCD (fONO)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = VCC – 0.6V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fO
= Output Frequency
NO = Number of Outputs at fO
All currents are in milliamps and all frequencies are in megahertz.
4
PS7007B
01/13/99
PI49FCT3805/3806
3.3V Fast CMOS Buffer/Clock Driver
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Switching Characteristics over Operating Range
Parame te rs
3805/3806
3805A/3806A
3805B/3806B
3805C/3806C
Com.
Com.
Com.
Com.
Condition(1)
De s cription
Units
M in.
M ax
M in.
M ax
M in.
M ax
M in.
M ax
tPLH
tPHL
Propagation Delay
INA to OAN , INB to OBN
1.5
6.5
1.5
5.8
1.5
5.0
1.5
4.5
tPZH
tPZL
Output Enable Time
OEA to OAN , OEB to OBN
1.5
8.0
1.5
8.0
1.5
6.5
1.5
6.2
tPHZ
tPLZ
Output Disable Time
OEA to OAN , OEB to OBN
1.5
7.0
1.5
7.0
1.5
6.0
1.5
5.0

0.7

0.7

0.5

0.5
CL = 50pF
RL = 500Ω
tSK (o)(3)
Skew between two outputs of
same package (Same transition)
tSK (p)(3)
Skew between opposite
transition (tPHL- tPLH) of the
same output

1.0

0.7

0.5

0.5
tSK (t)(3)
Skew between two outputs of
different package at same
temperature (Same transition)

1.5

1.2

1.0

0.8
ns
Note:
1. See test circuit and waveforms
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew measured at worst cast temperature (max. temp).
Tests Circuits for All Outputs(1) , except for FIN >100 MHz
Switch Position
Test
Switch
Disable LOW
Enable LOW
6V
Disable HIGH
Enable HIGH
GND
All Other Inputs
Open
6.0V
VCC
500
VIN
Ω
VOUT
Pulse
DEFINITIONS:
CL = Load capacitance: includes jig and probe
capacitance.
RT = Termination resistance: should be equal to
ZOUT of the Pulse Generator.
D.U.T.
Generator
50pF
RT
500
CL
Ω
5
PS7007B
01/13/99
PI49FCT3805/3806
3.3V Fast CMOS Buffer/Clock Driver
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SWITCHING WAVEFORMS
Output Skew – tSK(o)
Propagation Delay
3V
Input
3V
1.5V
Input
tPLHx
tPHL
tPLH
1.5V
0V
0V
tPHLx
VOH
VOH
Output
Ox
1.5V
1.5V
VOL
VOL
tSK(o)
tSK(o)
VOH
Oy
Enable and Disable Times
1.5V
VOL
tPHLy
tPLHy
Enable
tSK(o) = | tPLHy – tPLHx | or | tPHLy – tPHLx |
Disable
3V
OE
Pulse Skew – tSK(p)
1.5V
0V
Output
Normally
Low
3.0V
Switch
Closed
Normally
High
Input
3.0V
0.3V
tPLH
Open
tPHL
VOH
VOL
tPHZ
Switch
1.5V
0V
1.5V
tPZH
Output
3V
tPLZ
tPZL
Output
0.3V
1.5V
VOH
VOL
1.5V
0V
tSK(p) = | tPHL – tPLH |
0V
Package Skew – tSK(t)
3V
Input
1.5V
0V
tPHL1
tPLH1
VOH
Package 1
Output
1.5V
VOL
tSK(t)
tSK(t)
VOH
Package 2
Output
1.5V
tPLH2
VOL
tPHL2
tSK(t) = | tPLH2 – tPLH1 | or | tPHL2 – tPHL1 |
6
PS7007B
01/13/99
PI49FCT3805/3806
3.3V Fast CMOS Buffer/Clock Driver
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Ordering Information
Orde ring Code
Package Type
PI49FCT3805H
PI49FCT3806H
20- pin 209 mil SSO P
PI49FCT3805Q
PI49FCT3806Q
20- pin 150 mil Q SO P
PI49FCT3805S
PI49FCT3806S
20- pin 300 mil SSIC
PI49FCT3805AH
PI49FCT3806AH
20- pin 209 mil SSO P
PI49FCT3805AQ
PI49FCT3806AQ
20- pin 150 mil Q SO P
PI49FCT3805AS
PI49FCT3806AS
20- pin 300 mil SSIC
PI49FCT3805BH
PI49FCT3806BH
20- pin 209 mil SSO P
PI49FCT3805BQ
PI49FCT3806BQ
20- pin 150 mil Q SO P
PI49FCT3805BS
PI49FCT3806BS
20- pin 300 mil SSIC
PI49FCT3805CH
PI49FCT3806CH
20- pin 209 mil SSO P
PI49FCT3805CQ
PI49FCT3806CQ
20- pin 150 mil Q SO P
PI49FCT3805CS
PI49FCT3806CS
20- pin 300 mil SSIC
7
Rating
Note
Industrial
Refer to Switching
Characteristic
Table for Speed
Grade Characteristics
PS7007B
01/13/99
PI49FCT3805/3806
3.3V Fast CMOS Buffer/Clock Driver
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20-Pin SOIC Package Drawing (S)
20
7.40
7.60
.2914
.2992
.010
.029
0.254
x 45˚
0.737
1
.496 12.60
.511 12.99
0.23
0.32
0.41 .016
1.27 .050
.020 0.508
REF
.030 0.762
.0926
.1043
2.35
2.65
.394
.419
10.00
10.65
SEATING
PLANE
.050
BSC
1.27
.0091
.0125
0-8˚
.0040
.0118
.013
.020
0.33
0.51
0.10
0.30
X.XX DENOTES CONTROLLING
X.XX DIMENSIONS IN MILLIMETERS
20-Pin QSOP Package Drawing (Q)
20
.150
.157
3.81
3.99
.015 x 45˚
0.38
1
.007
.010
.337 8.56
.344 8.74
.058 REF
1.47
.016
.050
.053 1.35
.069 1.75
0.41
1.27
.228
.244
5.79
6.19
SEATING
PLANE
.025
BSC
0.635
0.178
0.254
.004 0.101
.010 0.254
.008 0.203
.012 0.305
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
8
PS7007B
01/13/99
PI49FCT3805/3806
3.3V Fast CMOS Buffer/Clock Driver
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20-Pin SSOP Package Drawing (H)
20
.197
.220
5.00
5.60
1
.004
.009
.272
.295
6.90
7.50
0.55 .022
0.95 .037
.078
2.00 Max
SEATING
PLANE
.0256
BSC
0.65
.0098
Max.
0.25
0.09
0.25
.291
.322
7.40
8.20
.002
Min
0.050
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
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PS7007B
01/13/99