PLL130-05 High Speed Translator Buffer to PECL (Enable Low) FEATURES VDD VDD GND 11 10 9 GND 15 V 16 PLL130-05 1 2 3 4 GND GND 14 REF_IN 13 OE The PLL130-05 is a low cost, high performance, high speed, buffer that reproduces any input frequency from DC to 1.3GHz. It provides one pair of differential PECL outputs. Any input signal with at least 100mV swing can be used as reference signal. This chip is ideal for conversion from sine wave, TTL, CMOS, or LVDS to PECL. 12 GND GND DESCRIPTION VDD (TOP VIEW) Differential PECL output Single AC coupled input (min. 100mV swing). Input range from DC to 1.0 GHz. 2.5V to 3.3V operation. Available in 3x3mm QFN. GND • • • • • PIN CONFIGURATION 8 PECL_BAR 7 VDD 6 PECL 5 GND Note: V denotes internal pull down BLOCK DIAGRAM REF_IN Input Amplifier PECL_BAR PECL 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/09/04 Page 1 PLL130-05 High Speed Translator Buffer to PECL (Enable Low) PIN DESCRIPTIONS 3x3mm QFN Pin number Name Type Description P Ground. VDD 1,2,4,5, 9,13,14,15 7,10,11,12 P REF_IN 3 I PECL PECL_BAR 6 8 O O OE 16 I Power supply. Reference input signal. The frequency of this signal will be reproduced at the output (after translation to PECL level). PECL True output. PECL Complementary output. Output enable (‘0’ for enable). Internal pull-down (default is ‘0’). GND ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. V DD VI VO TS TA TJ -0.5 -0.5 -65 -40 Supply Voltage Input Voltage, dc Output Voltage, dc Storage Temperature Ambient Operating Temperature* Junction Temperature Lead Temperature (soldering, 10s) ESD Protection, Human Body Model MAX. UNITS 4.6 V DD +0.5 V DD +0.5 150 85 125 260 2 V V V °C °C °C °C kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only. 2. AC Specification PARAMETERS Input Frequency Input signal swing Output Frequency Output Rise Time Output Fall Time CONDITIONS REF_IN input 0.8V to 2.0V with no load 2.0V to 0.8V with no load MIN. 0 100 0 TYP. MAX. UNITS 1000 MHz mV MHz ns ns 1000 1.5 1.5 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/09/04 Page 2 PLL130-05 High Speed Translator Buffer to PECL (Enable Low) 3. PECL Electrical Characteristics PARAMETERS SYMBOL CONDITIONS MIN. V OH V OL R L = 50 Ω to (V DD – 2V) (see figure) V DD – 1.025 Output High Voltage Output Low Voltage MAX. UNITS V DD – 1.620 V V 4. PECL Switching Characteristics PARAMETERS SYMBOL Clock Rise Time Clock Fall Time CONDITIONS tr tf @20/80% - PECL @80/20% - PECL PECL Levels Test Circuit OUT TYP. MAX. UNITS 0.6 0.5 1.5 1.5 ns ns PECL Output Skew OUT VDD 50Ω MIN. 2.0V 50% 50Ω OUT tSKEW OUT PECL Transistion Time Waveform DUTY CYCLE 45 - 55% 55 - 45% OUT 80% 50% 20% OUT tR tF 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/09/04 Page 3 PLL130-05 High Speed Translator Buffer to PECL (Enable Low) PACKAGE INFORMATION ORDERING INFORMATION For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range PLL130-05 S C PART NUMBER TEMPERATURE C=COMMERCIAL I=INDUSTRAL PACKAGE TYPE Q=QFN Order Number Marking Package Option PLL130-05QC-R PLL130-05QC P130-05QC P130-05QC QFN - Tape and Reel QFN - Tube PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation. 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/09/04 Page 4