PERICOM PS4530CWP

PS4530/PS4531/PS4532
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Precision 8-Ch, 2-Ch, Latched
Analog Multiplexers/Switches
Features
Description
• Low On-Resistance (60 Ohm typ.) Minimizes Distortion
and Error Voltages
• Single-Supply Operation (+2.0V to 12.0V)
• Dual-Supply Operation (± 2.0V to ± 6.0V)
• Improved Second Sources for MAX4530/MAX4531/MAX4532
• 75 Ohm On-Resistance with ±5V supplies
• 150 Ohm On-Resistance with ±5V supply
• TTL/CMOS Logic Compatible
• Fast Switching Speed, tON and tOFF = 150ns & 120ns at ±4.5V
• Break-Before-Make action eliminates momentary crosstalk
• Rail-to-Rail Analog Signal Range
• Low Power Consumption, <1µW
• Narrow SOIC, and SSOP Packages Minimize Board Area
PS4530/PS4531/PS4532 are low voltage CMOS analog ICs configured as an 8-channel multiplexer (mux) (PS4530), two 4-channel
muxes (PS4531), and three single-pole/double-throw switches
(PS4532). These devices are pin compatible with the industry
standard 74H4351/74HC4352/74HC4353. All devices have two
complementary switch-enable inputs and address latching.
The PS4530/PS4531/PS4532 operate from a single supply of +2V to
+12V, or from dual supplies of ±2V to ±6V. On-resistance (150Ohm
max.) is matched between switches to 8Ohm max. Each switch can
handle rail-to-rail analog signals. Off-leakage current is only 1nA
at TA = +25°C and 50nA at TA = +85oC.
All digital inputs have 0.8V and 2.4V logic thresholds, ensuring
both TTL-logic and CMOS-logic compatibility when using ±5V or
a single +5V supply.
Applications
•
•
•
•
•
•
Data Acquisition Systems
Audio Switching and Routing
Test Equipment
PBX, PABX
Telecommunication Systems
Battery-Powered Systems
Functional Block Diagrams and Pin Configurations
Top View
PS4531
Top View
PS4530
Top View
PS4532
NO1
1
20 V+
NO0B
1
20 V+
NOB
1
20 V+
NO3
2
19 NO2
NO1B
2
19 NO1A
NCB
2
19 COMB
N.C. 3
18 NO4
N.C. 3
18 NO2A
N.C. 3
18 COMC
COM 4
17 NO0
COMB 4
17 COMA
NOA 4
NO7
16 NO6
NO3B
5
16 NO0A
15 ADDC NO2B 6
15 NO3A
NCA 6
14 N.C.
EN1 7
5
NO5 6
COMA
17 NOC
16 NCC
5
15 ADDC
14 N.C.
EN1 7
EN2 8
13
ADDB
EN2 8
13
ADDB
EN2 8
13
ADDB
N.C. 9
12
ADDA
V– 9
12
ADDA
V– 9
12
ADDA
11
LE
11
LE
11
LE
EN1 7
Logic
GND 10
PI5A4530
NARROW DIP/WIDE SO
Logic
GND 10
PS4531
NARROW DIP/WIDE SO
1
Logic
GND 10
14 N.C.
PS4532
NARROW DIP/WIDE SO
PS8591D
11/17/04
PS4530/PS4531/PS4532
Precision
8-Ch,
2-Ch,
Latched
Analog
Multiplexers/Switches
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Truth Table
LE
EN2
EN1
0
1
X
ADDRESS BITS
ON SWITCHES
ADDC*
ADDB
ADDA
P S 4530
P S 431
P S 4532
0
X
X
X
Last address
Last address
Last address
0
X
X
X
X
All switches open
All switches open
All switches open
X
X
1
X
X
X
All switches open
All switches open
All switches open
1
1
0
0
0
0
COM- NO0
COMA- NO0A,
COMB- NO0B
COMA- NCA,
COMB- NCB,
COMC- NCC
1
1
0
0
0
1
COM- NO1
COMA- NO1A,
COMB- NO1B
COMA- NOA,
COMB- NCB,
COMC- NCC
1
1
0
0
1
0
COM- NO2
COMA- NO2A,
COMB- NO2B
COMA- NCA,
COMB- NOB,
COMC- NCC
1
1
0
0
1
1
COM- NO3
COMA- NO3A,
COMB- NO3B
COMA- NOA,
COMB- NOB,
COMC- NCC
1
1
0
1
0
0
COM- NO4
COMA- NO0A,
COMB- NO0B
COMA- NCA,
COMB- NCB,
COMC- NOC
1
1
0
1
0
1
COM- NO5
COMA- NO1A,
COMB- NO1B
COMA- NOA,
COMB- NCB,
COMC- NOC
1
1
0
1
1
0
COM- NO6
COMA- NO2A,
COMB- NO2B
COMA- NCA,
COMB- NOB,
COMC- NOC
1
1
0
1
1
1
COM- NO7
COMA- NO3A,
COMB- NO3B
COMA- NOA,
COMB- NOB,
COMC- NOC
X = Don’t Care *ADDC not present of PS4531.
Note:
NO_ and COM_ pins are identical and interchangeable. Either may be considered an input or an output;
signals pass equally well in either direction. LE is independent of EN1 and EN2.
2
PS8591D
11/17/04
PS4530/PS4531/PS4532
Precision
8-Ch,
2-Ch,
Latched
Analog
Multiplexers/Switches
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Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Voltages Referenced to V–
V+ ................................................................................................. –0.3V to +13V
Voltage into Any Terminal(1)
or ±20mA (whichever occurs first) ....................................... –0.3V to (V+ +0.3V)
Continuous Current into Any Terminal ................................................... ±20mA
Peak Current, NO, NC, or COM_
(pulsed at 1ms, 10% duty cycle .............................................................. ±40mA
ESD per Method 3015.7 ........................................................................... >2000V
Continuous Power Dissipation (TA = +70°C)
SO (derate 10.00mW/°C above +70°C) .................................................. 800mW
SSOP (derate 8.00mW/°C above +70°C) ............................................... 640mW
Operating Temperature Ranges
PS453_C_P ................................................................................... 0°C to +70°C
PS453_E_P ............................................................................... –40°C to +85°C
Storage Temperature Range ..................................................... –65°C to +150°C
Lead Temperture (soldering, 10s ............................................................... +30°C
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
Note:
Voltages exceeding V+ or V– on any signal terminal are clampled by internal diodes.
Limit forward-diode current to maximum currant rating.
3
PS8591D
11/17/04
PS4530/PS4531/PS4532
Precision
8-Ch,
2-Ch,
Latched
Analog
Multiplexers/Switches
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Electrical Specifications - Dual Supplies
(V+ = +5V ±10%, V– = –5V ±10%, GND = 0V, VADD_H = VEN_H = VLE = 2.4V, VADD_L = VEN_L = 0.8V, TA = TMIN to TMAX,
unless otherwise noted)
Parame te r
Symbol
M in(2) Typ(2) M ax(2)
Conditions
Units
Switch
Analog Signal Range
VC O M , VN O ,
Note(3)
VN C _
V–
TA = +25°C
V+
20
35
Channel On Resistance
RO N
IN O = 2mA, VC O M = ±3.5V,
V+ = 4.5V, V– = –4.5V
On- Resistance Matching
Between Channals(4)
∆RO N
IN O = 2mA, VC O M = ±3.5V,
V+ = 4.5V, V– = –4.5V
TA = +25°C
6
8
TA = TM IN to TM AX
8
10
IN O = 2mA,
VC O M = –3V,0V, +3V;
V+ = 5V; V– = –5V
TA = +25°C
6
TA = TM IN to TM AX
8
VN O = ±4.5V, VC O M = ±4.5V,
V+ = 5.5V, V– = –5.5V
TA = +25°C
–80
TA = TM IN to TM AX
–100
TA = +25°C
–80
On - Resistance Flatnesss(5)
RF LAT(O N )
NO- Off Leakage Current(6)
IN O (O F F )
COM- Off Leakage
Current(6)
COM- On Leakage
Current(6)
45
VC O M = ±4.5V, VN O ±4.5V,
V+ = 5.5V, V– = –5.5V
P S 4530
TA = TM IN to TM AX
–100
VC O M = ±4.5V, VN O ±4.5V,
V+ = 5.5V, V– = –5.5V
T = +25°C
PS4531, A
P S 4532 T = T
A
M IN to TM AX
–80
IC O M (O F F )
IC O M (O N )
TA = TM IN to TM AX
4
0.01
–80
TA = TM IN to TM AX
–100
PS4531, TA = +25°C
PS4532 TA = TM IN to TM AX
–80
–100
Ohm
80
100
0.01
80
100
0.01
–100
TA = +25°C
P S 4530
VC O M = ±4.5V,
V+ = 5.5V,
V– = –5.5V
V
80
nΑ
100
0.01
80
100
0.01
80
100
PS8591D
11/17/04
PS4530/PS4531/PS4532
Precision
8-Ch,
2-Ch,
Latched
Analog
Multiplexers/Switches
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Electrical Specifications - Dual Supplies (continued)
(V+ = +5V ±10%, V– = –5V ±10%, GND = 0V, VADD_H = VEN_H = VLE = 2.4V, VADD_L = VEN_L = 0.8V, TA = TMIN to TMAX,
unless otherwise noted)
Parame te r
Symbol
M in(2)
Conditions
Typ(2)
M ax(2)
Units
Digital Logic Input
Logic High Threshold
VADD_H, VEN _H,
VLE
TA = TM IN to TM AX
Logic Low Threshold
VADD_H, VEN _H,
VLE
TA = TM IN to TM AX
Input Current with
Input Voltage High
IADD_H, IEN _H,
ILE
VADD_H = 2.4V, VADD_L = 0.8V
Input Current with
Input Voltage Low
IADD_L, IEN _L,
ILE
VADD_H = 2.4V, VADD_L = 0.8V
2.4
V
0.8
0.01
–0.1
0.1
µΑ
± 2.0
±6
V
Supply
Power Supply Range
V+, V–
Positive Supply Current
I+
VEN = VADD_ = VLE = 0V/V+, V+
= 5.5V, V– = –5.5V
Negative Supply Current
I–
VEN = VADD_ = VLE = 0V/V+, V+
= 5.5V, V– = –5.5V
IGN D
VEN = VADD_ = VLE = 0V/V+, V+
= 5.5V, V– = –5.5V
IGN D Supply Current
TA = +25°C
–1
TA = TM IN to TM AX
–10
TA = +25°C
–1
TA = TM IN to TM AX
–10
TA = +25°C
–1
TA = TM IN to TM AX
–10
0.001
1
10
0.001
1
10
0.01
1
10
Dynamic
tTRAN S
Figure 1
tBBM
Figure 3
Enable Turn- On Time
tO N (EN )
Figure 2
Enable Turn- Off Time
tO F F (EN )
Figure 2
Setup Time, Channel
Select to Latch Enable
tS
Figure 4
Hold Time,Latch Enable
to Channel Select
tH
Figure 6
tM P W
Figure 5
Transition Time
Break- Before- Make Interval
Pulse Width
Latch Enable
Charge Injection(3)
Off Isolation(7)
Crosstalk Between Channels
TA = +25°C
60
TA = TM IN to TM AX
TA = +25°C
250
4
TA = +25°C
10
10
TA = TM IN to TM AX
40
TA = TM IN to TM AX
TA = +25°C
50
TA = TM IN to TM AX
60
TA = +25°C
0
TA = TM IN to TM AX
0
TA = +25°C
60
TA = TM IN to TM AX
70
1.5
VIS O
VEN 2 = 0V, RL = 1kOhm
f = 1 MHz
VC T
VEN 1 = 0V, REN 2 = 2.4V,
f = 1 MHz, VGEN = 1Vp- p,
RL = 1kOhm
150
250
TA = +25°C
Q
150
100
150
ns
5
pC
–65
TA = +25°C
5
dB
–92
PS8591D
11/17/04
PS4530/PS4531/PS4532
Precision
8-Ch,
2-Ch,
Latched
Analog
Multiplexers/Switches
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Electrical Specifications - Dual Supplies (continued)
(V+ = +5V ±10%, V– = –5V ±10%, GND = 0V, VADD_H = VEN_H = VLE = 2.4V, VADD_L = VEN_L = 0.8V, TA = TMIN to TMAX,
unless otherwise noted)
Parame te r
Symbol
M in(2) Typ(2) M ax(2)
Conditions
Distortion, THD
Logic Input
Capacitance
NO- Off Capacitance
0.025
CIN
CNO(OFF)
f = 1 MHz
3
f = 1 MHz, VEN = VCOM = 0V
3
P S 4530
COM- Off Capacitance
COM- On Capacitance
Units
CCOM(OFF)
CCOM(ON)
f = 1 MHz,
VEN2 = VCOM = 0V
P S 4531
f = 1 MHz,
VEN1 = VCOM = 0V
VEN2 = 2.4V
15
TA = +25°C
pF
9
P S 4532
6
P S 4530
26
P S 4531
20
P S 4532
17
Electrical Characteristics - Single 5V Supply
(V+ = +5V ±10%, V– = –0V, GND = 0V, VADD_H = VEN_H = VLE = 2.4V, VADD_L = VEN_L = 0.8V, TA = TMIN to TMAX,
unless otherwise noted)
Parame te r
Symbol
M in(2)
Conditions
Typ(2)
M ax(2)
Units
V+
V
Switch
Analog Signal Range
VCOM , VNO
Note(3)
0
TA = +25°C
On- Resistance
RON
INO = 1mA, VCOM = 3.5V
V+ = 4.5V
On- Resistance
Matching Between
Channels (3,4)
∆RON
INO = 1mA, VCOM = 3.5V
V+ = 4.5V
On- Resistance Flatness
RFLAT
INO = 1mA, VCOM = 3V,2/V,1V,
V+ = 4.5V
INO(OFF)
VNO = 4.5V, VCOM = 4.5V, 1V,
V+ = 4.5V
NO- Off Leakage
Current (8)
COM- Off Leakage
Current (8)
ICOM(OFF)
VCOM = 4.5V, 1V;
VNO = 1V, 4.5V;
V+ = 5.5V
TA = TMIN to TMAX
1
TA = TMIN to TMAX
P S 4530
P S 453,
P S 4532
ICOM(ON)
PS4531,
P S 4532
6
65
75
TA = +25°C
P S 4530
COM- On Leakage
Current (8)
25
8
Ohm
12
TA = +25°C
4
TA = +25°C
–80
80
TA = TMIN to TMAX
–100
100
TA = +25°C
–80
80
TA = TMIN to TMAX
–100
100
TA = +25°C
–80
80
TA = TMIN to TMAX
–100
100
TA = +25°C
–80
80
TA = TMIN to TMAX
–100
100
TA = +25°C
–80
80
TA = TMIN to TMAX
–100
100
PS8591D
nA
11/17/04
PS4530/PS4531/PS4532
Precision
8-Ch,
2-Ch,
Latched
Analog
Multiplexers/Switches
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Electrical Characteristics - Single 5V Supply
(V+ = +5V ±10%, V– = –0V, GND = 0V, VADD_H = VEN_H = VLE = 2.4V, VADD_L = VEN_L = 0.8V, TA = TMIN to TMAX, unless otherwise noted)
Parame te r
Symbol
Conditions
M in(2) Typ(2) M ax(2) Units
Digital Logic Input
Logic- High Threshold
Logic- Low Threshold
VADD_H,
VEN _H, VLE
2.4
VADD_L,
VEN _L, VLE
Input Current with
Input Voltage High
IADD_H,
IEN _H, ILE
Input Current with
Input Voltage Low
IADD_L,
IEN _L, ILE
V
TA = TM IN to TM AX
0.8
VH = 2.4V, VL = 0.8V
–0.1
0.1
µΑ
2.0
12
V
TA = +25°C
–1.0
1.0
TA = TM IN to TM AX
–10
10
TA = +25°C
–1.0
1.0
TA = TM IN to TM AX
–10
10
TA = +25°C
–1.0
1.0
TA = TM IN to TM AX
–10
10
Supply
Positive- Supply Range
Positive- Supply Current
I+
Negative- Supply Current
I–
IGN D Supply Current
VEN _ = VADD = VLE = 0V, V+;
V+ = 5.5V; V– = 0V
IGN D
µΑ
Dynamic
Transition Time
Break- Before- Make Interval
tTRAN S
tBBM
tO N (EN )
Figure 2
Enable Turn- Off Time(3)
tO F F (EN )
Figure 3
tS
Hold Time, Latch Enable
to Channel Select
tH
Pulse Width, Latch Enable
tM P W
Charge Injection(3)
Q
90
TA = TM IN to TM AX
Figure 3 (3)
Enable Turn- On Time(3)
Set- Up Time, Channel
Select to Latch Enable
TA = +25°C
Figure 1, VN O =3V
TA = +25°C
250
10
TA = +25°C
20
100
TA = TM IN to TM AX
40
100
TA = TM IN to TM AX
Figure 7, CL = 1nF, VN O = 0V
7
TA = +25°C
50
TA = TM IN to TM AX
60
TA = +25°C
0
TA = TM IN to TM AX
0
TA = +25°C
60
TA = TM IN to TM AX
70
TA = +25°C
200
250
TA = +25°C
Figure 7
200
125
ns
5
pC
1.5
PS8591D
11/17/04
PS4530/PS4531/PS4532
Precision
8-Ch,
2-Ch,
Latched
Analog
Multiplexers/Switches
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Electrical Characteristics - Single 3V Supply
(V+ = +2.7V to 3.6V, V– = –0V, GND = 0V, VADD_H = VEN_H = VLE = 2.4V, VADD_L = VEN_L = 0.5V, TA = TMIN to TMAX, unless otherwise noted)
Parame te r
Symbol
M in(2)
Conditions
Typ(2)
M ax(2)
Units
V+
V
Switch
Analog Signal Rnage
VAN ALO G
Note 3
0
TA = +25°C
75
185
RO N
IN O = 1mA, VC O M = 1.5V
V+ = 2.7V
Transistion Time(3)
tTRAN S
Figure 1, VIN = 2.4V
VN O 1 = 1.5V, VN O 8 = 0V
15 0
350
Enable Turn- On Time(3)
tO N (EN )
Figure 3, VIN H = 2.4V
VIN L = 0V, VN O 1 = 1.5V
15 0
350
Enable Turn- Off Time(3)
tO F F (EN )
Figure 3, VIN H = 2.4V
VIN L = 0V, VN O 1 = 1.5V
60
150
On- Resistance
TA = TM IN to TM AX
250
Ohm
Dynamic
TA = +25°C
Set- Up Time, Channel
Select to Latch Enable
tS
Hold Time, Latch Enable
to Channel Select
tH
0
Pulse Width, Latch Enable
tM P W
120
ns
10 0
Note 3
Notes:
2. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum,
is used in this data sheet.
3. Guaranteed by design
4. ∆RΟΝ = RΟΝ (max) - RΟΝ (min)
5. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured over the specified
analog ranges, i.e., VNO = 3V to 0V and 0V to –3V.
6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at TA = +25ºC.
7. Worst-case isolation is on channel 4 because of its proximity to the COM pin.
Off isolation = 20log VCOM/VNO, VCOM = output, VNO = input to off switch
8. Leakage testing at single supply is guaranteed by testing with dual supplies.
8
PS8591D
11/17/04
PS4530/PS4531/PS4532
Precision
8-Ch,
2-Ch,
Latched
Analog
Multiplexers/Switches
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Applications Information
Power-Supply Considerations
Overview
The PS4530/PS4531/PS4532 construction is typical of most CMOS
analog Switches. They have three supply pins: V+, V, and GND. V+
and V- drive the the internal CMOS switches and set the limits of
the analog voltage on any switch. Reverse ESD-protection diodes
are internally connected between each analog-signal pin and both
V+ and V-. One of these diodes conducts if any signal exceeds V+
or V-. During normal operation, these and other reverse-biased
ESD diodes leak, forming the only current drawn from V+ or V–.
Virtually all of the analog leakage current comes from the ESD
diodes. Although the ESD diodes on a given signal pine are identical and therefore fairly well balanced, they are reverse biased
differently. Each is biased by either V+ or V- and the analog signal.
This means their leakages vary as the signal varies. The difference
in the two diode leakages to the V+ and V– pins constitutes the
analog-signal-path leakage current. All analog leakage current flows
between each pin and one of the supply terminals, not to the other
switch terminal. For this reason, both sides of a given switch can
show leakage currents of either the same or opposite polarity.
The signal paths and GND are not connected.
V+ and GND power the internal logic and logic-level translators,
and set both the input and output logic limits. The logic level
translators convert the logic levels into switched V+ and V- signals to drive the analog signals’ gates. This drive signal is the only
connection between the logic supplies and signals and the analog
supplies. V+ and V- have ESD-protection diodes to GND.
The logic-level thresholds are TTL/CMOS compatible when
V+ = +5V. As V+ rises, the threshold increases slightly, so when
V+ reaches +12V, the threshold is about 3.1V – above the TTL
guaranteed, high-level minimum of 2.8V, but still compatible with
CMOS outputs.
Bipolar Supplies
The PS4530/PS4531/PS4532 operate with bipolar supplies between
±2.0V and ±6V. The V+ and V- supplies need not be symmetrical,
but their sum cannot exceed the +13V absolute maximum rating.
Single Supply
The PS4530/PS4531/PS4532 operate from a single supply between
+2V and 12V when V- is connected to GND. All of the bipolar
precautions must be observed. At room temperature, they actually
work with a single supply at, near, or below +1.7V, although as
supply voltage decreases, switch on-resistance and switching times
become very high.
High-Frequency Performance
In 50Ohm systerns, signal response is reasonably flat up to 50MHz
(see Typical Operating Characteristics). Above 20MHz, the on
response has several minor peaks that are highly layout dependent. The problem is not in turning the switch on, but in turning it
off. The off-state switch acts lilke a capacitor and passes higher
frequencies with less attenuation. At 10MHz, off isolation is about
–65dB in 50Ohm systems, becoming worse (approximately 21dB
per decade) as frequency increases. Higher circuit impedances
also make off isolation worse. Adjacent channel attenuation is
about 3dB above that of a bare IC socket, and is due entirely to
capacitive coupling.
9
PS8591D
11/17/04
PS4530/PS4531/PS4532
Precision
8-Ch,
2-Ch,
Latched
Analog
Multiplexers/Switches
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Test Circuits/Timing Diagrams
V+
V+
VADD_
ADDC LE V+
NO0
+3V
ADDB
50Ohm
90%
PI5A4530
V+
VNO0
NO1-NO6
ADDA
50%
0V
EN2
NO7
–3V
0V
VOUT
COM
EN1
GND
V-
VOUT
90%
VNO7
35pF
300Ohm
ttrans
V–
ttrans
V+
VADD_
V+
ADDA LE V+
NO0
VADD_
+3V
ADDB
NO1_-NO2_
VNO0
50Ohm
PI5A4531 NO3_
V+
EN2
EN1
90%
–3V
VOUT
COM
GND
50%
0V
V-
0V
VOUT
35pF
300Ohm
90%
VNO3
V–
ttrans
ttrans
V+
VADD_
V+
ADD_ LE V+
NO_
50Ohm
NC_
VADD_
+3V
50%
0V
VNC_
–3V
PI5A4532
V+
EN2
EN1
90%
COM
GND
V300Ohm
VOUT
35pF
0V
VOUT
90%
VNO_
V–
ttrans
ttrans
Figure 1. Address Transition Time
10
PS8591D
11/17/04
PS4530/PS4531/PS4532
Precision
8-Ch,
2-Ch,
Latched
Analog
Multiplexers/Switches
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Test Circuits/Timing Diagrams(continued)
V+
V+
VEN1
ADDC LE V+
NO0
+3V
50%
0V
ADDB
VNO0
NO1-NO7
ADDA
90%
PS4530
VEN1
V+
EN2
50Ohm
VOUT
COM
EN1
GND
300
Ohm
V–
VOUT
35pF
90%
0V
tON
V–
tOFF
V+
V+
ADDA LE V+
NO0_
VEN1
+3V
ADDB
NO1_NO2_NO3_
VNO0
90%
PS4531
VEN
EN2
50Ohm
VOUT
COM_
EN1
V+
GND
50%
0V
300
Ohm
V–
VOUT
35pF
90%
0V
V–
tON
tOFF
V+
V+
LE V+
VEN1
NO0_
ADD_
NC_
90%
50Ohm
EN2
VOUT
COM_
EN1
V+
GND
VNO0
+3V
PS4532
VEN1
50%
0V
V–
300
Ohm
VOUT
35pF
90%
0V
V–
tON
tOFF
V– = 0V for Single-Supply Operation.
Repeat Test for Each Section
Repeat Test for EN2, with Pulse Inverted and EN1 Connected to GND.
Figure 2. Enable Switching Time
11
PS8591D
11/17/04
PS4530/PS4531/PS4532
Precision
8-Ch,
2-Ch,
Latched
Analog
Multiplexers/Switches
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12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
V+
VADD_
ADDC LE V+
ADDB
50
Ohm
NO1-NO7
ADDA
PS4530
V+
VOUT
COM
EN1
EN2
+3V
300
Ohm
GND
35pF
V–
V–
V+
tF = <20ns
tR = <20ns
V+
VADD_
VADD_
ADDA LE V+
50%
0V
ADDB
NO0_-NO3_
50
Ohm
PS4531
V+
300
Ohm
GND
VNO_
90%
VOUT
COM
EN2
EN1
+3V
VOUT
35pF
V–
0V
V–
tBBM
V+
VADD_
ADD_ LE V+
NO_-NO3_
50
Ohm
PS4532
V+
VOUT
COM
EN2
EN1
+3V
300
Ohm
GND
35pF
V–
V–
V– = 0V for Single-Supply Operation.
Repeat Test for Each Section
Figure 3. Break-Before-Make Interval
12
PS8591D
11/17/04
PS4530/PS4531/PS4532
Precision
8-Ch,
2-Ch,
Latched
Analog
Multiplexers/Switches
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
V+
ADDC LE V+
Channel
Select
NO_
ADDB
V+
VNO =0V
VEN1
0V
ADDA
VEN1
V+
∆VOUT
VOUT
VOUT
COM
EN1
CL = 1000pF
EN2
V–
GND
50Ohm
∆VOUT is the measured voltage resulting from charge-transfer
error Q when the channel turns off.
Q = ∆VOUT x CL
V–
V– = 0V for single-supply operation.
Repeat test for each section.
Figure 4. Charge Injection
V+
NETWORK
ANALYZER
ADDC LE V+
Channel
Select
ADDB
ADDA
V+
VIN
50Ohm
VOUT
COM_
EN2
EN1
OFF ISOLATION = 20log VOUT
VIN
NO_
GND
50Ohm
MEASUREMENT
V
ON LOSS = 20log OUT
VIN
REF
CROSSTALK = 20log
50
Ohm
V–
50
Ohm
VOUT
VIN
V–
Measurements are standardized against short at socket terminals.
Off isolation is measured between COM_ and OFF NO_ terminal on each switch.
On loss is measured between COM_ and ON terminal on each switch.
Crosstalk (PS4531/PS4532) is measured from one channel (A,B,C) to all other channels.
Signal direction through switch is reversed; worst values are recorded.
Figure 5. Off Isolation, On Loss, and Crosstalk
V+
ADDC LE V+
Channel
Select
NO_
ADDB
NO_
ADDA
V+
EN2
EN1
1MHz
CAPACITANCE
ANALYZER
COM
GND
V–
V–
Figure 6. NO/COM Capacitance
13
PS8591D
11/17/04
PS4530/PS4531/PS4532
Precision
8-Ch,
2-Ch,
Latched
Analog
Multiplexers/Switches
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
V+
VADD_
ADDC EN2 V+
ADDB
50
Ohm
VLE
50
Ohm
NO1-NO7
ADDA
PI5A4530
+3V
VOUT
COM
LE
300
Ohm
EN1
GND
35pF
V–
tMPW
3V
V–
VLE
50%
0V
tH
V+
tS
tH
3V
VADD_
ADDA EN2 V+
ADDB NO1_NO2_NO3_
50
Ohm
VADD_
0V
+3V
90%
NO0_
VOUT
50
Ohm
VOUT
COM_
LE
EN1
GND
300
Ohm
V–
tON,tOFF
3V
PI5A4531
VLE
50%
0V
35pF
V–
V+
VADD_
ADD_ EN2 V+
NO_
50Ohm
PI5A4532
VLE
50
Ohm
+3V
VOUT
COM_
LE
EN1
NC_
GND
V–
300
Ohm
35pF
V–
V– = 0V for Single-Supply Operation.
Repeat Test for Each Section
Figure 7. Setup and Hold Times, Minimum LE Width
14
PS8591D
11/17/04
PS4530/PS4531/PS4532
Precision
8-Ch,
2-Ch,
Latched
Analog
Multiplexers/Switches
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Packaging Mechanical: 20-pin SOIC (S)
20
.2914
.2992
7.40
7.60
.010
.029
0.254
x 45˚
0.737
1
.496 12.60
.511 12.99
0.23
0.32
0.41 .016
1.27 .050
.020 0.508
REF
.030 0.762
.0926
.1043
2.35
2.65
SEATING
PLANE
.050
BSC
1.27
.0091
.0125
0-8˚
.0040
.0118
.013
.020
0.33
0.51
.394
.419
10.00
10.65
0.10
0.30
X.XX DENOTES CONTROLLING
X.XX DIMENSIONS IN MILLIMETERS
Packaging Mechanical: 20-pin SSOP (H)
20
.197
.220
5.00
5.60
1
.004
.009
.272
.295
6.90
7.50
0.55 .022
0.95 .037
.078
2.00 Max
SEATING
PLANE
.0256
BSC
0.65
.0098
Max.
0.25
0.09
0.25
.291
.322
7.40
8.20
.002
Min
0.050
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
15
PS8591D
11/17/04
PS4530/PS4531/PS4532
Precision
8-Ch,
2-Ch,
Latched
Analog
Multiplexers/Switches
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Ordering Information
Orde ring Code
Packaging Code
Package Type
PS4530CWP
S
20- pin SOIC
PS4530CAP
H
20- pin SSOP
PS4530EWP
S
20- pin SOIC
PS4530EAP
H
20- pin SSOP
PS4531CWP
S
20- pin SOIC
PS4531CAP
H
20- pin SSOP
PS4531EWP
S
20- pin SOIC
PS4531EAP
H
20- pin SSOP
PS4532EWP
S
20- pin SOIC
Notes:
1. Thermal characteristics can be found on the company web site at http://www.pericom.com/packaging/mechanicals.php
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
16
PS8591D
11/17/04