Preliminary Datasheet R2A20113ASP R03DS0026EJ0300 Rev.3.00 Nov 02, 2011 Critical Conduction Mode PFC Control IC Description The R2A20113A controls a boost converter to provide an active power factor correction. The R2A20113A adopts critical conduction mode for power factor correction and realizes high efficiency and a low switching noise by zero current switching. Because the zero current is detected by using the GND current, the ZCD Auxiliary winding is unnecessary. The feedback loop open detection, two mode overvoltage protection, overcurrent protection are built in the R2A20113A, and can constitute a power supply system of high reliability with few external parts. Features Absolute Maximum Ratings Supply voltage Vcc: 24 V Operating junction temperature Tjopr: –40 to +150°C Electrical characteristics UVLO operation start voltage VH: 12 V 0.8 V UVLO operation shutdown voltage VL: 9.2 V 0.7 V UVLO hysteresis voltage Hysuvl: 2.8 V 0.7 V Functions Boost converter control with critical conduction mode Two mode overvoltage protection Mode 1: Dynamic OVP corresponding to a voltage rise by load change Mode 2: Static OVP corresponding to overvoltage in stable. Feedback loop open detection Overcurrent protection Dynamic UVP corresponding to a voltage fall by load change Off Time Control function (Frequency Limitter) Package lineup: Pb-free SOP-8 (JEDEC) Ordering Information Part No. R2A20113ASP#W5 Package Name — R03DS0026EJ0300 Rev.3.00 Nov 02, 2011 Package Abbreviation Package Code PRSP0008DJ-A SP Taping Abbreviation (Quantity) W (2,500 pcs/reel) Page 1 of 12 R2A20113ASP Preliminary Pin Arrangement FB 1 8 VCC COMP 2 7 OUT RT 3 6 GND VREF 4 5 CS (Top view) Pin Function Pin No. 1 2 3 Pin Name FB COMP RT Error amplifier input terminal Error amplifier output terminal A resistor connection terminal for RAMP current setting 4 5 6 7 8 VREF CS GND OUT VCC Reference voltage output terminal Zero current detection and overcurrent detection input terminal Ground Power MOSFET drive terminal Supply voltage terminal R03DS0026EJ0300 Rev.3.00 Nov 02, 2011 Function Page 2 of 12 R2A20113ASP Preliminary Block Diagram VREF VCC UVLO VREF: 5.02V 4 8 ON: 12V OFF: 9.2V VREF 40μA + – OUT 7 0V CS GND 60k LOGIC BLOCK – + 5 5p 6 –0.6V GD Disable (OVP & FB_LOW) OVP & FB_LOW BLOCK COMP Discharge VREF FB – + RT ErrorAmp 3 – + 1V FB 1 2.51V 4.1V 10p COMP 2 Dynamic OVP + – VFB × 1.04V Ramp Control Dynamic UVP + – R03DS0026EJ0300 Rev.3.00 Nov 02, 2011 VFB × 0.92V Page 3 of 12 R2A20113ASP Preliminary Absolute Maximum Ratings (Ta = 25°C) Item COMP terminal current Symbol VCC Ipk-snk-out Ipk-src-out Idc-snk-out Idc-src-out Icomp RT terminal current Vref terminal current Vref terminal voltage Vref terminal load capacitor FB terminal voltage CS terminal voltage Power dissipation Operating junction temperature Storage temperature Irt Iref Vt-ref Cref Vt-fb Vcs Pt Tj-opr Tstg Power Supply Voltage OUT terminal peak current OUT terminal DC current Notes: 1. 2. 3. 4. Ratings –0.3 to +24 0.9 –0.50 100 –50 Unit V A +1 –1 –60 to –2 –5 –0.3 to Vref + 0.3 0.1 to 1 –0.3 to +5 –5 to +0.3 0.68 –40 to +150 –55 to +150 mA Note 3 mA A mA V F V V W °C °C 4 Rated voltages are with reference to the GND terminal. For rated currents, inflow to the IC is indicated by (+), and outflow by (–). Shows the transient current when driving a capacitive load. In case of R2A20113ASP (SOP): ja = 120°C/W This value is a thing mounting on 40 40 1.6 [mm], a glass epoxy board of wiring density 10%. R03DS0026EJ0300 Rev.3.00 Nov 02, 2011 Page 4 of 12 R2A20113ASP Preliminary Electrical Characteristics (Ta = 25°C, VCC = 12 V, CS = 0.1 V, FB = COMP, RRT = 200 k) Item Supply VREF Error amplifier Symbol Min Typ Max Unit Test Conditions UVLO turn-on threshold Vuvlh 11.2 12 12.8 V UVLO turn-off threshold Vuvll 8.5 9.2 9.9 V UVLO hysteresis Hysuvl 2.1 2.8 3.5 V Standby current Istby — 130 250 A Operating current Icc — 1.8 2.6 mA Reference voltage Vref 4.945 5.020 5.095 V Line regulation Vref-line — 5 20 mV Isource = 0 mA Vcc = 10 V to 24 V Load regulation Vref-load — 5 20 mV Isource = 0 mA to –5 mA Temperature stability dVref — 80 — ppm/°C OVP-VREF threshold voltage ovp-vref Vref+ 0.2 Vref+ 0.4 Vref+ 0.6 V Feedback voltage Vfb 2.472 2.510 2.548 V FB-COMP short Input bias current Ifb –0.40 –0.15 –0.05 A Measured pin: FB Open loop gain Av — 65 — dB * Upper clamp voltage Vclamp-comp 3.65 4.10 4.3 V FB = 2.0 V COMP: Open Low voltage Vl-comp — 0.1 0.3 V FB = 3.0 V VCC = Vuvlh – 0.2 V Isource = 0 mA Ta = –40 to +125°C * 1 1 COMP: Open Source current Isrc-comp –13.5 –10 –6 A FB = 1 V Sink current Isnk-comp 6 10 13.5 A FB = 3.5 V Transconductance gm 25 46 75 s FB = 2.45V 2.55 V COMP = 2.5 V COMP = 2.5 V COMP = 2.5 V RT — 1.0 — V * 1 dVramp 2.90 3.1 3.3 V * 2 V-rt 1.9 2.0 2.1 V RAMP offset voltage Voff_ramp RAMP amplitude RT voltage Zero ZCD threshold voltage Vzcd –4 0 4 mV current detector Input bias current Ics –58 –42 –25 A Vcs = 0 V FB = 2.0 V, COMP = 2.5 V Restart Restart time delay Tstart 75 150 330 s Off time control Minimum off time Toff-min 1.0 1.4 1.8 s Notes: *1 Design spec *2 dVramp = Vclamp_comp – Voff_ramp R03DS0026EJ0300 Rev.3.00 Nov 02, 2011 Page 5 of 12 R2A20113ASP Preliminary Electrical Characteristics (cont.) (Ta = 25°C, VCC = 12 V, CS = 0.1 V, FB = COMP, RRT = 200 k) Item Out Rise time Symbol tr-out Min Typ Max Unit — 35 100 ns Test Conditions CL = 1000 pF 90% 10% tr Fall time tf-out — 35 100 ns CL = 1000 pF 90% 10% tf Out low voltage Over Vol1-out — 0.08 0.2 V Isink = 20 mA Vol2-out — 0.05 0.7 V Isink = 10 mA, VCC = 5 V Out high voltage Voh-out 11.5 11.8 — V Isource = –20 mA OCP threshold voltage Vocp –0.63 –0.6 –0.57 V Dynamic OVP threshold voltage Vdovp — Vfb 1.040 — V * 1 Dynamic UVP threshold voltage Vduvp — Vfb 0.920 — V * 1 Static OVP threshold voltage Vsovp Vfb 1.075 Vfb 1.090 Vfb 1.105 V Static OVP hysteresis Hys-sovp 50 100 150 mV FB low detect threshold voltage Vfblow 0.25 0.3 0.35 V FB low detect hysteresis Hysfblow 0.16 0.20 0.24 V current protection Over & Under voltage protection Note: *1 Design spec R03DS0026EJ0300 Rev.3.00 Nov 02, 2011 Page 6 of 12 R2A20113ASP Preliminary Waveforms 1. Start-up 12V (Vuvlh) VCC 5.02V (Vref) 3.6V VREF VREF GOOD (Internal signal) FB 0.5V (Vfblow + Hysfblow) COMP 1.0V (Voff_ramp) OUT 2. Shut-down 9.2V (Vuvll) VCC OUT Normal operation R03DS0026EJ0300 Rev.3.00 Nov 02, 2011 Page 7 of 12 R2A20113ASP Preliminary 3. Gate Drive Output COMP RAMP+1V (Internal signal) RAMP (Internal signal) IL 0V (Vzcd) CS OUT Enlargement around Zero-current detection COMP RAMP+1V (Internal signal) RAMP (Internal signal) IL 0mA 0V (Vzcd) CS 0.44μs OUT R03DS0026EJ0300 Rev.3.00 Nov 02, 2011 Page 8 of 12 R2A20113ASP Preliminary 4. Overvoltage Protection (OVP) Vsovp: Vfb × 1.09V Hys-sovp: 100mV VFB OUT OFF (Internal signal) COMP OUT 5. FB Low Detection VFB 0.3V (Vfblow) 0.5V (Vfblow + Hysfblow) FB LOW (Internal signal) COMP OUT R03DS0026EJ0300 Rev.3.00 Nov 02, 2011 Page 9 of 12 R2A20113ASP Preliminary 6. Overcurrent Protection (OCP) COMP RAMP+1V (Internal signal) RAMP (Internal signal) IL 0V (Vzcd) CS –0.6V (Vocp) OUT 7. Off Time Control (Frequency Limiter) IL 0A ZCD_pulse (Internal signal) ZCD_mask (Internal signal) 1.4μs (Toff_min) 1.4μs (Toff_min) 1.4μs (Toff_min) OUT R03DS0026EJ0300 Rev.3.00 Nov 02, 2011 Page 10 of 12 R2A20113ASP Preliminary System Diagram D1 L1 PFC OUT (390V dc) 6M Q1 1.0μ 220μ (450V) + From OUT VRB1 GND 0.05 (5W) AUX VREF VCC 4 8 1μ 0.1μ OUT 7 To Q1 gate GND CS 6 5 100 1000p R2A20113A RT FB 3 1 200k COMP 2 200k 0.022μ 0.047μ R03DS0026EJ0300 Rev.3.00 Nov 02, 2011 Page 11 of 12 R2A20113ASP Preliminary Package Dimensions JEITA Package Code P-SOP8-3.94x4.93-1.27 RENESAS Code PRSP0008DJ-A *1 Previous Code — MASS[Typ.] 0.073g NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. F D 8 5 c *2 E HE bp Terminal cross section Reference Symbol (Ni/Pd/Au plating) Index mark 1 Z 4 *3 e bp x M A L1 θ S A1 L y S R03DS0026EJ0300 Rev.3.00 Nov 02, 2011 Detail F D E A2 A1 A bp b1 c c1 θ HE e x y Z L L1 Dimension in Millimeters Min Nom Max 4.80 4.93 4.98 3.81 3.94 3.99 1.47 0.10 0.15 0.25 1.73 0.35 0.41 0.49 0.19 0° 5.84 0.20 5.99 1.27 0.25 8° 6.20 0.25 0.10 0.41 0.56 0.64 1.03 0.89 Page 12 of 12 Notice 1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website. 2. 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