RT8283B 3A, 23V, 1.2MHz Synchronous Step-Down Converter General Description The RT8283B is a high-efficiency, monolithic synchronous step-down DC/DC converter that can deliver up to 3A output current from a 4.5V to 23V input supply. The RT8283B's current mode architecture and external compensation allow the transient response to be optimized over a wide range of loads and output capacitors. Cycle-by-cycle current limit provides protection against shorted outputs and soft-start eliminates input current surge during start-up. The RT8283B provides output under voltage protection and thermal shutdown protection. The low current (<3μA) shutdown mode provides output disconnect, enabling easy power management in batterypowered systems. The RT8283B is available in a SOP-8 (Exposed Pad) package. Features ±1.5% High Accuracy Feedback Voltage 4.5V to 23V Input Voltage Range 3A Output Current Integrated N-MOSFET Switches Current Mode Control Fixed Frequency Operation : 1.2MHz Adjustable Output from 0.8V to 20V Up to 95% Efficiency Programmable Soft-Start Stable with Low-ESR Ceramic Output Capacitors Cycle-by-Cycle Over Current Protection Input Under Voltage Lockout Output Under Voltage Protection Thermal Shutdown Protection RoHS Compliant and Halogen Free Ordering Information Applications RT8283B Package Type SP : SOP-8 (Exposed Pad-Option 1) Lead Plating System G : Green (Halogen Free and Pb Free) H : UVP Hiccup L : UVP Latch-Off Note : Wireless AP/Router Set-Top-Box Industrial and Commercial Low Power Systems LCD Monitors and TVs Green Electronics/Appliances Point of Load Regulation of High-Performance DSPs Richtek products are : ` RoHS compliant and compatible with the current require- Pin Configurations (TOP VIEW) ments of IPC/JEDEC J-STD-020. ` Suitable for use in SnPb or Pb-free soldering processes. Marking Information RT8283BGSP : Product Number RT8283B xGSPYMDNN x : H or L 8 BOOT VIN 2 SW GND 3 GND 7 EN 6 COMP 5 FB 9 4 SS SOP-8 (Exposed Pad) YMDNN : Date Code DS8283B-01 March 2011 www.richtek.com 1 RT8283B Typical Application Circuit 2 VIN 4.5V to 23V CIN 10µF x 2 REN 100k CSS 0.1µF BOOT VIN 1 RT8283B SW 3 7 EN 8 SS 4, Exposed Pad (9) GND CBOOT L 100nF 3.6µH R1 75k FB 5 COMP 6 CC 2.2nF RC 22k VOUT 3.3V/3A COUT 22µF x 2 R2 24k CP Open Recommended Component Selection VOUT (V) R1 (kΩ) 8 27 5 62 3.3 75 2.5 25.5 1.5 10.5 1.2 12 1 3 R2 (kΩ) 3 11.8 24 12 12 24 12 RC (kΩ) 51 33 22 16 10 8.2 6.8 CC (nF) 2.2 2.2 2.2 2.2 2.2 2.2 2.2 L (μH) 10 6.8 3.6 3.6 2 2 2 COUT (μF) 22 x 2 22 x 2 22 x 2 22 x 2 22 x 2 22 x 2 22 x 2 Functional Pin Description Pin No. Pin Name Pin Function Bootstrap for High Side Gate Driver. Connect a 0.1μF or greater ceramic capacitor from BOOT to SW pins. Input Supply Voltage, 4.5V to 23V. Must bypass with a suitably large ceramic capacitor. 1 BOOT 2 VIN 3 SW Switch Node--Connect this pin to an external L-C filter. 4, 9 (Exposed Pad) GND Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. 5 FB Feedback Input. This pin is connected to the converter output. It is used to set the output of the converter to regulate to the desired value via an internal resistive divider. For an adjustable output, an external resistive divider is connected to this pin. 6 COMP Compensation Node. COMP is used to compensate the regulation control loop. Connect a series RC network from COMP to GND. In some cases, an additional capacitor from COMP to GND is required. 7 EN Chip Enable (Active High). A logic low forces the RT8283B into shutdown mode reducing the supply current to less than 3μA. Attach this pin to VIN with a 100kΩ pull up resistor for automatic startup. 8 SS Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor from SS to GND to set the soft-start period. A 0.1μF capacitor sets the soft-start period to 13.5ms. www.richtek.com 2 DS8283B-01 March 2011 RT8283B Function Block Diagram VIN Internal Regulator Oscillator 1.2MHz / 300kHz Slope Comp Shutdown Comparator VA VCC 1.2V 5k EN Foldback Control + - Current Sense Amplifier + - VA 0.4V + UV Comparator Lockout Comparator + 2.7V 3V VCC BOOT S + R Current Comparator Q 85mΩ SW Q 85mΩ GND 6µA 0.8V SS FB DS8283B-01 March 2011 + +EA - COMP www.richtek.com 3 RT8283B Absolute Maximum Ratings (Note 1) Supply Voltage, VIN ------------------------------------------------------------------------------------------------- −0.3V to 25V Input Voltage, SW --------------------------------------------------------------------------------------------------- −0.3V to (VIN + 0.3V) VBOOT − VSW ---------------------------------------------------------------------------------------------------------- −0.3V to 6V All Other Pin Voltages --------------------------------------------------------------------------------------------- −0.3V to 6V Power Dissipation, PD @ TA = 25°C SOP-8 (Exposed Pad) --------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) SOP-8 (Exposed Pad), θJA ---------------------------------------------------------------------------------------SOP-8 (Εxposed Pad), θJC --------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Mode) ---------------------------------------------------------------------------------------MM (Machine Mode) ------------------------------------------------------------------------------------------------ Recommended Operating Conditions 1.333W 75°C/W 15°C/W 260°C 150°C −65°C to 150°C 2kV 200V (Note 4) Supply Voltage, VIN ------------------------------------------------------------------------------------------------- 4.5V to 23V Junction Temperature Range -------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range -------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VIN = 12V, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Shutdown Supply Current VEN = 0V -- 0.5 3 μA Supply Current VEN = 3V, VFB = 0.9V -- 0.8 1.2 mA 0.788 0.8 0.812 V -- 940 -- μA/V RDS(ON)1 -- 85 -- mΩ RDS(ON)2 -- 85 -- mΩ -- 0 10 μA 4.5 5.8 -- A -- 1.5 -- A -- 5.6 -- A/V 1 1.2 1.4 MHz VFB = 0V -- 300 -- kHz VFB = 0.7V --- 75 100 --- % ns Feedback Voltage Error Amplifier Transconductance High Side Switch On-Resistance Low Side Switch On-Resistance High Side Switch Leakage Current High Side Switch Current Limit VFB 4.5V ≤ VIN ≤ 23V GEA ΔIC = ±10μA VEN = 0V, VSW = 0V Min. Duty Cycle, VBOOT − VSW = 4.8V Low Side Switch Current Limit COMP to Current Sense GCS Transconductance Oscillation Frequency F OSC1 Short Circuit Oscillation F OSC2 Frequency Maximum Duty Cycle Minimum On-Time DMAX t ON From Drain to Source To be continued www.richtek.com 4 DS8283B-01 March 2011 RT8283B Parameter EN Threshold Voltage Symbol Conditions Min Typ Max Unit Logic-High VIH 2.7 -- 5.5 Logic-Low VIL -- -- 0.4 3.8 4.2 4.5 V -- 320 -- mV Input Under Voltage Lockout Threshold V IN Rising Input Under Voltage Lockout Hysteresis V Soft-Start Current V SS = 0V -- 6 -- μA Soft-Start Period CSS = 0.1μF -- 13.5 -- ms -- 150 -- °C Thermal Shutdown TSD Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. θJA is measured in natural convection at TA = 25°C on a high effective thermal conductivity four-layer test board of JEDEC 51-7 thermal measurement standard. The measurement case position of θJC is on the exposed pad for SOP-8 (Exposed Pad) package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. DS8283B-01 March 2011 www.richtek.com 5 RT8283B Typical Operating Characteristics Efficiency vs. Output Current Reference Voltage vs. Input Voltage 0.820 90 0.815 Reference Voltage (V) 100 Efficiency (%) 80 VIN = 12V VIN = 24V 70 60 50 40 30 20 0.810 0.805 0.800 0.795 0.790 0.785 10 VOUT = 3.3V VIN = 4.5 to 23V, VOUT = 3.3V, IOUT = 0A 0 0.780 0.0 0.3 0.5 0.8 1.0 1.3 1.5 1.8 2.0 4 6 8 Output Current (A) 14 16 18 20 22 24 Output Voltage vs. Output Current Reference Voltage vs. Temperature 3.360 3.350 0.815 3.340 Output Voltage (V) 0.810 0.805 0.800 0.795 0.790 3.330 3.320 VIN = 23V 3.310 3.300 VIN = 12V 3.290 3.280 3.270 3.260 0.785 3.250 VIN = 12V, VOUT = 3.3V, IOUT = 0A 0.780 VOUT = 3.3V 3.240 -50 -25 0 25 50 75 100 125 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 Output Current (A) Temperature (°C) Frequency vs. Temperature Frequency. vs. Input Voltage 1.40 1.40 1.35 1.35 1.30 1.30 Frequency (MHz)1 Frequency (MHz)1 12 Input Voltage (V) 0.820 Reference Voltage (V) 10 1.25 1.20 1.15 1.10 1.05 1.25 1.20 1.15 1.10 1.05 VOUT = 3.3V, IOUT = 0A 1.00 VIN = 12V, VOUT = 3.3V, IOUT = 0A 1.00 4 6 8 10 12 14 16 18 Input Voltage (V) www.richtek.com 6 20 22 24 -50 -25 0 25 50 75 100 125 Temperature (°C) DS8283B-01 March 2011 RT8283B Current Limit vs. Temperature 8.0 7.5 7.5 7.0 7.0 Current Limit (A) Current Limit (A) Current Limit vs. Duty Cycle 8.0 6.5 6.0 5.5 6.5 6.0 5.5 5.0 5.0 4.5 4.5 4.0 4.0 VIN = 12V, VOUT = 3.3V 0 10 20 30 40 50 60 70 -50 80 -25 0 25 50 75 100 Duty Cycle (%) Temperature (°C) Output Current Limit vs. Input Voltage Load Transient Response 125 6.0 Output Current Limit (A) 5.5 5.0 VOUT (50mV/Div) 4.5 4.0 VOUT = 1.2V VOUT = 3.3V (Add Bootstrap Diode) VOUT = 3.3V 3.5 3.0 2.5 2.0 IOUT (2A/Div) 1.5 1.0 0.5 VIN = 12V, VOUT = 3.3V, IOUT = 0A to 3A 0.0 4 6 8 10 12 14 16 18 20 22 24 Time (100μs/Div) Input Voltage (V) Load Transient Response Switching VOUT (5mV/Div) VOUT (50mV/Div) VSW (10V/Div) IOUT (2A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 1.5A to 3A Time (100μs/Div) DS8283B-01 March 2011 IL (2A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 3A Time (500ns/Div) www.richtek.com 7 RT8283B Switching VOUT (5mV/Div) Power On from VIN VIN (5V/Div) VSW (10V/Div) VOUT (2V/Div) IL (2A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 1.5A IL (2A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 3A Time (500ns/Div) Time (5ms/Div) Power Off from VIN Power On from EN VEN (5V/Div) VIN (5V/Div) VOUT (2V/Div) VOUT (2V/Div) IL (2A/Div) IL (2A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 3A VIN = 12V, VOUT = 3.3V, IOUT = 3A Time (5ms/Div) Time (5ms/Div) Power Off from EN VEN (5V/Div) VOUT (2V/Div) IL (2A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 3A Time (5ms/Div) www.richtek.com 8 DS8283B-01 March 2011 RT8283B Application Information The RT8283B is a synchronous high voltage buck converter that can support an input voltage range from 4.5V to 23V and the output current can be up to 3A. Output Voltage Setting The resistive voltage divider allows the FB pin to sense the output voltage as shown in Figure 1. Soft-Start The RT8283B contains an external soft-start clamp that gradually raises the output voltage. The soft-start timing can be programmed by the external capacitor between SS pin and GND. The chip provides a 6μA charge current for the external capacitor. If 0.1μF capacitor is used to set the soft-start, it's period will be 13.5ms (typ.). VOUT Chip Enable Operation R1 FB RT8283B R2 GND Figure 1. Output Voltage Setting The output voltage is set by an external resistive voltage divider according to the following equation : VOUT = VFB ⎛⎜ 1+ R1 ⎞⎟ ⎝ R2 ⎠ Where VFB is the feedback reference voltage (0.8V typ.). External Bootstrap Diode Connect a 100nF low ESR ceramic capacitor between the BOOT pin and SW pin. This capacitor provides the gate driver voltage for the high side MOSFET. The EN pin is the chip enable input. Pulling the EN pin low (<0.4V) will shutdown the device. During shutdown mode, the RT8283B quiescent current will drop below 3μA. Driving the EN pin high (>2.7V, < 5.5V) will turn on the device again. For external timing control (e.g.RC), the EN pin can also be externally pulled high by adding a REN* resistor and C EN * capacitor from the VIN pin (see Figure 5). An external MOSFET can be added to implement digital control on the EN pin when no system voltage above 2.5V is available, as shown in Figure 3. In this case, a 100kΩ pull-up resistor, REN, is connected between VIN and the EN pin. MOSFET Q1 will be under logic control to pull down the EN pin. 2 VIN REN 100k Chip Enable It is recommended to add an external bootstrap diode between an external 5V and BOOT pin for efficiency improvement when input voltage is lower than 5.5V or duty cycle is higher than 65% .The bootstrap diode can be a low cost one such as IN4148 or BAT54. The external 5V can be a 5V fixed input from system or a 5V output of the RT8283B. Note that the external boot voltage must be lower than 5.5V. 5V BOOT RT8283B 100nF SW VIN CIN BOOT 1 CBOOT RT8283B 7 EN VOUT L SW 3 R1 Q1 8 SS CSS 4, Exposed Pad(9) GND COUT FB 5 COMP 6 CC RC R2 CP Figure 3. Enable Control Circuit for Logic Control with Low Voltage To prevent enabling circuit when VIN is smaller than the VOUT target value, a resistive voltage divider can be placed between the input voltage and ground and connected to the EN pin to adjust IC lockout threshold, as shown in Figure 4. For example, if an 8V output voltage is regulated from a 12V input voltage, the resistor REN2 can be selected to set input lockout threshold larger than 8V. Figure 2. External Bootstrap Diode DS8283B-01 March 2011 www.richtek.com 9 RT8283B 2 VIN 12V REN1 100k CIN 10µF VIN BOOT equation : 1 CBOOT L RT8283B 7 EN SW 3 VOUT 8V R1 REN2 8 SS CSS 4, Exposed Pad(9) GND COUT FB 5 COMP 6 CC RC R2 CP Figure 4. The Resistors can be Selected to Set IC Lockout Threshold Hiccup Mode For the RT8283BH, it provides Hiccup Mode Under Voltage Protection (UVP). When the FB voltage drops below half of the feedback reference voltage, VFB, the UVP function will be triggered and the RT8283BH will shut down for a period of time and then recover automatically. The Hiccup Mode UVP can reduce input current in short-circuit conditions. Latch Off Mode For the RT8283BL, it provides Latch Off Mode Under Voltage Protection (UVP). When the FB voltage drops below half of the feedback reference voltage, VFB, the UVP will be triggered and the RT8283BL will shut down in Latch Off Mode. In shutdown condition, the RT8283BL can be reset by EN pin or power input VIN. Inductor Selection The inductor value and operating frequency determine the ripple current according to a specific input and output voltage. The ripple current ΔIL increases with higher VIN and decreases with higher inductance. V V ΔIL = ⎡⎢ OUT ⎤⎥ × ⎡⎢1− OUT ⎤⎥ VIN ⎦ ⎣ f ×L ⎦ ⎣ Having a lower ripple current reduces not only the ESR losses in the output capacitors but also the output voltage ripple. High frequency with small ripple current can achieve highest efficiency operation. However, it requires a large inductor to achieve this goal. For the ripple current selection, the value of ΔIL = 0.24(IMAX) will be a reasonable starting point. The largest ripple current occurs at the highest VIN. To guarantee that the ripple current stays below the specified maximum, the inductor value should be chosen according to the following www.richtek.com 10 ⎡ VOUT ⎤ ⎡ VOUT ⎤ L =⎢ ⎥ × ⎢1 − ⎥ ⎣ f × ΔIL(MAX) ⎦ ⎣ VIN(MAX) ⎦ The inductor's current rating (caused a 40°C temperature rising from 25°C ambient) should be greater than the maximum load current and its saturation current should be greater than the short circuit peak current limit. Please see Table 2 for the inductor selection reference. Table 2. Suggested Inductors for Typical Application Circuit Component Supplier Series Dimensions (mm) TDK VLF10045 10 x 9.7 x 4.5 TDK TAIYO YUDEN SLF12565 12.5 x 12.5 x 6.5 NR8040 8x8x4 CIN and COUT Selection The input capacitance, C IN, is needed to filter the trapezoidal current at the source of the high side MOSFET. To prevent large ripple current, a low ESR input capacitor sized for the maximum RMS current should be used. The RMS current is given by : V IRMS = IOUT(MAX) OUT VIN VIN −1 VOUT This formula has a maximum at VIN = 2VOUT, where I RMS = I OUT /2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. For the input capacitor, two 10μF low ESR ceramic capacitors are recommended. For the recommended capacitor, please refer to Table 3 for more detail. The selection of COUT is determined by the required ESR to minimize voltage ripple. Moreover, the amount of bulk capacitance is also a key for COUT selection to ensure that the control loop is stable. Loop stability can be checked by viewing the load transient response as described in a later section. The output ripple, ΔVOUT , is determined by : 1 ⎤ ΔVOUT ≤ ΔIL ⎡⎢ESR + 8fC OUT ⎥⎦ ⎣ DS8283B-01 March 2011 RT8283B The output ripple will be highest at the maximum input Checking Transient Response voltage since ΔIL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirement. Dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR value. However, it provides lower capacitance density than other types. Although Tantalum capacitors have the highest capacitance density, it is important to only use types that pass the surge test for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR. However, it can be used in cost-sensitive applications for ripple current rating and long term reliability considerations. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient and audible piezoelectric effects. The high Q of ceramic capacitors with trace inductance can also lead to significant ringing. The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ΔILOAD (ESR) also begins to charge or discharge COUT generating a feedback error signal for the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. EMI Consideration Since parasitic inductance and capacitance effects in PCB circuitry would cause a spike voltage on the SW pin when high side MOSFET is turned-on/off, this spike voltage on SW may impact on EMI performance in the system. In order to enhance EMI performance, there are two methods to suppress the spike voltage. One is to place an R-C snubber between SW and GND and make them as close as possible to the SW pin (see Figure 5). Another method is adding a resistor in series with the bootstrap capacitor, CBOOT. But this method will decrease the driving capability to the high side MOSFET. It is strongly recommended to reserve the R-C snubber during PCB layout for EMI improvement. Moreover, reducing the SW trace area and keeping the main power in a small loop will be helpful on EMI performance. For detailed PCB layout guide, please refer to the section of Layout Consideration. Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. 2 VIN 4.5V to 23V REN* Chip Enable CIN 10µF x 2 VIN BOOT 1 CBOOT L 100nF 3.6µH RT8283B 7 EN SW 3 RS* CEN* 8 SS CSS 4, 0.1µF Exposed Pad(9) * : Optional RBOOT* GND R1 75k CS* FB 5 COMP 6 VOUT 3.3V/3A CC 2.2nF RC 22k COUT 22µFx2 R2 24k CP NC Figure 5. Reference Circuit with Snubber and Enable Timing Control DS8283B-01 March 2011 www.richtek.com 11 RT8283B Thermal Considerations PD(MAX) = (TJ(MAX) − TA ) / θJA Where T J(MAX) is the maximum operation junction temperature , TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification of RT8283B, the maximum junction temperature is 125°C. The junction to ambient thermal resistance θJA is layout dependent. For PSOP-8 package, the thermal resistance θJA is 75°C/W on the standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by following formula : resistance θJA. For RT8283B package, the Figure 7. of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power dissipation allowed. 2.2 Four-Layer PCB 2.0 Power Dissipation (W) For continuous operation, do not exceed the maximum operation junction temperature 125°C. The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : 1.8 Copper Area 70mm2 50mm2 30mm2 10mm2 Min.Layout 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 7. Derating Curves for RT8283B Package P D(MAX) = (125°C − 25°C) / (75°C/W) = 1.333W (min.copper area PCB layout) P D(MAX) = (125°C − 25°C) / (49°C/W) = 2.04W (70mm2copper area PCB layout) The thermal resistance θJA of SOP-8 (Exposed Pad) is determined by the package architecture design and the PCB layout design. However, the package architecture design had been designed. If possible, it's useful to increase thermal performance by the PCB layout copper design. The thermal resistance θJA can be decreased by adding copper area under the exposed pad of SOP-8 (Exposed Pad) package. As shown in Figure 6, the amount of copper area to which the SOP-8 (Exposed Pad) is mounted affects thermal performance. When mounted to the standard SOP-8 (Exposed Pad) pad (Figure 6a.), θJA is 75°C/W. Adding copper area of pad under the SOP-8 (Exposed Pad) (Figure 6b.) reduces the θJA to 64°C/W. Even further, increasing the copper area of pad to 70mm2 (Figure 6e.) reduces the θJA to 49°C/W. The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal www.richtek.com 12 (a) Copper Area = (2.3 x 2.3) mm2, θJA = 75°C/W (b) Copper Area = 10mm2, θJA = 64°C/W (c) Copper Area = 30mm2 , θJA = 54°C/W DS8283B-01 March 2011 RT8283B (d) Copper Area = 50mm2 , θJA = 51°C/W (e) Copper Area = 70mm2 , θJA = 49°C/W Figure 6. Themal Resistance vs. Copper Area Layout Design Layout Consideration ` For best performance of the RT8283B, the follow layout guidelines must be strictly followed. SW should be connected to inductor by wide and short trace. Keep sensitive components away from this trace. ` The feedback components must be connected as close to the device as possible ` Input capacitor must be placed as close to the IC as possible. SW GND VIN GND The feedback components must be connected as close to the device as possible. CC CIN CSS Input capacitor must be placed as close to the IC as possible. BOOT RS* CS* VIN 2 SW 3 GND 4 GND 8 SS 7 EN 6 COMP 5 FB 9 COUT CP SW should be connected to inductor by wide and short trace. Keep sensitive components away from this trace. RC R1 R2 L VOUT REN VIN VOUT GND Figure 8. PCB Layout Guide Table 3. Suggested Capacitors for CIN and COUT Location Component Supplier Part No. Capacitance (μF) Case Size CIN MURATA GRM31CR61E106K 10 1206 CIN TDK C3225X5R1E106K 10 1206 CIN TAIYO YUDEN TMK316BJ106ML 10 1206 COUT MURATA GRM31CR60J476M 47 1206 COUT TDK C3225X5R0J476M 47 1210 COUT MURATA GRM32ER71C226M 22 1210 COUT TDK C3225X5R1C22M 22 1210 DS8283B-01 March 2011 www.richtek.com 13 RT8283B Outline Dimension H A M EXPOSED THERMAL PAD (Bottom of Package) Y J X B F C I D Dimensions In Millimeters Symbol Dimensions In Inches Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 4.000 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.510 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.000 0.152 0.000 0.006 J 5.791 6.200 0.228 0.244 M 0.406 1.270 0.016 0.050 X 2.000 2.300 0.079 0.091 Y 2.000 2.300 0.079 0.091 X 2.100 2.500 0.083 0.098 Y 3.000 3.500 0.118 0.138 Option 1 Option 2 8-Lead SOP (Exposed Pad) Plastic Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 5F, No. 95, Minchiuan Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)86672399 Fax: (8862)86672377 Email: [email protected] Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek. www.richtek.com 14 DS8283B-01 March 2011