MICREL SM802116UMG

SM802116
ClockWorks™ Fibre Channel
(106.25MHz, 212.5MHz)
Ultra-Low Jitter, LVDS Frequency
Synthesizer
General Description
Features
The SM802116 is a member of the ClockWorks™ family of
devices from Micrel and provides an extremely low-noise
timing solution for Fibre Channel clock signals. It is based
upon a unique patented RotaryWave® architecture that
provides very-low phase noise.
The device operates from a 3.3V or 2.5V power supply
and synthesizes LVDS output clocks at 106.25MHz or
212.5MHz. There are normally two clock outputs, but one
output can be achieved by powering down the second
output with the OE pin. The SM802116 accepts a
26.5625MHz crystal or LVCMOS reference clock.
Data sheet and support documentation can be found on
Micrel’s web site at: www.micrel.com.
• Generates one or two LVDS clock outputs at
106.25MHz or 212.5MHz
• 2.5V or 3.3V operating range
• Typical phase jitter @ 106.25MHz
(637kHz to 10MHz): 190fs
• Industrial temperature range (–40°C to +85°C)
• Green, RoHS, and PFOS compliant
• Available in 24-pin 4mm × 4mm QFN package
Applications
• Fibre Channel
• Storage Networking (SAN, NAS)
Block Diagram
ClockWorks is a trademark of Micrel, Inc
RotaryWave is a registered trademark of Multigig, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
July 2011
M9999-071811-A
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Micrel, Inc.
SM802116
Ordering Information(1)
Part Number
Marking
Shipping
Temperature Range
Package
SM802116UMG
802116
Tube
–40°C to +85°C
24-Pin QFN
SM802116UMGR
802116
Tape and Reel
–40°C to +85°C
24-Pin QFN
Note:
1. Devices are Green, RoHS, and PFOS compliant.
Pin Configuration
24-Pin QFN
(Top View)
Pin Description
Pin Number
Pin Name
Pin Type
Pin Level
Pin Function
19, 20
/Q1, Q1
O, (DIF)
LVDS
22, 23
/Q2, Q2
O, (DIF)
LVDS
24
VDDO2
PWR
Power Supply for Output Bank 2
2
VSSO2
PWR
Power Supply Ground for Output Bank 2
Differential Clock Output from Bank 1
106.25MHz or 212.5MHz
Differential Clock Output from Bank 2
106.25MHz or 212.5MHz
PLL Bypass, Selects Output Source
3
PLL_BYPASS
I, (SE)
0 = Normal PLL Operation
LVCMOS
1 = Output from Input Reference Clock or Crystal
45KΩ pull-down
4
July 2011
XTAL_SEL
I, (SE)
Selects PLL Input Reference Source
LVCMOS
0 = REF_IN, 1 = XTAL, 45KΩ pull-up
2
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SM802116
Pin Description (Continued)
Pin Number
Pin Name
5, 11, 16, 18
TEST
1
VDD
Pin Type
Pin Level
Pin Function
Factory Test pins, Do not connect anything to these pins.
PWR
Core Power Supply
13, 14, 15
VSS
PWR
Core Power Supply Ground
17
VDDO1
PWR
Power Supply for Output Bank 1
21
VSSO1
PWR
Power Supply Ground for Output Bank 1
8
REF_IN
I, (SE)
LVCMOS
9
XTAL_IN
I, (SE)
12pF crystal
10
XTAL_OUT
O, (SE)
12pF crystal
6
FSEL
I, (SE)
LVCMOS
7
OE1
I, (SE)
LVCMOS
12
OE2
I, (SE)
LVCMOS
Reference Clock Input
Crystal Reference Input, no load caps needed.
(see Figure 5)
Crystal Reference Output, no load caps needed.
(se Figure 5)
Frequency Select, 1 = 106.25MHz, 0 = 212.5MHz,
45KΩ pull-up
Output Enable, Q1 disables to tri-state,
0 = Disabled, 1 = Enabled, 45KΩ pull-up
Output Enable, Q2 disables to tri-state,
0 = Disabled, 1 = Enabled, 45KΩ pull-up
Truth Tables
PLL_BYPASS
XTAL_SEL
OE2
OE1
INPUT
OUTPUT
0
−
1
1
−
PLL
1
−
1
1
−
XTAL/REF_IN
−
0
1
1
REF_IN
−
−
1
1
1
XTAL
−
−
−
−
0
1
1
0
−
−
Q2 Tri-state
Q1 Tri-state
FSEL
Output Frequency
(MHz)
0
212.5
1
106.25
July 2011
−
3
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SM802116
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (VDD, VDDO1/2) ......................................+4.6V
Input Voltage (VIN) .............................. −0.50V to VDD + 0.5V
Lead Temperature (soldering, 20s)............................ 260°C
Case Temperature ..................................................... 115°C
Storage Temperature (Ts) ......................... −65°C to +150°C
Supply Voltage (VDD, VDDO1/2)............... +2.375V to +3.465V
Ambient Temperature (TA).......................... –40°C to +85°C
Junction Thermal Resistance(3)
QFN (θJA)
Still-Air......................................................... 50°C/W
QFN (ψJB)
Junction-to-Board ....................................... 30°C/W
DC Electrical Characteristics(4)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5%
TA = −40°C to +85°C.
Symbol
Parameter
VDD, VDDO1/2
Min.
Typ.
Max.
Units
2.5V Operating Voltage
2.375
2.5
2.625
V
VDD, VDDO1/2
3.3V Operating Voltage
3.135
3.3
3.465
V
106.25MHz - 1 output
77
96
IDD
REF_IN
Supply current VDD + VDDO
XTAL_SEL = 0
Outputs open
106.25MHz - 2 outputs
89
110
212.5MHz - 1 output
85
106
212.5MHz - 2 outputs
100
124
106.25MHz - 1 output
87
108
106.25MHz - 2 outputs
99
123
212.5MHz - 1 output
97
120
212.5MHz - 2 outputs
111
137
IDD
XTAL
Supply current VDD + VDDO
XTAL_SEL = 1
Outputs open
Condition
mA
mA
LVDS DC Electrical Characteristics(4)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5%
TA = −40°C to +85°C. RL = 100Ω across Q and /Q.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
VOD
Differential Output Voltage
Figure 1
275
350
475
mV
ΔVOD
VOD Magnitude Change
40
mV
VOS
Offset Voltage
1.50
V
ΔVOS
VOS Magnitude Change
50
mV
1.15
1.25
Notes:
1.
Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
2.
The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3.
Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
4.
The circuit is designed to meet the AC and DC specifications shown in the above table(s) after thermal equilibrium has been established.
July 2011
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SM802116
LVCMOS (PLL_BYPASS, XTAL_SEL, OE1/2, FSEL) DC Electrical Characteristics(4)
VDD = 3.3V ±5%, or 2.5V ±5%, TA = −40°C to +85°C.
Symbol
Parameter
Condition
VIH
Input High Voltage
VIL
Input Low Voltage
IIH
Input High Current
VDD = VIN = 3.465V
IIL
Input Low Current
VDD = 3.465V, VIN = 0V
Min.
Typ.
Max.
Units
2
VDD + 0.3
V
−0.3
0.8
V
150
μA
−150
μA
REF_IN DC Electrical Characteristics(4)
VDD = 3.3V ±5%, or 2.5V ±5%, TA = −40°C to +85°C.
Symbol
Parameter
VIH
Input High Voltage
VIL
Input Low Voltage
IIN
Input Current
Condition
Min.
XTAL_SEL = VIL, VIN = 0V to VDD
Max.
Units
1.1
VDD + 0.3
V
−0.3
0.6
V
−5
5
μA
XTAL_SEL = VIH, VIN = VDD
Typ.
20
µA
Crystal Characteristics
Parameter
Condition
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitor, C0
Correlation Drive Level
12pF Load
July 2011
Min.
Typ.
Max.
Units
Fundamental, Parallel Resonant
26.5625
1
10
5
50
5
100
MHz
Ω
pF
uW
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SM802116
AC Electrical Characteristics(4, 5)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5%
TA = −40°C to +85°C. RL = 100Ω across Q and /Q.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
FOUT1
Output Frequency 1
FSEL=1
106.25
MHz
FOUT2
Output Frequency 2
FSEL=0
212.5
MHz
FREF
Reference Input Frequency
TR/TF
LVDS Output Rise/Fall Time
ODC
Output Duty Cycle
TSKEW
Output-to-Output Skew
TLOCK
PLL Lock Time
26.5625
20% – 80%
Tjit(∅)
RMS Phase Jitter
220
400
48
50
52
%
45
ps
20
ms
Note 6
106.25MHz
Integration Range (637kHz – 10MHz)
Integration Range (12kHz – 20MHz)
Spurious Noise Components
26.5625MHz using 106.25MHz
26.5625MHz using 212.5MHz
ps
190
250
(7)
212.5MHz
Integration Range (637kHz – 10MHz)
Integration Range (12kHz – 20MHz)
MHz
100
fs
180
240
−90
−85
dBc
Notes:
5.
All phase noise measurements were taken with an Agilent 5052B phase noise system.
6.
Defined as skew between outputs at the same supply voltage and with equal load conditions; Measured at the output differential crossing points.
7.
Measured using 26.5625MHz crystal as the input reference source. If using an external reference input, use a low phase noise source. With an
external reference, the phase noise will follow the input source phase noise up to about 1MHz.
July 2011
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SM802116
Application Information
Input Reference
When operating with a crystal input reference, do not
apply a switching signal to REF_IN.
Crystal Layout
Keep the layers under the crystal as open as possible
and do not place switching signals or noisy supplies
under the crystal.
Crystal load capacitance is built inside the die so no
external capacitance is needed. See the Selecting a
Quartz crystal for the Clockworks Flex I Family of
Precision Synthesizers application note for further
details.
Contact Micrel’s HBW applications group if you need
assistance on selecting a suitable crystal for your
application at [email protected].
LVDS Outputs
LVDS outputs are to be terminated with 100Ω across Q
and /Q. For best performance load all outputs. You can
DC or AC-couple the outputs.
July 2011
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SM802116
Phase Noise Plots
Phase Noise Plot: 106.25MHz, 637kHz − 10MHz 184fS
Phase Noise Plot: 106.25MHz, 12kHz − 20MHz 241fS
July 2011
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SM802116
Phase Noise Plots (Continued)
Phase Noise Plot: 212.5MHz, 637kHz − 10MHz 178fS
Phase Noise Plot: 212.5MHz, 12kHz − 20MHz 234fS
July 2011
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SM802116
Figure 1. Duty Cycle Timing
Figure 2. All Outputs Rise/Fall Time
Figure 3. RMS Phase/Noise Jitter
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SM802116
Figure 4. LVDS Output Load and Test Circuit
Figure 5. Crystal Input Interface
July 2011
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SM802116
Package Information
24-Pin Package Type
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability
whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product
can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant
into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A
Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully
indemnify Micrel for any damages resulting from such use or sale.
© 2011 Micrel, Incorporated.
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