TI SN74AUP2G126YZPR

SN74AUP2G126
LOW-POWER DUAL BUS BUFFER GATE
WITH 3-STATE OUTPUTS
www.ti.com
SCES687B – JANUARY 2007 – REVISED JANUARY 2008
FEATURES
1
• Available in the Texas Instruments NanoFree™
Package
• Low Static-Power Consumption
(ICC = 0.9 µA Max)
• Low Dynamic-Power Consumption
(Cpd = 4 pF Typ at 3.3 V)
• Low Input Capacitance (Ci = 1.5 pF Typ)
• Low Noise – Overshoot and Undershoot
<10% of VCC
• Input-Disable Feature Allows Floating Input
Conditions
• Ioff Supports Partial-Power-Down Mode
Operation
• Input Hysteresis Allows Slow Input Transition
2
8
1
W
IE
3 EV 6
5
P4 R
7
2
•
RSE PACKAGE
(TOP VIEW)
YZP PACKAGE
(BOTTOM VIEW)
VCC
2OE
1Y
2A
2OE
1
1Y
2
2A
3
PR
See mechanical drawings for dimensions.
8
7
1OE
W
IE6 1A
V
E
4
5
GND
2Y
1A
1OE
YFP PACKAGE
(BOTTOM VIEW)
GND
2Y
1A
1OE
2A
1Y
2OE
VCC
4 5
3 6
2 7
1 8
2A
1Y
2OE
VCC
45
36
27
1 8
2Y
GND
1OE
1A
2Y
GND
•
•
•
VCC
DCU PACKAGE
(TOP VIEW)
•
•
•
and Better Switching Noise Immunity at Input
Wide Operating VCC Range of 0.8 V to 3.6 V
Optimized for 3.3-V Operation
3.6-V I/O Tolerant to Support Mixed-Mode
Signal Operation
tpd = 4.6 ns Max at 3.3 V
Suitable for Point-to-Point Applications
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model
(A114-B, Class II)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable
applications. This family ensures a very low static and dynamic power consumption across the entire VCC range
of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see
Figure 1 and Figure 2).
Switching Characteristics
Dynamic-Power Consumption
Static-Power Consumption
( mA)
at 25 MHz
(pF)
100%
100%
80%
80%
†
3.5
60%
60%
3.3-V
Logic
40%
3.3-V
LVC
†
40%
Voltage - V
3
†
Logic
2.5
Input
2
Output
1.5
1
0.5
20%
20%
AUP
0%
†
0%
0
AUP
Single, dual, and triple gates
Figure 1. AUP – The Lowest Power Family
-0.5
0
†
5
10
15
20
25
Time - ns
30
35
40
45
AUP1G08 data at CL = 15 pF
Figure 2. Excellent Signal Integrity
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
UNLESS OTHERWISE NOTED this document contains
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2008, Texas Instruments Incorporated
SN74AUP2G126
LOW-POWER DUAL BUS BUFFER GATE
WITH 3-STATE OUTPUTS
www.ti.com
SCES687B – JANUARY 2007 – REVISED JANUARY 2008
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
The SN74AUP2G126 is a dual bus driver/line driver with 3-state outputs, designed for 0.8-V to 3.6-V VCC
operation. The outputs are disabled when the associated output-enable (OE) input is low. This device has the
input-disable feature, which allows floating input signals.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
–40°C to 85°C
(1)
(2)
(3)
PACKAGE
(1) (2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING (3)
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YFP
(Pb-free)
Reel of 3000
SN74AUP2G126YFPR
_ _ _ HN_
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP
(Pb-free)
Reel of 3000
SN74AUP2G126YZPR
_ _ _ HN_
QFN – RSE
Reel of 3000
SN74AUP2G126RSER
HN
VSSOP – DCU
Reel of 3000
SN74AUP2G126DCUR
H26_
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
YFP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
DCU: The actual top-side marking has one additional character to designate the assembly/test site.
FUNCTION TABLE
INPUTS
(1)
2
OE
A
OUTPUT
Y
H
H
H
H
L
L
L
X (1)
Z
Floating inputs allowed
Submit Documentation Feedback
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74AUP2G126
SN74AUP2G126
LOW-POWER DUAL BUS BUFFER GATE
WITH 3-STATE OUTPUTS
www.ti.com
SCES687B – JANUARY 2007 – REVISED JANUARY 2008
LOGIC DIAGRAMS (POSITIVE LOGIC)
DCU, YFP, and YZP Packages
1
1OE
2
6
1A
1Y
7
2OE
5
3
2A
2Y
RSE Package
7
1OE
6
2
1A
1Y
1
2OE
3
5
2A
2Y
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VCC
Supply voltage range
–0.5
4.6
V
VI
Input voltage range (2)
–0.5
4.6
V
–0.5
4.6
V
(2)
UNIT
VO
Voltage range applied to any output in the high-impedance or power-off state
VO
Output voltage range in the high or low state (2)
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±20
mA
Continuous current through VCC or GND
±50
mA
θJA
Tstg
(1)
(2)
(3)
Package thermal impedance (3)
–0.5 VCC + 0.5
DCU package
227
RSE package
253
YZP package
102
YFP package
98.8
Storage temperature range
–65
150
V
°C/W
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
The package thermal impedance is calculated in accordance with JESD 51-7.
Submit Documentation Feedback
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74AUP2G126
3
SN74AUP2G126
LOW-POWER DUAL BUS BUFFER GATE
WITH 3-STATE OUTPUTS
www.ti.com
SCES687B – JANUARY 2007 – REVISED JANUARY 2008
RECOMMENDED OPERATING CONDITIONS (1)
VCC
Supply voltage
VCC = 0.8 V
VIH
High-level input voltage
VCC = 1.1 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
MIN
MAX
0.8
3.6
VCC
3.6
0.65 × VCC
3.6
1.6
3.6
2
3.6
VCC = 0.8 V
VIL
Low-level input voltage
VO
Output voltage
IOH
High-level output current
Low-level output current
VCC = 1.1 V to 1.95 V
0 0.35 × VCC
VCC = 2.3 V to 2.7 V
0
VCC = 3 V to 3.6 V
0
0.9
Active state
0
VCC
3-state
0
3.6
Input transition rise or fall rate
TA
Operating free-air temperature
(1)
4
0.7
VCC = 0.8 V
–20
VCC = 1.1 V
–1.1
VCC = 1.4 V
–1.7
VCC = 1.65 V
–1.9
VCC = 2.3 V
–3.1
V
V
V
µA
mA
–4
VCC = 0.8 V
20
VCC = 1.1 V
1.1
VCC = 1.4 V
1.7
VCC = 1.65 V
1.9
VCC = 2.3 V
3.1
VCC = 3 V
Δt/Δv
V
0
VCC = 3 V
IOL
UNIT
µA
mA
4
VCC = 0.8 V to 3.6 V
–40
200
ns/V
85
°C
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Submit Documentation Feedback
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74AUP2G126
SN74AUP2G126
LOW-POWER DUAL BUS BUFFER GATE
WITH 3-STATE OUTPUTS
www.ti.com
SCES687B – JANUARY 2007 – REVISED JANUARY 2008
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VOH
TEST CONDITIONS
VCC
MIN
VCC – 0.1
VCC – 0.1
IOH = –1.1 mA
1.1 V
0.75 × VCC
0.7 × VCC
IOH = –1.7 mA
1.4 V
1.11
1.03
IOH = –1.9 mA
1.65 V
1.32
1.3
2.05
1.97
1.9
1.85
2.72
2.67
2.3 V
IOH = –2.7 mA
3V
IOH = –4 mA
IOL = 20 µA
2.6
MAX
UNIT
V
2.55
0.8 V to 3.6 V
0.1
0.1
1.1 V
0.3 ×
VCC
0.3 ×
VCC
IOL = 1.7 mA
1.4 V
0.31
0.37
IOL = 1.9 mA
1.65 V
0.31
0.35
0.31
0.33
0.44
0.45
0.31
0.33
0.44
0.45
0 V to 3.6 V
0.1
0.5
µA
IOL = 1.1 mA
IOL = 2.3 mA
2.3 V
IOL = 3.1 mA
IOL = 2.7 mA
3V
IOL = 4 mA
II
TA = –40°C to 85°C
MAX
0.8 V to 3.6 V
IOH = –3.1 mA
A or OE
input
TYP
IOH = –20 µA
IOH = –2.3 mA
VOL
TA = 25°C
MIN
VI = GND to 3.6 V
V
Ioff
VI or VO = 0 V to 3.6 V
0V
0.2
0.6
µA
ΔIoff
VI or VO = 0 V to 3.6 V
0 V to 0.2 V
0.2
0.9
µA
IOZ
VO = VCC or GND
3.6 V
0.1
0.5
µA
ICC
VI = GND or (VCC to 3.6 V),
OE = VCC , IO = 0
0.8 V to 3.6 V
0.5
0.9
µA
40
50
110
120
0
0
A input
ΔICC
OE input
All inputs
VI = VCC – 0.6 V (1), IO = 0
VI = GND to 3.6 V,
OE = GND (2)
CI
VI = VCC or GND
Co
VO = VCC or GND
(1)
(2)
3.3 V
0.8 V to 3.6 V
0V
2
3.6 V
2
3.6 V
3
µA
pF
pF
One input at VCC – 0.6 V, other input at VCC or GND
To show ICC is very low when the input-disable feature is enabled
Submit Documentation Feedback
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74AUP2G126
5
SN74AUP2G126
LOW-POWER DUAL BUS BUFFER GATE
WITH 3-STATE OUTPUTS
www.ti.com
SCES687B – JANUARY 2007 – REVISED JANUARY 2008
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, CL = 5 pF (unless otherwise noted) (see Figure 3 and Figure 4)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC
TA = 25°C
MIN
0.8 V
tpd
A
Y
OE
Y
OE
Y
MIN
MAX
1.2 V ± 0.1 V
0.5
7.5
17.9
0.5
18.7
1.5 V ± 0.1 V
0.6
5.2
10.8
0.5
12.4
1.8 V ± 0.15 V
0.8
4.1
8.1
0.5
9.7
2.5 V ± 0.2 V
1.1
2.9
5
0.5
6.5
3.3 V ± 0.3 V
0.5
3
9.5
0.5
UNIT
9.9
ns
19.6
1.2 V ± 0.1 V
0.5
8.4
20.8
0.5
21.8
1.5 V ± 0.1 V
0.5
5.6
11.8
0.5
13.7
1.8 V ± 0.15 V
0.7
4.3
8.8
0.5
10.6
2.5 V ± 0.2 V
0.9
2.9
5.4
0.5
7
3.3 V ± 0.3 V
0.5
2.8
8.8
0.5
9.3
10.9
0.5
11.1
0.8 V
tdis
TA = –40°C to 85°C
MAX
19.2
0.8 V
ten
TYP
ns
12.1
1.2 V ± 0.1 V
0.6
5.2
1.5 V ± 0.1 V
1.1
3.8
7
0.9
7.1
1.8 V ± 0.15 V
1.9
3.5
5.6
1.6
5.8
2.5 V ± 0.2 V
0.9
2.5
3.9
0.8
4.2
3.3 V ± 0.3 V
0.5
3.5
9.3
0.5
9.3
ns
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, CL = 10 pF (unless otherwise noted) (see Figure 3 and Figure 4)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC
TA = 25°C
MIN
TYP
1.2 V ± 0.1 V
0.5
1.5 V ± 0.1 V
MIN
MAX
8.7
20.6
0.5
21.3
1.2
6
12.2
0.5
13.7
1.8 V ± 0.15 V
1.4
4.8
9.2
0.5
10.8
2.5 V ± 0.2 V
1.5
3.4
5.8
0.5
7.2
3.3 V ± 0.3 V
0.5
3.4
8.9
0.5
9.4
24
0.8 V
tpd
A
Y
OE
Y
6
OE
Y
ns
21.9
1.2 V ± 0.1 V
0.5
9.7
23.1
0.5
1.5 V ± 0.1 V
1
6.4
13.2
0.5
15
1.8 V ± 0.15 V
1
5
9.9
0.5
11.7
2.5 V ± 0.2 V
1.2
3.4
10.4
0.5
12
3.3 V ± 0.3 V
0.5
3.2
8.1
0.5
8.7
0.8 V
tdis
UNIT
23
0.8 V
ten
TA = –40°C to 85°C
MAX
ns
13.4
1.2 V ± 0.1 V
0.8
6.2
12.6
0.6
12.7
1.5 V ± 0.1 V
2.1
4.6
7.9
1.9
8.1
1.8 V ± 0.15 V
1.7
4.7
8.2
1.5
8.3
2.5 V ± 0.2 V
1
3.3
5.1
0.9
5.3
3.3 V ± 0.3 V
1.2
4.5
7.8
1.1
7.9
Submit Documentation Feedback
ns
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74AUP2G126
SN74AUP2G126
LOW-POWER DUAL BUS BUFFER GATE
WITH 3-STATE OUTPUTS
www.ti.com
SCES687B – JANUARY 2007 – REVISED JANUARY 2008
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, CL = 15 pF (unless otherwise noted) (see Figure 3 and Figure 4)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC
TA = 25°C
MIN
0.8 V
tpd
A
Y
OE
Y
OE
Y
MIN
MAX
23.4
1.2 V ± 0.1 V
0.5
9.7
22.7
0.5
1.5 V ± 0.1 V
1.7
4.6
13.6
0.5
15
1.8 V ± 0.15 V
1.7
5.4
10.2
0.5
11.7
2.5 V ± 0.2 V
1.7
3.9
6.5
0.5
7.9
3.3 V ± 0.3 V
0.5
3.7
8.4
0.5
UNIT
8.9
25.6
ns
23
1.2 V ± 0.1 V
0.5
10.5
24.8
0.5
1.5 V ± 0.1 V
1.5
7.1
14.3
0.5
16
1.8 V ± 0.15 V
1.4
5.6
10.8
0.5
12.4
2.5 V ± 0.2 V
1.6
3.9
6.8
0.5
8.3
3.3 V ± 0.3 V
0.5
3.6
7.6
0.5
8.3
0.8 V
tdis
TA = –40°C to 85°C
MAX
26.2
0.8 V
ten
TYP
ns
13.6
1.2 V ± 0.1 V
1.1
6.5
12.7
1
12.8
1.5 V ± 0.1 V
0.5
4.8
9.1
0.5
9.2
1.8 V ± 0.15 V
1.8
5.4
9.2
1.7
9.3
2.5 V ± 0.2 V
1.6
3.7
5.5
1.5
5.7
3.3 V ± 0.3 V
2.8
5.3
7.9
2.7
7.9
ns
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, CL = 30 pF (unless otherwise noted) (see Figure 3 and Figure 4)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC
TA = 25°C
MIN
0.8 V
tpd
A
Y
OE
Y
OE
Y
MIN
MAX
UNIT
36.4
0.5
13
30.8
0.5
31.2
1.5 V ± 0.1 V
2.7
9.1
18
1.1
19.1
1.8 V ± 0.15 V
2.6
7.2
13.6
1
14.8
2.5 V ± 0.2 V
2.6
5.3
8.6
1.3
9.9
3.3 V ± 0.3 V
1.4
4.8
7.9
0.7
8.6
ns
32.8
1.2 V ± 0.1 V
0.5
14.4
32.4
0.5
33.1
1.5 V ± 0.1 V
2.5
9.7
18.5
1.1
19.9
1.8 V ± 0.15 V
2.3
7.6
14.3
0.8
15.7
2.5 V ± 0.2 V
2.4
5.3
9
1.2
10.3
3.3 V ± 0.3 V
2.8
4.6
7.2
1.7
8.2
0.8 V
tdis
TA = –40°C to 85°C
MAX
1.2 V ± 0.1 V
0.8 V
ten
TYP
ns
20.1
1.2 V ± 0.1 V
0.5
10.3
19.3
0.5
19.3
1.5 V ± 0.1 V
1.9
7.6
14.5
1.8
14.5
1.8 V ± 0.15 V
3
8.8
14.9
2.8
14.9
2.5 V ± 0.2 V
2.9
6.5
10
2.9
10.1
3.3 V ± 0.3 V
0.5
8.2
17.9
0.5
17.9
Submit Documentation Feedback
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74AUP2G126
ns
7
SN74AUP2G126
LOW-POWER DUAL BUS BUFFER GATE
WITH 3-STATE OUTPUTS
www.ti.com
SCES687B – JANUARY 2007 – REVISED JANUARY 2008
OPERATING CHARACTERISTICS
TA = 25°C
PARAMETER
TEST CONDITIONS
Outputs enabled
Cpd
Power dissipation
capacitance
Outputs disabled
8
f = 10 MHz
f = 10 MHz
Submit Documentation Feedback
VCC
TYP
0.8 V
3.8
1.2 V ± 0.1 V
3.7
1.5 V ± 0.1 V
3.7
1.8 V ± 0.15 V
3.7
2.5 V ± 0.2 V
3.9
3.3 V ± 0.3 V
4
0.8 V
0
1.2 V ± 0.1 V
0
1.5 V ± 0.1 V
0
1.8 V ± 0.15 V
0
2.5 V ± 0.2 V
0
3.3 V ± 0.3 V
0
UNIT
pF
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74AUP2G126
SN74AUP2G126
LOW-POWER DUAL BUS BUFFER GATE
WITH 3-STATE OUTPUTS
www.ti.com
SCES687B – JANUARY 2007 – REVISED JANUARY 2008
PARAMETER MEASUREMENT INFORMATION
(Propagation Delays, Setup and Hold Times, and Pulse Width)
From Output
Under Test
CL
(see Note A)
1 MW
LOAD CIRCUIT
CL
VM
VI
VCC = 0.8 V
VCC = 1.2 V
± 0.1 V
VCC = 1.5 V
± 0.1 V
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
5, 10, 15, 30 pF
VCC/2
VCC
5, 10, 15, 30 pF
VCC/2
VCC
5, 10, 15, 30 pF
VCC/2
VCC
5, 10, 15, 30 pF
VCC/2
VCC
5, 10, 15, 30 pF
VCC/2
VCC
5, 10, 15, 30 pF
VCC/2
VCC
tw
VCC
Input
VCC/2
VCC/2
VI
VM
Input
0V
VM
VOLTAGE WAVEFORMS
PULSE DURATION
0V
tPHL
tPLH
VOH
VM
Output
VM
VOL
VCC
Timing Input
VCC/2
0V
tPLH
tPHL
tsu
VOH
Output
VM
VCC
VM
VOL
Data Input
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
NOTES: A.
B.
C.
D.
E.
th
VCC/2
VCC/2
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
CL includes probe and jig capacitance.
All input pulses are supplied by generators having the following characteristics: PRR £ 10 MHz, ZO = 50 W, tr/tf = 3 ns.
The outputs are measured one at a time, with one transition per measurement.
tPLH and tPHL are the same as tpd.
All parameters and waveforms are not applicable to all devices.
Figure 3. Load Circuit and Voltage Waveforms
Submit Documentation Feedback
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74AUP2G126
9
SN74AUP2G126
LOW-POWER DUAL BUS BUFFER GATE
WITH 3-STATE OUTPUTS
www.ti.com
SCES687B – JANUARY 2007 – REVISED JANUARY 2008
PARAMETER MEASUREMENT INFORMATION
(Enable and Disable Times)
2 ´ VCC
S1
5 kW
From Output
Under Test
GND
CL
(see Note A)
5 kW
TEST
S1
tPLZ/tPZL
tPHZ/tPZH
2 ´ VCC
GND
LOAD CIRCUIT
CL
VM
VI
VD
VCC = 0.8 V
VCC = 1.2 V
± 0.1 V
VCC = 1.5 V
± 0.1 V
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
5, 10, 15, 30 pF
VCC/2
VCC
0.1 V
5, 10, 15, 30 pF
VCC/2
VCC
0.1 V
5, 10, 15, 30 pF
VCC/2
VCC
0.1 V
5, 10, 15, 30 pF
VCC/2
VCC
0.15 V
5, 10, 15, 30 pF
VCC/2
VCC
0.15 V
5, 10, 15, 30 pF
VCC/2
VCC
0.3 V
VCC
Output
Control
Output
Waveform 1
S1 at 2 ´ VCC
(see Note B)
VCC/2
0V
tPZL
tPLZ
VCC
VCC/2
tPZH
Output
Waveform 2
S1 at GND
(see Note B)
VCC/2
VOL + VD
VOL
tPHZ
VCC/2
VOH
VOH - VD
»0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR £ 10 MHz, ZO = 50 W, tr/tf = 3 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. All parameters and waveforms are not applicable to all devices.
Figure 4. Load Circuit and Voltage Waveforms
10
Submit Documentation Feedback
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74AUP2G126
PACKAGE OPTION ADDENDUM
www.ti.com
22-Jul-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN74AUP2G126YFPR
ACTIVE
DSBGA
YFP
8
3000 Green (RoHS &
no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
SN74AUP2G126YZPR
ACTIVE
DSBGA
YZP
8
3000 Green (RoHS &
no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
22-Jul-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
SN74AUP2G126YFPR
DSBGA
YFP
8
3000
180.0
SN74AUP2G126YZPR
DSBGA
YZP
8
3000
180.0
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
8.4
1.1
2.1
0.56
4.0
8.0
Q1
8.4
1.1
2.1
0.56
4.0
8.0
Q1
Pack Materials-Page 1
W
Pin1
(mm) Quadrant
PACKAGE MATERIALS INFORMATION
www.ti.com
22-Jul-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN74AUP2G126YFPR
DSBGA
YFP
8
3000
220.0
220.0
34.0
SN74AUP2G126YZPR
DSBGA
YZP
8
3000
220.0
220.0
34.0
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not
responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Amplifiers
Data Converters
DSP
Clocks and Timers
Interface
Logic
Power Mgmt
Microcontrollers
RFID
RF/IF and ZigBee® Solutions
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/clocks
interface.ti.com
logic.ti.com
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lprf
Applications
Audio
Automotive
Broadband
Digital Control
Medical
Military
Optical Networking
Security
Telephony
Video & Imaging
Wireless
www.ti.com/audio
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/medical
www.ti.com/military
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
www.ti.com/wireless
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2008, Texas Instruments Incorporated