SCES609B − SEPTEMBER 2004 – REVISED JANUARY 2005
D Available in Texas Instruments NanoStar
D
D
D
D
D
D
D
D
D
D
DCT OR DCU PACKAGE
(TOP VIEW)
and NanoFree Packages
Supports 5-V VCC Operation
Inputs Accept Voltages to 5.5 V
Max tpd of 6.7 ns at 3.3 V
Low Power Consumption, 10-µA Max ICC
±24-mA Output Drive at 3.3 V
Offers Nine Different Logic Functions in a
Single Package
Ioff Supports Partial-Power-Down Mode
Operation
Input Hysteresis Allows for Slow Input
Transition Time and Better Noise Immunity
at Input
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
OE
A
B
GND
1
8
2
7
3
6
4
5
VCC
Y
D
C
YEP OR YZP PACKAGE
(BOTTOM VIEW)
GND
B
A
OE
4 5
3 6
2 7
1 8
C
D
Y
VCC
description/ordering information
The SN74LVC1G99 is operational from 1.65 V to 5.5 V.
The SN74LVC1G99 features configurable multiple functions with a 3-state output. The output is disabled when
the output-enable (OE) input is high. When OE is low, the output state is determined by 16 patterns of 4-bit input.
The user can choose logic functions, such as MUX, AND, OR, NAND, NOR, XOR, XNOR, inverter, and buffer.
All inputs can be connected to VCC or GND.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
PACKAGE†
TA
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
−40 C to 85°C
−40°C
85 C
SSOP − DCT
VSSOP − DCU
TOP-SIDE
MARKING‡
SN74LVC1G99YEPR
Reel of 3000
DE_
SN74LVC1G99YZPR
Reel of 3000
SN74LVC1G99DCTR
Reel of 250
SN74LVC1G99DCTT
Reel of 3000
SN74LVC1G99DCUR
Reel of 250
SN74LVC1G99DCUT
C99_ _ _
C99_
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
‡ DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
Copyright 2005, Texas Instruments Incorporated
!"# $ %&'# "$ (&)*%"# +"#',
+&%#$ %! # $('%%"#$ (' #-' #'!$ '."$ $#&!'#$
$#"+"+ /""#0, +&%# (%'$$1 +'$ # '%'$$"*0 %*&+'
#'$#1 "** (""!'#'$,
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SCES609B − SEPTEMBER 2004 – REVISED JANUARY 2005
description/ordering information (continued)
This device functions as an independent inverter, but because of Schmitt action, it has different input threshold
levels for positive-going (VT+) and negative-going (VT−) signals.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
FUNCTION TABLE
INPUTS
2
OE
D
C
B
A
OUTPUT
Y
L
L
L
L
L
L
L
L
L
L
H
H
L
L
L
H
L
L
L
L
L
H
H
H
L
L
H
L
L
L
L
L
H
L
H
L
L
L
H
H
L
H
L
L
H
H
H
H
L
H
L
L
L
H
L
H
L
L
H
L
L
H
L
H
L
H
L
H
L
H
H
L
L
H
H
L
L
H
L
H
H
L
H
H
L
H
H
H
L
L
L
H
H
H
H
L
H
H or L
H or L
H or L
H or L
Z
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCES609B − SEPTEMBER 2004 – REVISED JANUARY 2005
logic diagram (positive logic)
OE
A
B
C
D
1
2
3
7
5
Y
6
FUNCTION SELECTION TABLE
PRIMARY FUNCTION
COMPLEMENTARY FUNCTION
PAGE
3-state buffer
3
3-state inverter
3
3-state 2-in-1 data selector MUX
4
3-state 2-in-1 data selector MUX, inverted out
4
3-state 2-input AND
3-state 2-input NOR, both inputs inverted
5
3-state 2-input AND, one input inverted
3-state 2-input NOR, one input inverted
5
3-state 2-input AND, both inputs inverted
3-state 2-input NOR
5
3-state 2-input NAND
3-state 2-input OR, both inputs inverted
6
3-state 2-input NAND, one input inverted
3-state 2-input OR, one input inverted
6
3-state 2-input NAND, both inputs inverted
3-state 2-input OR
6
3-state 2-input XOR
7
3-state 2-input XNOR
3-state 2-input XOR, one input inverted
7
3-STATE BUFFER FUNCTIONS AVAILABLE
OE
Input
FUNCTION
3-state buffer
Y
OE
L
POST OFFICE BOX 655303
A
B
C
D
Input
H or L
L
L
H or L
Input
H
L
L
H
Input
L
H
L
Input
H
H
H or L
L
Input
H or L
L
H
Input
L
L
H or L
Input
• DALLAS, TEXAS 75265
3
SCES609B − SEPTEMBER 2004 – REVISED JANUARY 2005
3-STATE INVERTER FUNCTIONS AVAILABLE
OE
Input
FUNCTION
Y
OE
3-state inverter
L
A
B
C
D
Input
H or L
L
H
X
Input
H
H
L
H
Input
H
H
L
Input
L
H
H or L
L
Input
H or L
H
H
Input
H
H
H or L
Input
3-STATE MUX FUNCTIONS AVAILABLE
OE
OE
A/B
A/B
Input 1
Input 1
Y
Input 2
FUNCTION
A
B
C
D
3-state 2-to-1
Input 1
Input 2
Input 1 or Input 2
L
3-state 2-to-1
Input 2
Input 1
Input 2 or Input 1
L
Input 1
Input 2
Input 1 or Input 2
H
Input 2
Input 1
Input 2 or Input 1
H
3-state 2-to-1
3-state 2-to-1
4
Y
Input 2
OE
L
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCES609B − SEPTEMBER 2004 – REVISED JANUARY 2005
3-STATE AND/NOR FUNCTIONS AVAILABLE
OE
OE
Input 1
Input 1
Y
NO. OF INPUTS
AND/NAND FUNCTION
OR/NOR FUNCTION
2
3-state AND
3-state NOR
2
3-state AND
OE
L
3-state NOR
OE
A
B
C
D
L
Input 1
Input 2
L
L
Input 2
Input 1
L
OE
Input 1
Input 1
Y
Y
Input 2
Input 2
NO. OF INPUTS
AND/NAND FUNCTION
OR/NOR FUNCTION
2
3-state AND
3-state NOR
2
Y
Input 2
Input 2
3-state AND
OE
L
3-state NOR
OE
A
B
C
D
Input 2
L
Input 1
L
H
Input 1
Input 2
H
B
C
D
Input 1
L
Input 2
L
H
Input 2
Input 1
H
OE
Input 1
Input 1
Y
Input 2
Y
Input 2
NO. OF INPUTS
AND/NAND FUNCTION
OR/NOR FUNCTION
2
3-state AND
3-state NOR
2
3-state AND
3-state NOR
OE
OE
L
A
OE
Input 1
Input 1
Y
Input 2
Y
Input 2
NO. OF INPUTS
AND/NAND FUNCTION
OR/NOR FUNCTION
2
3-state AND
3-state NOR
2
3-state AND
3-state NOR
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
OE
L
A
B
C
D
Input 1
H
Input 2
L
Input 2
H
Input 1
L
5
SCES609B − SEPTEMBER 2004 – REVISED JANUARY 2005
3-STATE NAND/OR FUNCTIONS AVAILABLE
OE
OE
Input 1
Input 1
Y
Input 2
NO. OF INPUTS
AND/NAND FUNCTION
OR/NOR FUNCTION
2
3-state NAND
3-state OR
2
3-state NAND
3-state OR
OE
L
OE
B
C
D
L
Input 1
Input 2
H
L
Input 2
Input 1
H
Input 1
Y
Input 2
Y
Input 2
NO. OF INPUTS
AND/NAND FUNCTION
OR/NOR FUNCTION
2
3-state NAND
3-state OR
2
3-state NAND
3-state OR
OE
L
OE
A
B
C
D
Input 2
L
Input 1
H
H
Input 1
Input 2
L
OE
Input 1
Y
Input 2
Input 1
Y
Input 2
NO. OF INPUTS
AND/NAND FUNCTION
OR/NOR FUNCTION
2
3-state NAND
3-state OR
3-state NAND
OE
L
3-state OR
OE
A
B
C
D
Input 1
L
Input 2
H
H
Input 2
Input 1
L
OE
Input 1
Y
Input 2
Input 1
Y
Input 2
NO. OF INPUTS
AND/NAND FUNCTION
OR/NOR FUNCTION
2
3-state NAND
3-state OR
2
3-state NAND
3-state OR
6
A
OE
Input 1
2
Y
Input 2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
OE
L
A
B
C
D
Input 1
H
Input 2
L
Input 2
H
Input 1
L
SCES609B − SEPTEMBER 2004 – REVISED JANUARY 2005
3-STATE XOR/XNOR FUNCTIONS AVAILABLE
OE
Input 1
Y
Input 2
FUNCTION
3-state XOR
OE
L
A
B
C
D
Input 1
H or L
L
Input 2
Input 2
H or L
L
Input 1
H or L
Input 1
H
Input 2
H or L
Input 2
H
Input 1
L
H
Input 1
Input 2
L
H
Input 2
Input 1
OE
Input 1
Y
Input 2
FUNCTION
3-state XOR
OE
A
B
C
D
L
H
L
Input 1
Input 2
OE
Input 1
Y
Input 2
FUNCTION
3-state XOR
OE
A
B
C
D
L
H
L
Input 1
Input 2
OE
Input 1
Y
Input 2
FUNCTION
3-state XNOR
3-state XNOR
OE
L
A
B
C
D
H
L
Input 1
Input 2
H
L
Input 2
Input 1
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
SCES609B − SEPTEMBER 2004 – REVISED JANUARY 2005
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
Voltage range applied to any output in the high-impedance or power-off state, VO
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
Voltage range applied to any output in the high or low state, VO
(see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
Package thermal impedance, θJA (see Note 3): DCT package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C/W
DCU package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227°C/W
YEP/YZP package . . . . . . . . . . . . . . . . . . . . . . . . . . . 102°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
2. The value of VCC is provided in the recommended operating conditions table.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 4)
Operating
VCC
Supply voltage
VI
VO
Input voltage
Data retention only
Output voltage
VCC = 1.65 V
VCC = 2.3 V
IOH
VCC = 3 V
VCC = 2.3 V
∆t/∆v
MAX
1.65
5.5
0
5.5
V
0
VCC
−4
V
−8
VCC = 3 V
Input transition rise or fall rate
mA
−24
−32
4
8
16
Low-level output current
UNIT
V
1.5
−16
High-level output current
VCC = 4.5 V
VCC = 1.65 V
IOL
MIN
mA
24
VCC = 4.5 V
VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V
32
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V
10
20
ns/V
5
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCES609B − SEPTEMBER 2004 – REVISED JANUARY 2005
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VT+
Positive-going
input threshold
voltage
VT−
Negative-going
input threshold
voltage
∆VT
Hysteresis
(VT+ − VT−)
MIN
1.65 V
0.79
1.26
2.3 V
1.11
1.66
3V
1.5
1.97
2.16
2.84
5.5 V
2.61
3.43
1.65 V
0.39
0.72
2.3 V
0.58
0.97
3V
0.84
1.24
4.5 V
1.41
1.89
5.5 V
1.87
2.39
1.65 V
0.37
0.72
2.3 V
0.48
0.87
3V
0.56
0.97
4.5 V
0.71
1.14
0.71
1.21
VOH
1.65 V to 5.5 V
1.65 V
IOH = −8 mA
IOH = −16 mA
2.3 V
4.5 V
IOH = −32 mA
IOL = 100 mA
IOL = 4 mA
IOL = 8 mA
IOL = 16 mA
Ioff
IOZ
ICC
∆ICC
Ci
Co
† TA = 25°C
3.8
1.65 V
0.45
2.3 V
0.3
3V
V
0.55
4.5 V
0.55
±5
mA
±10
mA
±10
mA
1.65 V to 5.5 V
10
mA
3 V to 5.5 V
500
mA
0 to 5.5 V
VO = VCC or GND
VI = 5.5 V or GND,
1.65 V to 5.5 V
0
IO = 0
Other inputs at VCC or GND
V
2.3
0.1
VI = 5.5 V or GND
VI or VO = 5.5 V
One input at VCC − 0.6 V,
V
V
0.4
IOL = 32 mA
II
V
1.9
1.65 V to 5.5 V
IOL = 24 mA
UNIT
VCC − 0.1
1.2
2.4
3V
IOH = −24 mA
VOL
MAX
4.5 V
5.5 V
IOH = −100 mA
IOH = −4 mA
TYP†
VCC
VI = VCC or GND
3.3 V
3.5
pF
VO = VCC or GND
3.3 V
6
pF
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
9
SCES609B − SEPTEMBER 2004 – REVISED JANUARY 2005
switching characteristics over recommended operating free-air temperature range, CL = 15 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 1.8 V
± 0.15 V
VCC = 5 V
± 0.5 V
UNIT
MAX
MIN
MAX
MIN
MAX
MIN
MAX
4.5
30.1
2.5
11.3
1.8
7.5
1.3
4.8
4.4
28.3
2.4
10.8
1.8
7.2
1.3
4.7
4.4
29.1
2.4
11.7
1.9
7.6
1.3
5
4.3
25.1
2.4
10.2
1.7
6.7
1.3
4.5
B
C
VCC = 3.3 V
± 0.3 V
MIN
A
tpd
VCC = 2.5 V
± 0.2 V
Y
D
ns
ten
OE
Y
3.4
24.7
2.1
10
1.3
5.8
1
3.8
ns
tdis
OE
Y
4
15.5
2.7
7.5
3.5
7
2
5.5
ns
switching characteristics over recommended operating free-air temperature range, CL = 30 pF or
50 pF (unless otherwise noted) (see Figure 2)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 5 V
± 0.5 V
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
A
4.6
30.8
2.6
11.7
2.4
8.4
1.8
5.5
B
4.6
28.9
2.6
11.3
2.3
8.2
1.8
5.4
4.4
29.8
2.5
12.3
2.5
8.6
1.8
5.7
4.3
25.7
2.5
10.7
2.4
7.6
1.6
5.2
C
Y
D
UNIT
ns
ten
OE
Y
4.2
25.2
2.4
11.3
2
7
1.7
4.7
ns
tdis
OE
Y
3.7
15
2
5.8
2.1
5.6
1
4.5
ns
operating characteristics, TA = 25°C
PARAMETER
Cpd
10
Power dissipation capacitance
TEST
CONDITIONS
f = 10 MHz
POST OFFICE BOX 655303
VCC = 1.8 V
TYP
VCC = 2.5 V
TYP
19
• DALLAS, TEXAS 75265
20
VCC = 3.3 V
TYP
22
VCC = 5 V
TYP
27
UNIT
pF
SCES609B − SEPTEMBER 2004 – REVISED JANUARY 2005
PARAMETER MEASUREMENT INFORMATION
RL
From Output
Under Test
CL
(see Note A)
VLOAD
Open
S1
GND
RL
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
VLOAD
GND
LOAD CIRCUIT
INPUTS
VCC
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
5 V ± 0.5 V
VI
tr/tf
VCC
VCC
3V
VCC
≤2 ns
≤2 ns
≤2.5 ns
≤2.5 ns
VM
VLOAD
CL
RL
V∆
VCC/2
VCC/2
1.5 V
VCC/2
2 × VCC
2 × VCC
6V
2 × VCC
15 pF
15 pF
15 pF
15 pF
1 MΩ
1 MΩ
1 MΩ
1 MΩ
0.15 V
0.15 V
0.3 V
0.3 V
VI
Timing Input
VM
0V
tw
tsu
VI
Input
VM
VM
th
VI
Data Input
VM
VM
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VI
VM
Input
VM
0V
tPLH
tPHL
VOH
VM
Output
VM
VOL
tPHL
Output
Waveform 1
S1 at VLOAD
(see Note B)
tPLH
VM
VM
VM
0V
tPZL
tPLZ
VLOAD/2
VM
tPZH
VOH
Output
VI
Output
Control
VM
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Waveform 2
S1 at GND
(see Note B)
VOL + V∆
VOL
tPHZ
VM
VOH − V∆
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
11
SCES609B − SEPTEMBER 2004 – REVISED JANUARY 2005
PARAMETER MEASUREMENT INFORMATION
RL
From Output
Under Test
CL
(see Note A)
VLOAD
Open
S1
GND
RL
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
VLOAD
GND
LOAD CIRCUIT
INPUTS
VCC
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
5 V ± 0.5 V
VI
tr/tf
VCC
VCC
3V
VCC
≤2 ns
≤2 ns
≤2.5 ns
≤2.5 ns
VM
VLOAD
CL
RL
V∆
VCC/2
VCC/2
1.5 V
VCC/2
2 × VCC
2 × VCC
6V
2 × VCC
30 pF
30 pF
50 pF
50 pF
1 kΩ
500 Ω
500 Ω
500 Ω
0.15 V
0.15 V
0.3 V
0.3 V
VI
Timing Input
VM
0V
tw
tsu
VI
Input
VM
VM
th
VI
Data Input
VM
VM
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VI
VM
Input
VM
0V
tPLH
tPHL
VOH
VM
Output
VM
VOL
tPHL
Output
Waveform 1
S1 at VLOAD
(see Note B)
tPLH
VM
VM
VM
0V
tPZL
tPLZ
VLOAD/2
VM
tPZH
VOH
Output
VI
Output
Control
VM
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Waveform 2
S1 at GND
(see Note B)
VOL + V∆
VOL
tPHZ
VM
VOH − V∆
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 2. Load Circuit and Voltage Waveforms
12
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
17-Mar-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN74LVC1G99DCTR
ACTIVE
SM8
DCT
8
3000
Pb-Free
(RoHS)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G99DCTT
ACTIVE
SM8
DCT
8
250
Pb-Free
(RoHS)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G99DCTTE4
ACTIVE
SM8
DCT
8
250
Pb-Free
(RoHS)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G99DCUR
ACTIVE
US8
DCU
8
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G99DCURE4
ACTIVE
US8
DCU
8
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G99DCUT
ACTIVE
US8
DCU
8
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G99DCUTE4
ACTIVE
US8
DCU
8
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC1G99YEPR
NRND
WCSP
YEP
8
3000
TBD
SNPB
Level-1-260C-UNLIM
SN74LVC1G99YZPR
ACTIVE
WCSP
YZP
8
3000
Pb-Free
(RoHS)
SNAGCU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MPDS049B – MAY 1999 – REVISED OCTOBER 2002
DCT (R-PDSO-G8)
PLASTIC SMALL-OUTLINE PACKAGE
0,30
0,15
0,65
8
0,13 M
5
0,15 NOM
ÇÇÇÇÇ
ÇÇÇÇÇ
ÇÇÇÇÇ
ÇÇÇÇÇ
2,90
2,70
4,25
3,75
Gage Plane
PIN 1
INDEX AREA
1
0,25
4
0° – 8°
3,15
2,75
0,60
0,20
1,30 MAX
Seating Plane
0,10
0,10
0,00
NOTES: A.
B.
C.
D.
4188781/C 09/02
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion
Falls within JEDEC MO-187 variation DA.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding third-party products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Applications
Amplifiers
amplifier.ti.com
Audio
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
www.ti.com/broadband
Interface
interface.ti.com
Digital Control
www.ti.com/digitalcontrol
Logic
logic.ti.com
Military
www.ti.com/military
Power Mgmt
power.ti.com
Optical Networking
www.ti.com/opticalnetwork
Microcontrollers
microcontroller.ti.com
Security
www.ti.com/security
Mailing Address:
Telephony
www.ti.com/telephony
Video & Imaging
www.ti.com/video
Wireless
www.ti.com/wireless
Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright 2006, Texas Instruments Incorporated