SN75ALS162 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER SLLS020C – JUNE 1986 – REVISED MAY 1995 D D D D D D D D D D D D Meets IEEE Standard 488-1978 (GPIB) 8-Channel Bidirectional Transceiver Designed to Implement Control Bus Interface Designed for Multicontrollers High-Speed Advanced Low-Power Schottky Circuitry Low-Power Dissipation . . . 46 mW Max per Channel Fast Propagation Times . . . 20 ns Max High-Impedance PNP Inputs Receiver Hysteresis . . . 650 mV Typ Bus-Terminating Resistors Provided on Driver Outputs No Loading of Bus When Device Is Powered Down (VCC = 0) Power-Up/Power-Down Protection (Glitch Free) DW PACKAGE (TOP VIEW) GPIB I/O Ports The SN75ALS162 features eight driver-receiver pairs connected in a front-to-back configuration to form input/output (I/O) ports at both the bus and terminal sides. The direction of data through these driver-receiver pairs is determined by the DC, TE, and SC enable signals. The SC input allows the REN and IFC transceivers to be controlled independently. 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 VCC NC REN IFC NDAC NRFD DAV EOI ATN SRQ NC DC Terminal I/O Ports N PACKAGE (TOP VIEW) description The SN75ALS162 eight-channel general-purpose interface bus (GPIB) transceiver is a monolithic, high-speed, advanced low-power Schottky process device designed to provide the bus-management and data-transfer signals between operating units of a multiple-controller instrumentation system. When combined with the SN75ALS160 octal bus transceiver, the SN75ALS162 provides the complete 16-wire interface for the IEEE 488 bus. SC TE REN IFC NDAC NRFD DAV EOI ATN SRQ NC GND GPIB I/O Ports SC TE REN IFC NDAC NRFD DAV EOI ATN SRQ GND 1 22 2 21 3 20 4 19 5 18 6 17 7 16 8 15 9 14 10 13 11 12 VCC NC REN IFC NDAC NRFD DAV EOI ATN SRQ DC Terminal I/O Ports NC – No internal connection The driver outputs (GPIB I/O ports) feature active bus-terminating resistor circuits designed to provide a high impedance to the bus when VCC = 0. The drivers are designed to handle loads up to 48 mA of sink current. Each receiver features pnp transistor inputs for high input impedance and hysteresis of 400 mV minimum for increased noise immunity. All receivers have 3-state outputs to present a high impedance to the terminal when disabled. The SN75ALS162 is characterized for operation from 0°C to 70°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN75ALS162 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER SLLS020C – JUNE 1986 – REVISED MAY 1995 RECEIVE/TRANSMIT FUNCTION TABLE BUS-MANAGEMENT CHANNELS CONTROLS SC DC TE ATN† ATN† SRQ (controlled by DC) H H H H H L L L H L L L H L L H R T T R X R T X T R REN IFC DATA-TRANSFER CHANNELS EOI DAV (controlled by SC) T R R R T T R R T T T T R R R T T T L R R NRFD T R H NDAC (controlled by TE) H = high level, L = low level, R = receive, T = transmit, X = irrelevant Direction of data transmission is from the terminal side to the bus side, and the direction of data receiving is from the bus side to the terminal side. Data transfer is noninverting in both directions. † ATN is a normal transceiver channel that functions additionally as an internal direction control or talk enable for EOI whenever the DC and TE inputs are in the same state. When DC and TE are in opposite states, the ATN channel functions as an independent transceiver only. CHANNEL IDENTIFICATION TABLE NAME 2 IDENTITY DC Direction Control TE Talk Enable SC System Control ATN Attention SRQ Service Request REN Remote Enable IFC Interface Clear EOI End or Identify DAV Data Valid NDAC No Data Accepted NRFD Not Ready for Data POST OFFICE BOX 655303 CLASS Control Bus Management Data Transfer • DALLAS, TEXAS 75265 SN75ALS162 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER SLLS020C – JUNE 1986 – REVISED MAY 1995 logic symbol† DC TE SC ATN 12 2 1 14 logic diagram (positive logic) DC EN1/G4 EN2/G5 EN3 ≥1 5 4 TE SC EN6 9 1 EOI SRQ REN IFC DAV NDAC NRFD 15 13 20 19 1 1 6 6 1 1 1 1 3 1 8 10 3 3 4 3 16 18 17 3 1 2 2 1 6 2 2 5 2 1 14 9 15 8 13 10 20 3 19 4 16 7 18 5 17 6 ATN ATN EOI EOI SRQ SRQ EOI SRQ REN IFC REN DAV IFC 1 2 2 7 ATN 12 REN IFC NDAC NRFD DAV DAV 1 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Designates 3-state outputs Designates passive-pullup outputs Pin numbers shown are for the N package. POST OFFICE BOX 655303 NDAC NRFD • DALLAS, TEXAS 75265 NDAC NRFD 3 SN75ALS162 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER SLLS020C – JUNE 1986 – REVISED MAY 1995 schematics of inputs and outputs EQUIVALENT OF ALL CONTROL INPUTS TYPICAL OF SRQ, NDAC, AND NRFD GPIB I/O PORT VCC 1.7 kΩ NOM 9 kΩ NOM 10 kΩ NOM VCC Input 4 kΩ NOM GND GND Input/Output Port Circuit inside dashed lines is on the driver outputs only. TYPICAL OF ALL I/O PORTS EXCEPT SRQ, NDAC, NRFD GPIB I/O PORTS R(eq) 4 kΩ NOM 1.7 kΩ NOM 10 kΩ NOM VCC 4 kΩ NOM GND Input/Output Port Driver output R(eq) = 30 Ω NOM Receiver output R(eq) = 110 Ω NOM Circuit inside dashed lines is on the driver outputs only. R(eq) = equivalent resistor absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Low-level driver output current, IOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from the case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values are with respect to network ground terminal. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN75ALS162 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER SLLS020C – JUNE 1986 – REVISED MAY 1995 DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR DW 1350 mW 10.8 mW/°C 864 mW N 1700 mW 13.6 mW/°C 1088 mW TA = 70°C POWER RATING recommended operating conditions Supply voltage, VCC High-level input voltage, VIH MIN NOM MAX UNIT 4.75 5 5.25 V 2 V Low level input voltage, VIL 0.8 High level output current, High-level current IOH Low level output current, current IOL Low-level V Bus ports with 3-state outputs – 5.2 mA Terminal ports – 800 µA Bus ports 48 Terminal ports 16 Operating free-air temperature, TA 0 70 mA °C electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER VIK Input clamp voltage Vhys Hysteresis voltage (VIT+ – VIT–) VOH‡ High level output voltage High-level VOL Low level output voltage Low-level II Input current at maximum input voltage IIH IIL VI/O(b I/O(bus)) High-level input current Low-level input current TEST CONDITIONS II = – 18 mA Bus Terminal Bus Terminal IOH = – 800 µA IOH = – 5.2 mA Bus IOL = 16 mA IOL = 48 mA Terminal Terminal and control inputs Voltage at bus port Current into bus port IOS Short-circuit output current UNIT – 0.8 – 1.5 V 0.4 0.65 2.7 3.5 2.5 3.3 V V 0.5 0.5 VI = 5.5 V 0.2 100 µA VI = 2.7 V VI = 0.5 V 0.1 20 µA –10 – 100 µA 3.0 3.7 II(bus) = 0 II(bus) = – 12 mA Driver disabled VCC = 0, 2.5 – 1.5 0 + 2.5 – 3.2 0 2.5 VI(bus) = 0 to 2.5 V – 40 –15 – 35 – 75 – 25 – 50 – 125 75 No load, TE, DC, and SC low 55 VCC = 0 to 5 V, VI/O = 0 to 2 V, f = 1 MHz 30 • DALLAS, TEXAS 75265 mA 2.5 0.7 Terminal POST OFFICE BOX 655303 V – 3.2 Bus ICC Supply current CI/O(bus) Bus-port capacitance † All typical values are at VCC = 5 V, TA = 25°C. ‡ VOH applies to 3-state outputs only. V – 1.3 VI(bus) = 2.5 V to 3.7 V VI(bus) = 3.7 V to 5 V VI(bus) = 5 V to 5.5 V Power off MAX 0.3 Driver disabled Power on TYP† 0.35 VI(bus) = – 1.5 V to 0.4 V VI(bus) = 0.4 V to 2.5 V II/O(bus) MIN µA mA mA pF 5 SN75ALS162 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER SLLS020C – JUNE 1986 – REVISED MAY 1995 switching characteristics over recommended range of operating free-air temperature, VCC = 5 V PARAMETER tPLH Propagation delay time, low- to high-level output tPHL Propagation delay time, high- to low-level output tPLH Propagation delay time, low- to high-level output tPHL FROM (INPUT) TO (OUTPUT) TEST CONDITIONS Terminal Bus CL = 30 pF, See Figure 1 Bus Propagation delay time, high- to low-level output tPZH tPHZ Output enable time to high level tPZL tPLZ Output enable time to low level tPZH tPHZ Output enable time to high level Output disable time from high level CL = 30 pF,, See Figure 2 Terminal Output disable time from low level TYP† MAX 10 20 12 20 5 10 7 14 UNIT ns ns 30 Bus (ATN, ( , EOI,, REN, IFC, and d DAV) TE DC, DC or SC TE, MIN CL = 15 pF,, See Figure 3 20 45 ns 20 30 Output disable time from high level tPZL Output enable time to low level tPLZ Output disable time from low level † All typical values are at TA = 25°C. TE DC, TE, DC or SC CL = 15 pF, See Figure 4 Terminal 25 30 ns 25 PARAMETER MEASUREMENT INFORMATION 5V 200 Ω From (bus) Output Under Test Test Point CL =30 pF (see Note A) 480 Ω LOAD CIRCUIT 3V Terminal Input 1.5 V 1.5 V See Note B tPLH Bus Output 0V tPHL VOH 2.2 V 1.0 V VOL VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. Figure 1. Terminal-to-Bus Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN75ALS162 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER SLLS020C – JUNE 1986 – REVISED MAY 1995 PARAMETER MEASUREMENT INFORMATION 4.3 V 240 Ω From (terminal) Output Under Test Test Point CL =30 pF (see Note A) 3 kΩ LOAD CIRCUIT 3V Bus Input 1.5 V 1.5 V See Note B tPLH Terminal Output 0V tPHL VOH 1.5 V 1.5 V VOL VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. Figure 2. Bus-to-Terminal Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SN75ALS162 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER SLLS020C – JUNE 1986 – REVISED MAY 1995 PARAMETER MEASUREMENT INFORMATION S1 5V 200 Ω From (bus) Output Under Test Test Point CL = 15 pF (see Note A) 480 Ω LOAD CIRCUIT 3V Control Input 1.5 V See Note B 1.5 V 0V tPZH Bus Output S1 Open tPHZ 90% VOH 2V 0V tPZL Bus Output S1 Closed tPLZ 1V ≈ 3.5 V 0.5 V VOL VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. Figure 3. Bus Load Circuit and Voltage Waveforms 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN75ALS162 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER SLLS020C – JUNE 1986 – REVISED MAY 1995 PARAMETER MEASUREMENT INFORMATION S1 4.3 V 240 Ω From (terminal) Output Under Test Test Point CL = 15 pF (see Note A) 3 kΩ LOAD CIRCUIT 3V Control Input 1.5 V See Note B 1.5 V 0V tPZH Terminal Output S1 Open tPHZ 90% VOH 2V 0V tPZL Terminal Output S1 Closed tPLZ 1V ≈4V 0.7 V VOL VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. Figure 4. Terminal Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 SN75ALS162 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER SLLS020C – JUNE 1986 – REVISED MAY 1995 TYPICAL CHARACTERISTICS TERMINAL TERMINAL HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 0.6 VCC = 5 V TA = 25°C 3.5 VOL – Low-Level Output Voltage – V VOH – High-Level Output Voltage – V 4 3 2.5 2 1.5 1 0.5 0 VCC = 5 V TA = 25°C 0.5 0.4 0.3 0.2 0.1 0 0 – 5 – 10 – 15 – 20 – 25 – 30 – 35 – 40 IOH – High-Level Output Current – mA 0 10 20 30 40 50 IOL – Low-Level Output Current – mA Figure 6 Figure 5 TERMINAL OUTPUT VOLTAGE vs BUS INPUT VOLTAGE 4 VCC = 5 V No Load TA = 25°C VO – Terminal Output Voltage 3.5 3 2.5 2 VIT – VIT + 1.5 1 0.5 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 VI – Bus Input Voltage – V Figure 7 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1.8 2 60 SN75ALS162 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER SLLS020C – JUNE 1986 – REVISED MAY 1995 TYPICAL CHARACTERISTICS BUS BUS HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 0.6 4 VOL– Low-Level Output Voltage – V VOH – High-Level Output Voltage – V VCC = 5 V TA = 25°C 3 2 1 VCC = 5 V TA = 25°C 0.5 0.4 0.3 0.2 0.1 0 0 0 –10 – 20 – 30 – 50 – 40 0 – 60 IOH – High-Level Output Current – mA 10 20 30 40 50 60 70 80 90 100 IOL – Low-Level Output Current – mA Figure 8 Figure 9 BUS CURRENT vs VOLTAGE BUS OUTPUT VOLTAGE vs TERMINAL INPUT VOLTAGE VCC = 5 V No Load TA = 25°C VCC = 5 V TA = 25°C 2 1 3 I I/O(bus) – Current – mA VO – Bus Output Voltage – V 4 2 1 0 –1 –2 –3 –4 –5 The Unshaded Area Conforms to Paragraph 3.5.3 of IEEE Standard 488-1978 –6 0 0.9 –7 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 –2 –1 0 1 2 3 4 5 6 VI/O(bus) – Voltage – V VI – Terminal Input Voltage – V Figure 11 Figure 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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