TI SN65ALS1176

SN65ALS1176
DIFFERENTIAL BUS TRANSCEIVER
SLLS295A – APRIL 1998 – REVISED DECEMBER 1999
D
D
D
D
D
D
D
D
D
D
D
D
D
Meets or Exceeds the Requirements of
TIA/EIA-422-B, TIA/EIA-485-A, and ITU
Recommendations V.11 and X.27
Recommended for PROFIBUS Applications
Operates at Data Rates up to 35 MBaud
Operating Temperature Range
. . . – 25°C to 85°C
Designed for Multipoint Transmission on
Long Bus Lines in Noisy Environments
Low Supply-Current Requirement
. . . 30 mA Max
Wide Positive and Negative Input/Output
Bus-Voltage Ranges
Thermal-Shutdown Protection
Driver Positive- and Negative-Current
Limiting
Receiver Input Hysteresis
Glitch-Free Power-Up and Power-Down
Protection
Receiver Open-Circuit Fail-Safe Design
Package Options Include Plastic
Small-Outline (D) Package and (P) DIPs
D† OR P PACKAGE
(TOP VIEW)
R
RE
DE
D
1
8
2
7
3
6
4
5
VCC
B
A
GND
† The D package is available taped and
reeled. Add the suffix R to the device
type (e.g., SN65ALS1176DR).
description
The SN65ALS1176 differential bus transceiver is designed for bidirectional data communication on multipoint
bus transmission lines. It is designed for balanced transmission lines and meets TIA/EIA-422-B, TIA/EIA-485-A,
and ITU Recommendations V.11 and X.27.
The SN65ALS1176 combines a 3-state differential line driver and a differential input line receiver, both of which
operate from a single 5-V power supply. The driver and receiver have active-high and active-low enables,
respectively, that can be connected together externally to function as a direction control. The driver differential
outputs and the receiver differential inputs are connected internally to form a differential input/output (I/O) bus
port that is designed to offer minimum loading to the bus when the driver is disabled or VCC = 0. This port features
wide positive and negative common-mode voltage ranges, making the device suitable for party-line
applications.
The SN65ALS1176 is characterized for operation from – 25°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN65ALS1176
DIFFERENTIAL BUS TRANSCEIVER
SLLS295A – APRIL 1998 – REVISED DECEMBER 1999
Function Tables
DRIVERS
OUTPUTS
INPUT
D
ENABLE
DE
H
H
H
L
L
H
L
H
X
L
Z
Z
A
B
RECEIVER
DIFFERENTIAL INPUTS
A–B
ENABLE
RE
OUTPUT
R
VID ≥ 0.2 V
– 0.2 V < VID < 0.2 V
L
H
L
?
VID ≤ – 0.2 V
X
L
L
H
Z
Inputs open
L
H
H = high level, L = low level, X = irrelevant,
? = Indeterminate, Z = high impedance (off)
logic symbol†
DE
RE
D
R
3
2
logic diagram (positive logic)
EN1
DE
EN2
6
4
1
A
D
4
7
1
1
3
B
RE
2
R
2
6
1
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
A
Bus
B
SN65ALS1176
DIFFERENTIAL BUS TRANSCEIVER
SLLS295A – APRIL 1998 – REVISED DECEMBER 1999
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT
VCC
TYPICAL OF A AND B I/O PORTS
TYPICAL OF RECEIVER OUTPUT
VCC
85 Ω
NOM
180 kΩ
NOM
R(eq)
VCC
Connected
on A Port
Input
A or B
18 kΩ
NOM
180 kΩ
NOM
Connected
on B Port
Driver Input: R(eq) = 3 kΩ NOM
Enable Inputs: R(eq) = 8 kΩ NOM
R(eq) = equivalent resistor
3 kΩ
NOM
Output
1.1 kΩ
NOM
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Voltage range at any bus terminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 7 V to 12 V
Enable input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential I/O bus voltage, are with respect to network ground terminal.
2. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions
Supply voltage, VCC
MIN
NOM
MAX
UNIT
4.75
5
5.25
V
12
Input voltage at any bus terminal (separately or common mode),
mode) VI or VIC
–7
High-level input voltage, VIH
D, DE, and RE
Low-level input voltage, VIL
D, DE, and RE
2
Driver
High level output current,
current IOH
High-level
V
0.8
Differential input voltage, VID (see Note 3)
Receiver
± 12
V
mA
– 400
µA
60
Receiver
Operating free-air temperature, TA
V
– 60
Driver
Low level output current
Low-level
current, IOL
V
8
– 25
85
mA
°C
NOTE 3: Differential input/output bus voltage is measured at the noninverting terminal A with respect to the inverting terminal B.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SN65ALS1176
DIFFERENTIAL BUS TRANSCEIVER
SLLS295A – APRIL 1998 – REVISED DECEMBER 1999
DRIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature range (unless otherwise noted)
TEST CONDITIONS†
PARAMETER
VIK
VO
Input clamp voltage
Output voltage
II = – 18 mA
IO = 0
|VOD1|
Differential output voltage
IO = 0
|VOD2|
Differential output voltage
VOD3
Differential output voltage
∆ |VOD|
Change in magnitude of differential
output voltage ¶
VOC
Common mode output voltage
Common-mode
∆ |VOC|
Change in magnitude of common-mode
output voltage¶
IO
Output current
IIH
IIL
High-level input current
IOS
ICC
Low-level input current
Short circuit output current#
Short-circuit
Supply current
MIN
TYP‡
MAX
UNIT
– 1.5
V
0
6
V
1.5
6
V
RL = 100 Ω,
See Figure 1
1/2 VOD 1 or 2§
RL = 54 Ω,
See Figure 1
2.1
Vtest = – 7 V to 12 V,
See Figure 2
1.5
RL = 54 Ω or 100 Ω,
Ω
Outputs disabled,,
See Note 4
V
2.5
See Figure 1
VO = 12 V
VO = – 7 V
5
V
5
V
± 0.2
V
3
–1
V
± 0.2
V
1
– 0.8
VI = 2.4 V
VI = 0.4 V
20
µA
– 400
µA
VO = – 4 V
VO = 0
– 250
VO = VCC
VO = 8 V
250
No load
mA
– 150
mA
250
Outputs enabled
23
30
Outputs disabled
19
26
mA
† The power-off measurement in TIA/EIA-422-B applies to disabled outputs only and is not applied to combined inputs and outputs.
‡ All typical values are at VCC = 5 V and TA = 25°C.
§ The minimum VOD2 with a 100-Ω load is either 1/2 VOD1 or 2 V, whichever is greater.
¶ ∆ |VOD| and ∆ |VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from one logic state to
the other.
# Duration of the short circuit should not exceed one second for this test.
NOTE 4: This applies for both power on and power off; refer to TIA/EIA-485-A for exact conditions. The TIA/EIA-422-B limit does not apply for
a combined driver and receiver terminal.
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN65ALS1176
DIFFERENTIAL BUS TRANSCEIVER
SLLS295A – APRIL 1998 – REVISED DECEMBER 1999
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature range
PARAMETER
td(OD)
tsk(p)
Differential output delay time
Pulse skew‡
tt(OD)
Differential output transition time
TEST CONDITIONS
RL = 54 Ω
Ω,
See Figure 3
MIN
CL = 50 pF,
F
TYP†
0
MAX
UNIT
15
ns
2
ns
8
ns
tPZH
Output enable time to high level
RL = 110 Ω,
See Figure 4
tPZL
Output enable time to low level
RL = 110 Ω,
See Figure 5
CL = 50 pF,
30
ns
tPHZ
Output disable time from high level
RL = 110 Ω,
See Figure 4
CL = 50 pF,
50
ns
tPLZ
Output disable time from low level
RL = 110 Ω,
See Figure 5
CL = 50 pF,
30
ns
CL = 50 pF,
80
ns
† All typical values are at VCC = 5 V, TA = 25°C.
‡ Pulse skew is defined as the |tPLH – tPHL| of each channel of the same device.
SYMBOL EQUIVALENTS
DATA-SHEET PARAMETER
TIA/EIA-422-B
TIA/EIA-485-A
VO
|VOD1|
Voa, Vob
Vo
Voa, Vob
Vo
|VOD2|
Vt (RL = 100 Ω)
|VOD3|
None
Vt (RL = 54 Ω)
Vt (test termination
measurement 2)
∆ |VOD|
| |Vt| – |Vt| |
| |Vt| – |Vt| |
VOC
∆ |VOC|
|Vos|
|Vos – Vos|
|Isa|, |Isb|
|Vos|
|Vos – Vos|
None
|Ixa|, |Ixb|
Iia, Iib
IOS
IO
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
SN65ALS1176
DIFFERENTIAL BUS TRANSCEIVER
SLLS295A – APRIL 1998 – REVISED DECEMBER 1999
RECEIVER SECTION
electrical characteristics over recommended ranges of common-mode input voltage, supply
voltage, and operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VIT+
VIT –
Positive-going input threshold voltage
Vhys
VIK
Hysteresis voltage (VIT + – VIT –)
Negative-going input threshold voltage
VO = 2.7 V,
VO = 0.5 V,
IO = – 0.4 mA
IO = 8 mA
II = – 18 mA
VOH
High level output voltage
High-level
VID = 200 mV,,
See Figure 6
µ ,
IOH = – 400 µA,
VOL
Low level output voltage
Low-level
VID = – 200 mV,,
See Figure 6
IOL = 8 mA,,
IOZ
High-impedance-state output current
VO = 0.4 V to 2.4 V
VI
Line input current
Other input = 0 V,,
See Note 5
IIH
IIL
High-level-enable input current
rI
Input resistance
IOS
Short-circuit output current
ICC
Supply current
TYP†
MAX
0.2
– 0.2‡
27
2.7
VI = 12 V
VI = – 7 V
No load
0 45
0.45
V
± 20
µA
1
– 0.8
20
– 100
VO = 0
Outputs enabled
20
– 15
Outputs disabled
V
V
VIH = 2.7 V
VIL = 0.4 V
VID = 200 mV,
V
mV
– 1.5
12
UNIT
V
60
Enable-input clamp voltage
Low-level-enable input current
MIN
mA
µA
µA
kΩ
– 85
23
30
19
26
mA
mA
† All typical values are at VCC = 5 V, TA = 25°C.
‡ The algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for common-mode
input voltage and threshold voltage levels only.
NOTE 5: This applies for both power on and power off. Refer to TIA/EIA-485-A for exact conditions.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature range
PARAMETER
tpd
tsk(p)
Propagation time
Pulse skew§
tPZH
tPZL
Output enable time to high level
TEST CONDITIONS
VID = – 1.5 V to 1.5 V,,
See Figure 7
Output enable time to low level
CL = 15 pF,
pF
tPHZ
Output disable time from high level
tPLZ
Output disable time from low level
† All typical values are at VCC = 5 V, TA = 25°C.
§ Pulse skew is defined as the |tPLH – tPHL| of each channel of the same device.
6
POST OFFICE BOX 655303
MIN
TYP†
• DALLAS, TEXAS 75265
UNIT
25
ns
0
2
ns
11
18
ns
11
18
ns
50
ns
30
ns
CL = 15 pF,,
See Figure 8
MAX
SN65ALS1176
DIFFERENTIAL BUS TRANSCEIVER
SLLS295A – APRIL 1998 – REVISED DECEMBER 1999
PARAMETER MEASUREMENT INFORMATION
RL
2
VOD2
RL
2
VOC
Figure 1. Driver VOD2 and VOC Test Circuit
375 Ω
VOD3
60 Ω
375 Ω
Vtest
Figure 2. Driver VOD3 Test Circuit
3V
1.5 V
Input
RL = 54 Ω
Generator
(see Note B)
1.5 V
CL = 50 pF
(see Note A)
Output
50 Ω
0V
td(ODL)
(see Note C)
≈2.5 V
td(ODH)
(see Note C)
90% 90%
Output
3V
50%
10%
50%
10%
tt(OD)
TEST CIRCUIT
≈ –2.5 V
tt(OD)
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,
ZO = 50 Ω.
C. td(OD) = td(ODH) or td(ODL)
Figure 3. Driver Differential-Output Delay and Transition Times
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
SN65ALS1176
DIFFERENTIAL BUS TRANSCEIVER
SLLS295A – APRIL 1998 – REVISED DECEMBER 1999
PARAMETER MEASUREMENT INFORMATION
Output
3V
S1
1.5 V
Input
1.5 V
0 V or 3 V
0V
RL = 110 Ω
CL = 50 pF
(see Note A)
Generator
(see Note B)
0.5 V
tPZH
VOH
Output
2.3 V
tPHZ
50 Ω
TEST CIRCUIT
Voff ≈ 0 V
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,
ZO = 50 Ω.
Figure 4. Driver Enable and Disable Times
5V
3V
RL = 110 Ω
S1
1.5 V
Input
0V
Output
tPZL
0 V or 3 V
tPLZ
CL = 50 pF
(see Note A)
Generator
(see Note B)
1.5 V
2.3 V
Output
50 Ω
5V
0.5 V
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,
ZO = 50 Ω.
Figure 5. Driver Enable and Disable Times
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN65ALS1176
DIFFERENTIAL BUS TRANSCEIVER
SLLS295A – APRIL 1998 – REVISED DECEMBER 1999
PARAMETER MEASUREMENT INFORMATION
VID
VOH
+ IOL
– IOH
VOL
Figure 6. Receiver VOH and VOL Test Circuit
3V
Input
Generator
(see Note B)
1.5 V
1.5 V
Output
0V
51 Ω
1.5 V
CL = 15 pF
(see Note A)
tPHL
tPLH
(see Note C)
(see Note C)
VOH
0V
1.3 V
Output
1.3 V
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,
ZO = 50 Ω.
C. tpd = tPLH or tPHL
Figure 7. Receiver Propagation-Delay Times
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
9
SN65ALS1176
DIFFERENTIAL BUS TRANSCEIVER
SLLS295A – APRIL 1998 – REVISED DECEMBER 1999
PARAMETER MEASUREMENT INFORMATION
5V
S2
S1
1.5 V
2 kΩ
–1.5 V
Output
5 kΩ
Generator
(see Note B)
1N916 or Equivalent
50 Ω
S3
TEST CIRCUIT
3V
Input
3V
S1 to 1.5 V
S2 Open
S3 Closed
1.5 V
S1 to – 1.5 V
1.5 V S2 Closed
S3 Open
0V
Input
0V
tPZH
tPZL
VOH
Output
≈4.5 V
1.5 V
0V
Output
1.5 V
VOL
3V
Input
3V
S1 to 1.5 V
S2 Closed
S3 Closed
1.5 V
0V
Input
1.5 V
0V
tPHZ
tPLZ
≈1.3 V
VOH
Output
S1 to – 1.5 V
S2 Closed
S3 Closed
0.5 V
Output
0.5 V
≈1.3 V
VOL
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,
ZO = 50 Ω.
Figure 8. Receiver Output Enable and Disable Times
10
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN65ALS1176
DIFFERENTIAL BUS TRANSCEIVER
SLLS295A – APRIL 1998 – REVISED DECEMBER 1999
APPLICATION INFORMATION
RT
RT
Up to 53
Transceivers
• • •
NOTE A: The line should terminate at both ends in its characteristic impedance (RT = ZO). Stub lengths off the main line should be kept as short
as possible.
Figure 9. Typical Application Circuit
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
11
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright  1999, Texas Instruments Incorporated