SP319 ® 20Mbps, +5V-Only V.35 Interface with RS-232 (V.28) Control Lines ■ ■ ■ ■ ■ ■ ■ ■ ■ 20Mbps V.35 Data Throughput +5V-Only, Single Supply Operation 3 Drivers, 3 Receivers – V.35 4 Drivers, 4 Receivers – RS-232 Improved V.35 Receiver Propagation Delays No External V.35 Termination Resistors Required Termination Disable for V.35 80-pin QFP Surface Mount Packaging Pin Compatible with SP320 DESCRIPTION The SP319 is a complete V.35 interface transceiver offering 3 drivers and 3 receivers for V.35, and 4 drivers and 4 receivers for RS-232 (V.28). A Sipex patented charge pump allows +5V only low power operation. RS-232 drivers and receivers are specified to operate at 120kbps, all V.35 drivers and receivers operate up to 10Mbps. Typical Applications Circuit Pinout 80 R1OUT 79 RCOUT3 78 R2OUT 77 RCB3 76 RCA3 75 NC 74 NC 73 VCC 72 GND 71 RCB1 70 RCA1 69 NC 68 R2IN 67 NC 66 R1IN 65 DRB3 64 GND 63 DRA3 62 VCC 61 DRA1 +5V 25, 33, 41, 62, 73 26 + C1+ + 30 C128 C2+ 0.1µF +5V 31 VCC VDD SP319 14 DRIN1 61 DRA1 Vcc 59 DRB1 13 T1IN 400kΩ Vcc 100Ω Vcc 5kΩ Vcc 5kΩ Vcc SP319 60 GND 59 DRB1 58 T1OUT 57 NC 56 NC 55 NC 54 T2OUT 53 NC 52 NC 51 T4OUT 50 NC 49 NC 48 NC 47 T3OUT 46 NC 45 NC 44 DRB2 43 GND 42 DRA2 41 VCC 51 T4OUT 5kΩ 22 DRIN2 400kΩ R4IN 39 R4OUT 21 47 T3OUT 24 T4IN 400kΩ R3IN 35 42 DRA2 5kΩ Vcc RCA3 76 400kΩ RCOUT3 79 54 T2OUT 17 T3IN 400kΩ R2IN 68 58 T1OUT 16 T2IN 400kΩ R1IN 66 R3OUT 19 RCOUT1 1 NC 2 TS000 3 NC 4 NC 5 TTEN 6 RTEN 7 NC 8 ENV35 9 NC 10 NC 11 NC 12 T1IN 13 DRIN1 14 DRIN3 15 T2IN 16 T3IN 17 NC 18 R3OUT 19 RCOUT2 20 Vcc 400kΩ 100Ω RCB2 38 R2OUT 78 0.1µF + 75 ENT RCB1 71 RCA2 37 R1OUT 80 32 3 TS000 9 ENV35 RCOUT2 20 + C2- RCA1 70 RCOUT 1 VSS 0.1µF 27 ROUT4 21 DRIN2 22 STEN 23 T4IN 24 VCC 25 C1+ 26 VDD 27 C2+ 28 GND 29 C1- 30 C2- 31 VSS 32 VCC 33 GND 34 R3IN 35 NC 36 RCA2 37 RCB2 38 R4IN 39 NC 40 0.1µF 44 DRB2 23 STEN 15 DRIN3 63 DRA3 100Ω 65 DRB3 6 TTEN RTEN 7 RCB3 77 29, 34, 43, 60, 64, 72 SP319DS/08 SP319 20Mbps, +5V-Only V.35 Interface with RS-232 (V.28) Control Lines 1 © Copyright 2000 Sipex Corporation ABSOLUTE MAXIMUM RATINGS These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. VCC.....................................................................................................+7V Input Voltages Logic........................................................-0.3V to (VCC+0.5V) Drivers..................................................-0.3V to (VCC+0.5V) Receivers..................................................±30V at ≤100mA Output Voltages Logic........................................................-0.3V to (VCC+0.5V) Drivers.......................................................................±14V Receivers..............................................-0.3V to (VCC+0.5V) Storage Temperature.......................................................-65˚C to +150˚C Power Dissipation per Package 80-pin QFP (derate 18.3mW/oC above +70oC)..........................1500mW SPECIFICATIONS TAMB = TMIN to TMAX and VCC = 5V±5% unless otherwise noted. PARAMETER MIN. V.35 DRIVER TTL Input Levels VIL VIH +0.44 50 135 Voltage Output Offset -0.6 AC Characteristics Transition Time Maximum Transmission Rate Propagation Delay tPHL V.35 RECEIVER TTL Output Levels VOL VOH Receiver Inputs Differential Input Threshold Input Impedance Short Circuit Impedance AC Characteristics Maximum Transmission Rate Propagation Delay tPHL +0.55 100 150 CONDITIONS Volts Volts +1.2 +0.66 150 165 Volts Volts Ohms Ohms +0.6 Volts Refer to Figure 1 RL=100Ω from A to B; Figure 2 Figure 4 Measured from A=B to Gnd, VOUT=-2V to +2V; Figure 5; TAMB = +25oC VOffset={[|VA|+|VB|]/2}; Figure 3 ns Mbps TAMB = +25oC for all AC parameters 10% to 90%; Figure 6 VDIFF OUT= 0.55V+20% ; Figure 9 10 80 100 ns 80 100 ns Measured from 1.5V of VIN to 50% of VOUT; Figure 9, 10 Measured from 1.5V of VIN to 50% of VOUT; Figure 9, 10 0.4 Volts Volts IOUT=-3.2mA IOUT=1.0mA +0.3 110 165 Volts Ohms Ohms 2.4 -0.3 90 135 UNITS 0.8 40 tPLH SP319DS/08 MAX. 2.0 Voltage Outputs Open Circuit Voltage Differential Outputs Source Impedance Short Circuit Impedance tPLH TYP. 100 150 10 Mbps 60 80 ns 60 80 ns Figure 7 Measured from A=B to Gnd VIN=-2V to +2V; Figure 8; TAMB = +25oC TAMB = +25oC for all AC parameters VIN = +0.55V +20%; Figure 9 Measured from 50% of VIN to 1.5V of ROUT; Figure 9, 11 Measured from 50% of VIN to 1.5V of ROUT; Figure 9, 11 SP319 20Mbps, +5V-Only V.35 Interface with RS-232 (V.28) Control Lines 2 © Copyright 2000 Sipex Corporation SPECIFICATIONS (CONTINUED) TAMB = TMIN to TMAX and VCC = 5V±5% unless otherwise noted. PARAMETER RS-232 DRIVER TTL Input Levels VIL VIH MIN. TYP. MAX. UNITS 0.8 Volts Volts +15.0 -5.0 +15 +100 Volts Volts Volts mA Ohms RL= 3kΩ to Gnd; Figure 13 RL= 3kΩ to Gnd; Figure 13 RL= ∞; Figure 12 RL= Gnd; Figure 15 VCC= 0V; VOUT= +2V; Figure 16 30 V/µs Figure 14 kbps RL= 3kΩ, CL= 2500pF 2.0 Voltage Outputs High Level Output Low Level Output Open Circuit Output Short Circuit Current Power Off Impedance +5.0 -15.0 -15 -100 300 AC Characteristics Slew Rate Maximum Transmission Rate 120 1.56 µs Rise/fall time, between +3V RL= 3kΩ, CL= 2500pF; Figure 17 2 8 µs 2 8 µs RL= 3kΩ, CL= 2500pF; From 1.5V of TIN to 50% of VOUT RL= 3kΩ, CL= 2500pF; From 1.5V of TIN to 50% of VOUT 0.4 Volts Volts IOUT = -3.2mA IOUT = 1.0mA +15 3.0 Volts Volts Volts Volts Volts kΩ VCC= 5V; TA= +25˚C Figure 19 VIN= +15V; Figure 18 Transition Time Propagation Delay tPHL tPLH RS-232 RECEIVER TTL Output Levels VOL VOH 2.4 Receiver Input Input Voltage Range High Threshold Low Threshold Hysteresis Receiver Input Circuit Bias Input Impedance AC Characteristics Maximum Transmission Rate Propagation Delay tPHL tPLH CONDITIONS -15 0.8 0.2 1.7 1.2 0.5 3 5 1 +2.0 7 120 kbps 0.1 0.1 1 1 µs µs From 50% of RIN to 1.5V of ROUT From 50% of RIN to 1.5V of ROUT POWER REQUIREMENTS No Load VCC Supply Current Full Load VCC Supply Current 40 60 70 80 mA mA Shutdown Current 1.5 10 mA No load; VCC= 5.0V; TA= 25˚C RS-232 drivers RL= 3kΩ to Gnd; DC Input V.35 drivers RL= 100Ω from A to B; DC Input TS000 = ENV35 = 0V SP319DS/08 SP319 20Mbps, +5V-Only V.35 Interface with RS-232 (V.28) Control Lines 3 © Copyright 2000 Sipex Corporation A A 50Ω V OCA VT VOC 3.9kΩ 50Ω VOCB B VOS B C C Figure 2. V.35 Driver Output Test Terminated Voltage Figure 1. V.11 and V.35 Driver Output Open-Circuit Voltage V1 A A 50Ω 24kHz, 550mVp-p Sine Wave 50Ω V2 VT 50Ω VOS B B C C Figure 3. V.35 Driver Output Offset Voltage Figure 4. V.35 Driver Output Source Impedance A A 50Ω Oscilloscope B 50Ω ISC B 50Ω ±2V C C Figure 6. V.35 Driver Output Rise/Fall Time Figure 5. V.35 Driver Output Short-Circuit Impedance SP319DS/08 SP319 20Mbps, +5V-Only V.35 Interface with RS-232 (V.28) Control Lines 4 © Copyright 2000 Sipex Corporation A V1 A 50Ω 24kHz, 550mVp-p Sine Wave V2 Isc B B ±2V C C Figure 7. V.35 Receiver Input Source Impedance CL1 TIN A A B B Figure 8. V.35 Receiver Input Short-Circuit Impedance ROUT CL2 15pF fIN (50% Duty Cycle, 2.5VP-P) Figure 9. Driver/Receiver Timing Test Circuit f > 10MHz; tR < 10ns; tF < 10ns DRIVER INPUT DRIVER OUTPUT +3V 1.5V 1.5V 0V A tPLH VO 1/2VO 1/2VO B tDPLH DIFFERENTIAL OUTPUT VB – VA tPHL VO+ 0V VO– tDPHL tR tF tSKEW = | tDPLH - tDPHL | Figure 10. Driver Propagation Delays SP319DS/08 SP319 20Mbps, +5V-Only V.35 Interface with RS-232 (V.28) Control Lines 5 © Copyright 2000 Sipex Corporation f > 10MHz; tR < 10ns; tF < 10ns V0D2+ 0V A–B 0V INPUT V0D2– OUTPUT VOH (VOH - VOL)/2 (VOH - VOL)/2 RECEIVER OUT VOL tPLH tPHL tSKEW = | tPHL - tPLH | Figure 11. Receiver Propagation Delays A A VOC 3kΩ VT C C Figure 12. V.28 Driver Output Open Circuit Voltage Figure 13. V.28 Driver Output Loaded Voltage A A 7kΩ VT Isc Oscilloscope C C Scope used for slew rate measurement. Figure 15. V.28 Driver Output Short-Circuit Current Figure 14. V.28 Driver Output Slew Rate SP319DS/08 SP319 20Mbps, +5V-Only V.35 Interface with RS-232 (V.28) Control Lines 6 © Copyright 2000 Sipex Corporation VCC = 0V A A Ix 3kΩ 2500pF Oscilloscope ±2V C C Figure 17. V.28 Driver Output Rise/Fall Times Figure 16. V.28 Driver Output Power-Off Impedance A A Iia ±15V Voc C C Figure 18. V.28 Receiver Input Impedance SP319DS/08 Figure 19. V.28 Receiver Input Open Circuit Bias SP319 20Mbps, +5V-Only V.35 Interface with RS-232 (V.28) Control Lines 7 © Copyright 2000 Sipex Corporation All of the V.35 receivers can operate at data rates as high as 5Mbps. The sensitivity of the V.35 receiver inputs is +300mV. THEORY OF OPERATION The SP319 is a single chip +5V-only serial transceiver that supports all the signals necessary to implement a full V.35 interface. Three V.35 drivers and three V.35 receivers make up the clock and data signals. Four RS-232 (V.28) drivers and four RS-232 (V.28) receivers are used for control line signals for the interface. RS-232 (V.28) Drivers The RS-232 drivers are inverting transmitters, which accept either TTL or CMOS inputs and output the RS-232 signals with an inverted sense relative to the input logic levels. Typically, the RS-232 output voltage swing is +9V with no load, and +5V minimum with full load. The transmitter outputs are protected against infinite short-circuits to ground without degradation in reliability. V.35 Drivers The V.35 drivers are +5V-only, low power voltage output transmitters. The drivers do not require any external resistor networks, and will meet the following requirements: In the power off state, the output impedance of the RS-232 drivers will be greater than 300Ω over a +2V range. Should the input of a driver be left open, an internal 400kΩ pullup resistor to VCC forces the input high, thus committing the output to a low state. The slew rate of the transmitter output is internally limited to a maximum of 30V/µs in order to meet the EIA standards. The RS-232 drivers are rated for 120kbps data rates. 1. Source impedance in the range of 50Ω to 150Ω. 2. Resistance between short-circuited terminals and ground is 150Ω +15Ω. 3. When terminated with a 100Ω resistive load the terminal to terminal voltage will be 0.55 Volts ±20% so that the A terminal is positive to the B terminal when binary 0 is transmitted, and the conditions are reversed to transmit binary 1. RS-232 (V.28) Receivers The RS-232 receivers convert RS-232 input signals to inverted TTL signals. Each of the four receivers features 500mV of hysteresis margin to minimize the effects of noisy transmission lines. The inputs also have a 5kΩ resistor to ground; in an open circuit situation the input of the receiver will be forced low, committing the output to a logic high state. The input resistance will maintain 3kΩ-7kΩ over a +15V range. The maximum operating voltage range for the receiver is +30V, under these conditions the input current to the receiver must be limited to less than 100mA. The RS-232 receivers can operate to beyond 120kbps. 4. The arithmetic mean of the voltage of the A terminal with respect to ground, and the B terminal with respect to ground will not exceed 0.6 Volts when terminated as in 3 above. The V.35 drivers can operate at data rates as high as 5Mbps. The driver outputs are protected against short-circuits between the A and B outputs and short circuits to ground. Two of the V.35 drivers, DRIN2 and DRIN3 are equipped with enable control lines. When the enable pins are high the driver outputs are disabled, the output impedance of a disabled driver will nominally be 300Ω. When the enable pins are low, the drivers are active. CHARGE PUMP The charge pump is a Sipex patented design (U.S. 5,306,954) that uses an innovative approach. The charge pump, with four external capacitors, uses a four-phase voltage shifting technique to attain a symmetrical +10V power supply. The capacitors can be as low as 0.1µF with a 16 Volt rating. Either polarized or non-polarized capacitors can be used. V.35 Receivers The V.35 receivers are +5V only, low power differential receivers which meet the following requirements: 1. Input impedance in the range of 100Ω +10Ω. 2. Resistance to ground of 150Ω +15Ω, measured from short-circuited terminals. SP319DS/08 SP319 20Mbps, +5V-Only V.35 Interface with RS-232 (V.28) Control Lines 8 © Copyright 2000 Sipex Corporation Since both V+ and V- are separately generated from Vcc in a no load condition, V+and V- will be symmetrical. Older charge pump approaches that generate V- from V+ will show a decrease in the magnitude of V- compared to V+ due to the inherent inefficiencies in design. +10V a) C2+ The clock rate for the charge pump typically operates at 15kHz with 0.1µF, 16V external capacitors. GND GND b) C2– Shutdown Mode The SP319 can be put into a low power shutdown mode by bringing both TS000 (pin 3) and ENV35 (pin 9) low. In shutdown mode, SP319 draws less than 2mA. For normal operation, both pins should be connected to +5V. –10V Figure 20. Charge Pump Waveforms Figure 20 shows the waveforms on the positive and negative sides of capacitor C2 respectively. A free-running oscillator controls the four phases of the voltage shifting. A description of each phase follows. Termination Enable The SP319 includes a termination enable pin that connects or disconnects the receiver input termination circuitry. A TTL logic LOW at ENT (pin 75) will connect the "Y" termination network to the V.35 receiver inputs. A TTL logic HIGH at ENT (pin 75) will disconnect the "Y" termination network and the receivers will operate as V.11 compliant receivers. The ENT pin has an internal pull-down resistor so that a floating input will enable the termination network. The SP319 is compatible with the SP320 since pin 75 on the SP320 is designated as a no connect. Phase 1: VSS Charge Storage (Figure 21) During this phase of the clock cycle, the positive side of capacitors C1 and C2 are charged to +5V. C1+ is switched to ground and the charge on C1- is transferred to C2-. Since C2+ is connected to +5V, the voltage potential across capacitor C2 becomes 10V. Phase 2: VSS Transfer (Figure 22) Phase two of the clock connects the negative terminal of C2 to the Vss storage capacitor and the positive terminal of C2 to ground, and transfers the generated -10V to C3. Simultaneously, the positive side of capacitor C1 is switched to +5V and the negative side is connected to ground. External Power Supplies For applications where separate external supplies can be applied at the V+ and V- pins. The value of the external supply voltages should not exceed +10V. It is critical the external power supplies provide a power supply sequence of : +10V, +5V, and then -10V. Phase 3: VDD Charge Storage (Figure 23) The third phase of the clock is identical to the first phase - the transferred charge on C1 produces -5V on the negative terminal of C1, which is applied to the negative side of capacitor C2. Since C2+ is at +5V, the voltage potential across C2 is +10V. Applications Information The SP319 is a single chip device that can implement a complete V.35 interface. Three (3) V.35 drivers and three (3) V.35 receivers are used for clock and data signals and four (4) RS-232 (V.28) drivers and four (4) RS-232 (V.28) receivers can be used for the control signals of the interface. Figures 25 and 28 show the SP319 configured in DTE and DCE applications along with an ISO-2593 pin out. Phase 4: VDD Transfer (Figure 24) The fourth phase of the clock connects the negative terminal of C2 to ground and transfers the generated +10V across C2 to C4, the Vdd storage capacitor. The positive side of capacitor C1 is switched to +5V and the negative side is connected to ground, and the cycle begins again. SP319DS/08 SP319 20Mbps, +5V-Only V.35 Interface with RS-232 (V.28) Control Lines 9 © Copyright 2000 Sipex Corporation VCC = +5V VCC = +5V C4 +10V + C1 + C2 – – + – VDD Storage Capacitor + C1 VSS Storage Capacitor C3 + VDD Storage Capacitor VSS Storage Capacitor C3 –5V VCC = +5V C4 + – – – – Figure 22. Charge Pump Phase 2 VCC = +5V C1 + + C2 – –5V Figure 21. Charge Pump Phase 1 + C4 +5V – + C2 – + – VDD Storage Capacitor C1 VSS Storage Capacitor C3 –10V + – 28 C2+ 31 C2- 25 VCC SP319CF 14 – + VDD Storage Capacitor VSS Storage Capacitor C3 +5V 1N5819 0.1µF 0.1µF 27 26 30 VDD C1+ C1- 32 VSS 28 0.1µF C2+ 0.1µF 31 C2- 25 VCC 1N5819 0.1µF 27 26 30 0.1µF VDD C1+ C1- 32 VSS SP319CF TxD (103) P S TxC (113) U DRIN3 15 – Figure 24. Charge Pump Phase 4 P S DRIN1 – –5V +5V 0.1µF + + C2 –5V Figure 23. Charge Pump Phase 3 0.1µF C4 +5V – + U W W A RCOUT1 14 RCOUT2 20 A RCOUT3 DRIN2 22 79 TxCC (114) Y AA RCOUT3 79 AA RxC (115) X V RCOUT2 20 1 T2IN 16 H T1IN 13 C T3IN 17 N T4IN 24 L R2OUT 78 E R1OUT 80 D R3OUT 19 F R4OUT 21 NN X V RxD (104) T R RCOUT1 Y T R DTR (108) RTS (105) RL (140) LL (141) DSR (107) CTS (106) DCD (109) TM (142) B 29, 34, 43, 60, 64, 72 DRIN2 22 DRIN3 15 DRIN1 14 H R2OUT 78 C R1OUT 80 N R4OUT 21 L R3OUT 19 E T2IN 16 D T1IN 13 F T3IN 17 NN T4IN 24 B ISO2593 34-PIN DTE/DCE INTERFACE CONNECTOR ISO2593 34-PIN DTE/DCE INTERFACE CONNECTOR 29, 34, 43, 60, 64, 72 Figure 25. Typical DTE-DCE V.35 Connection using the SP319 SP319DS/08 SP319 20Mbps, +5V-Only V.35 Interface with RS-232 (V.28) Control Lines 10 © Copyright 2000 Sipex Corporation Signal Ground Clear to Send Data Carrier Detect Ring Indicator Local Loopback Remote Loopback Receive Data (A) Receive Data (B) Receive Timing (A) Receive Timing (B) Unassigned--Unassigned--Unassigned--Unassigned--Unassigned--Unassigned--Test Mode A C E H K M P S U W Y AA CC EE HH KK MM B D F J L N R T V X Z BB DD FF JJ LL NN Chasis Ground Request to Send DCE Ready (DSR) DTE Ready (DTR) Unassigned--Unassigned--Transmitted Data (A) Transmitted Data (B) Terminal Timing (A) } 113(A) Terminal Timing (B) } 113(B) Transmit Timing (A) } 114(A) Transmit Timing (B) } 114(B) Unassigned--Unassigned--Unassigned--Unassigned--Unassigned--- Figure 26. ISO-2593 Connector Pin Out +5V 25, 33, 41, 62, 73 26 + 0.1µF C1+ VCC VDD 30 + 0.1µF +5V C128 C2+ SP319 TXD TXC 75 ENT 100Ω Vcc RTS RCOUT2 20 R1OUT 80 DTR R2OUT 78 RLPBK R3OUT 19 13 T1IN Vcc 100Ω Vcc 400kΩ Vcc 5kΩ 106 DSR 107 DCD 47 T3OUT 24 T4IN 400kΩ 104(B) 54 T2OUT 17 T3IN 5kΩ R3IN 35 140 104(A) CTS 58 T1OUT 16 T2IN 400kΩ R2IN 68 108 RXD 61 DRA1 59 DRB1 R1IN 66 105 14 DRIN1 400kΩ RCB2 38 113(B) 0.1µF + Vcc 400KΩ RCB1 71 RCA2 37 103(B) 113(A) 0.1µF 3 TS000 RCA1 70 RCOUT 1 32 + 31 C2- 9 ENV35 103(A) VSS 27 109 RI 51 T4OUT 125 Vcc 22 DRIN2 400kΩ 141 R4IN 39 LLPBK R4OUT 21 5kΩ Vcc RCA3 76 SPARE 400kΩ SPARE SPARE 5kΩ RCOUT3 79 100Ω RTEN 7 RCB3 77 TXCC 42 DRA2 114(A) 44 DRB2 23 STEN 114(B) 15 DRIN3 RXC 63 DRA3 115(A) 65 DRB3 115(B) 6 TTEN 29, 34, 43, 60, 64, 72 Figure 27. Typical DCE V.35 Interface SP319DS/08 SP319 20Mbps, +5V-Only V.35 Interface with RS-232 (V.28) Control Lines 11 © Copyright 2000 Sipex Corporation +5V 25, 33, 41, 62, 73 26 + 0.1µF C1+ VCC VDD 30 + 0.1µF +5V C128 C2+ SP319 104(A) 75 ENT RCOUT2 20 14 DRIN1 400kΩ 100Ω Vcc 400kΩ TXD 61 DRA1 103(A) 107 Vcc 400kΩ R2IN 68 R2OUT 78 109 Vcc 5kΩ R3IN 35 108 RLPBK 47 T3OUT 24 T4IN 400kΩ 105 DTR 54 T2OUT 17 T3IN 5kΩ 103(B) RTS 58 T1OUT 16 T2IN 400kΩ R1IN 66 R1OUT 80 13 T1IN Vcc 100Ω RCB2 38 106 DSR Vcc RCB1 71 RCA2 37 114(B) CTS 0.1µF + 59 DRB1 104(B) 114(A) TXCC 32 3 TS000 RCA1 70 RCOUT 1 + 31 C2- 9 ENV35 RXD VSS 0.1µF 27 140 LLPBK 51 T4OUT 141 Vcc DCD R3OUT 19 5kΩ 22 DRIN2 400kΩ 125 RI R4IN 39 R4OUT 21 115(A) 5kΩ Vcc RCA3 76 400kΩ RXC RCOUT3 79 115(B) 100Ω RTEN 7 RCB3 77 TXCT 42 DRA2 113(A) 44 DRB2 23 STEN 113(B) 15 DRIN3 SPARE 63 DRA3 SPARE 65 DRB3 SPARE 6 TTEN 29, 34, 43, 60, 64, 72 Figure 28. Typical DTE V.35 Interface SP319DS/08 SP319 20Mbps, +5V-Only V.35 Interface with RS-232 (V.28) Control Lines 12 © Copyright 2000 Sipex Corporation PACKAGE: QUAD FLATPACK JEDEC "BE-2" OUTLINE D D1 0.3" RAD. TYP. PIN 1 0.2" RAD. TYP. 10°-16° E1 CL E 6°±4° 0°–7° 0.005/0.009" (0.13/0.23) CL L A 0.009"/0.015" (0.220/0.380) 10°-16° A1 0.02559"/– (0.65/–) Seating Plane DIMENSIONS in Inches JEDEC BE-2 Outline Minimum/Maximum 80–PIN (mm) A –/0.0925 (–/2.350) A1 –/0.010 (–/0.250) D 0.667/0.687 (16.950/17.450) D1 0.547/0.555 (13.900/14.100) E 0.667/0.687 (16.950/17.450) E1 0.547/0.555 (13.900/14.100) 0.0255/0.0375 (0.650/0.950) L SP319DS/08 SP319 20Mbps, +5V-Only V.35 Interface with RS-232 (V.28) Control Lines 13 © Copyright 2000 Sipex Corporation ORDERING INFORMATION Model Temperature Range Package Types SP319CF ..................................................... 0˚C to +70˚C ......................... 80-pin JEDEC (BE-2 Outline) QFP Please consult the factory for pricing and availability on a Tape-On-Reel option. Corporation SIGNAL PROCESSING EXCELLENCE Sipex Corporation Headquarters and Sales Office 22 Linnell Circle Billerica, MA 01821 TEL: (978) 667-8700 FAX: (978) 670-9001 e-mail: [email protected] Sales Office 233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600 Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others. SP319DS/08 SP319 20Mbps, +5V-Only V.35 Interface with RS-232 (V.28) Control Lines 14 © Copyright 2000 Sipex Corporation