® SP3222B/3232B True +3.0V to +5.5V RS-232 Transceivers ■ Meets true EIA/TIA-232-F Standards from a +3.0V to +5.5V power supply ■ 250kbps Transmission Rate Under Load ■ 1µA Low-Power Shutdown with Receivers Active (SP3222B) ■ Interoperable with RS-232 down to +2.7V power source ■ ESD Specifications: ±2kV Human Body Model DESCRIPTION The SP3222B/3232B series is an RS-232 transceiver solution intended for portable or handheld applications such as notebook or palmtop computers. The SP3222B/3232B series has a high-efficiency, charge-pump power supply that requires only 0.1µF capacitors in 3.3V operation. This charge pump allows the SP3222B/3232B series to deliver true RS-232 performance from a single power supply ranging from +3.0V to +5.5V. The ESD tolerance of the SP3222B/3232B devices are over ±15kV for both Human Body Model and IEC10004-2 Air discharge test methods. The SP3222B device has a low-power shutdown mode where the devices' driver outputs and charge pumps are disabled. During shutdown, the supply current falls to less than 1µA. SELECTION TABLE MODEL Power Supplies RS-232 Drivers RS-232 Receivers External Components Shutdown TTL 3-State No. of Pins SP3222B +3.0V to +5.5V 2 2 4 Yes Yes 18, 20 SP3232B +3.0V to +5.5V 2 2 4 No No 16 Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers 1 © Copyright 2003 Sipex Corporation ABSOLUTE MAXIMUM RATINGS These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability and cause permanent damage to the device. Output Voltages TxOUT ........................................................... ±13.2V RxOUT ..................................... -0.3V to (VCC + 0.3V) Short-Circuit Duration TxOUT .................................................... Continuous Storage Temperature ...................... -65°C to +150°C Power VCC ...................................................... -0.3V to +6.0V V+ (NOTE 1) ...................................... -0.3V to +7.0V V- (NOTE 1) ....................................... +0.3V to -7.0V V+ + |V-| (NOTE 1) ........................................... +13V Dissipation Per Package 20-pin SSOP (derate 9.25mW/oC above +70oC) ........ 750mW 18-pin PDIP (derate 15.2mW/oC above +70oC) ....... 1220mW 18-pin SOIC (derate 15.7mW/oC above +70oC) ....... 1260mW 20-pin TSSOP (derate 11.1mW/oC above +70oC) ...... 890mW 16-pin SSOP (derate 9.69mW/oC above +70oC) ........ 775mW 16-pin PDIP (derate 14.3mW/oC above +70oC) ....... 1150mW 16-pin Wide SOIC (derate 11.2mW/oC above +70oC) .... 900mW 16-pin TSSOP (derate 10.5mW/oC above +70oC) ...... 850mW 16-pin nSOIC (derate 13.57mW/°C above +70°C) ...... 1086mW ICC (DC VCC or GND current) ......................... ±100mA Input Voltages TxIN, EN ............................................ -0.3V to +6.0V RxIN .................................................................. ±25V NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V. NOTE 2: Driver Input hysteresis is typically 250mV. SPECIFICATIONS Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX, C1 to C4=0.1µF PARAMETER MIN. TYP. MAX. UNITS CONDITIONS Supply Current 0.3 1.0 mA no load, TAMB = +25°C, VCC = 3.3V, TxIN = VCC or GND Shutdown Supply Current 1.0 10 µA SHDN = GND, TAMB = +25°C, VCC = +3.3V, TxIN = VCC or GND 0.8 V TxIN, EN, SHDN, Note 2 V V VCC = 3.3V, Note 2 VCC = 5.0V, Note 2 TxIN, EN, SHDN, TAMB = +25°C, VIN = 0V to VCC DC CHARACTERISTICS LOGIC INPUTS AND RECEIVER OUTPUTS Input Logic Threshold LOW Input Logic Threshold HIGH 2.0 2.4 Input Leakage Current ±0.01 ±1.0 µA Output Leakage Current ±0.05 ±10 µA receivers disabled, VOUT = 0V to VCC 0.4 V IOUT = 1.6mA Output Voltage LOW Output Voltage HIGH VCC-0.6 VCC-0.1 V IOUT = -1.0mA Output Voltage Swing ±5.0 ±5.4 V 3kΩ load to ground at all driver outputs, TAMB = +25°C Output Resistance 300 Ω VCC = V+ = V- = 0V, TOUT = +2V DRIVER OUTPUTS Output Short-Circuit Current Output Leakage Current Rev. 6/30/03 ±35 ±60 mA VOUT = 0V ±25 µA VOUT = ±12V,VCC= 0V, or 3.0V to 5.5V, drivers disabled SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers 2 © Copyright 2003 Sipex Corporation SPECIFICATIONS (continued) Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX , C1 to C4=0.1µF. Typical Values apply at VCC = +3.3V or +5.5V and TAMB = 25oC. PARAMETER MIN. TYP. MAX. UNITS +25 V CONDITIONS RECEIVER INPUTS Input Voltage Range -25 Input Threshold LOW 0.6 0.8 1.2 1.5 Input Threshold HIGH 1.5 1.8 Input Hysteresis 0.3 Input Resistance 3 5 2.4 2.4 V VCC=3.3V VCC=5.0V V VCC=3.3V VCC=5.0V V 7 kΩ TIMING CHARACTERISTICS Maximum Data Rate 250 kbps RL=3kΩ, CL=1000pF, one driver switching Receiver Propagation Delay 0.15 0.15 µs Receiver Output Enable Time 200 ns Receiver Output Disable Time 200 ns Driver Skew 100 ns | tPHL - tPLH |, TAMB = 25oC Receiver Skew 50 ns | tPHL - tPLH | Transition-Region Slew Rate Rev. 6/30/03 30 V/µs SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers 3 tPHL, RxIN to RxOUT, CL=150pF tPLH, RxIN to RxOUT, CL=150pF VCC = 3.3V, RL = 3KΩ, TAMB = 25oC, measurements taken from -3.0V to +3.0V or +3.0V to -3.0V © Copyright 2003 Sipex Corporation TYPICAL PERFORMANCE CHARACTERISTICS Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 250kbps data rates, all drivers loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C. 6 30 25 TxOUT + Slew rate (V/µs) Transmitter Output Voltage (V) 4 2 T1 at 250Kbps 0 T2 at 15.6Kbps All TX loaded 3K // CLoad -2 TxOUT - -4 -6 - Slew + Slew 20 15 10 T1 at 250Kbps T2 at 15.6Kbps 5 0 1000 2000 3000 4000 0 5000 All TX loaded 3K // CLoad 0 500 1000 Load Capacitance (pF) Figure 1. Transmitter Output Voltage vs Load Capacitance. Supply Current (mA) Supply Current (mA) 250Kbps T2 at 1/16 Data Rate All TX loaded 3K // CLoad 20 125Kbps 15 20Kbps 10 5 0 1000 5000 14 12 10 8 6 1 Transmitter at 250Kbps 4 1 Transmitter at 15.6Kbps 2 0 4000 16 T1 at Full Data Rate 25 3000 Figure 2. Slew Rate vs Load Capacitance. 35 30 2000 Load Capacitance (pF) 2000 3000 4000 0 5000 Load Capacitance (pF) All transmitters loaded with 3K // 1000pf 2.7 3 3.5 4 4.5 5 Supply Voltage (V) Figure 4. Supply Current vs Supply Voltage. Figure 3. Supply Current vs Load Capacitance when Transmitting Data. 6 Transmitter Output Voltage (V) TxOUT + 4 2 T1 at 250Kbps T2 at 15.6Kbps 0 All TX loaded 3K // 1000 pF -2 -4 -6 TxOUT - 2.7 3 3.5 4 4.5 5 Supply Voltage (V) Figure 5. Transmitter Output Voltage vs Supply Voltage. Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers 4 © Copyright 2003 Sipex Corporation PIN NUMBER NAME SP3222B FUNCTION DIP/SO SSOP TSSOP SP3232B EN Receiver Enable. Apply logic LOW for normal operation. Apply logic HIGH to disable the receiver outputs (high-Z state). 1 1 - C1+ Positive terminal of the voltage doubler charge-pump capacitor. 2 2 1 V+ +5.5V generated by the charge pump. 3 3 2 C1- Negative terminal of the voltage doubler charge-pump capacitor. 4 4 3 C2+ Positive terminal of the inverting charge-pump capacitor. 5 5 4 C2- Negative terminal of the inverting charge-pump capacitor. 6 6 5 V- -5.5V generated by the charge pump. 7 7 6 T1OUT RS-232 driver output. 15 17 14 T2OUT RS-232 driver output. 8 8 7 R1IN RS-232 receiver input. 14 16 13 R2IN RS-232 receiver input. 9 9 8 R1OUT TTL/CMOS reciever output. 13 15 12 R2OUT TTL/CMOS reciever output. 10 10 9 T1IN TTL/CMOS driver input. 12 13 11 T2IN TTL/CMOS driver input. 11 12 10 GND Ground. 16 18 15 +3.0V to +5.5V supply voltage 17 19 16 Shutdown Control Input. Drive HIGH for normal device operation. Drive LOW to shutdown the drivers (high-Z output) and the onboard power supply. 18 20 - - 11, 14 - VCC SHDN N.C. No Connect. Table 1. Device Pin Description Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers 5 © Copyright 2003 Sipex Corporation EN 20 SHDN 1 C1+ 2 EN 19 VCC V+ 3 18 GND C1- 4 17 T1OUT C2+ 5 16 R1IN C2- 6 15 R1OUT V- 7 14 T2OUT 8 13 T1IN R2IN 9 12 T2IN SP3222B R2OUT 10 11 18 SHDN 1 C1+ 2 17 VCC V+ 3 16 GND C1- 4 15 T1OUT C2+ 5 14 R1IN C2- 6 13 R1OUT V- 7 12 T1IN T2OUT 8 11 T2IN R2IN 9 10 N.C. SP3222B R2OUT N.C. DIP/SO SSOP/TSSOP Figure 6. Pinout Configurations for the SP3222B 16 VCC C1+ 1 V+ 2 15 GND C1- 3 C2+ 4 C2- 5 12 R1OUT V- 6 11 T1IN T2OUT 7 10 R2IN 8 9 14 T1OUT SP3232B 13 R1IN T2IN R2OUT Figure 7. Pinout Configuration for the SP3232B Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers 6 © Copyright 2003 Sipex Corporation VCC C5 C1 + + VCC 19 VCC 0.1µF V+ 0.1µF LOGIC INPUTS 0.1µF 0.1µF + C1 2 C1+ V+ 3 0.1µF *C3 4 C1- SP3222B SSOP TSSOP 6 C2- V- 7 13 T1IN T1OUT 17 12 T2IN T2OUT 8 R1IN R2IN + 0.1µF + C2 RS-232 OUTPUTS 0.1µF LOGIC INPUTS 16 RS-232 INPUTS C4 12 T1IN T1OUT 15 11 T2IN T2OUT 8 9 R1IN 14 R2IN 9 5kΩ LOGIC OUTPUTS 10 R2OUT + 0.1µF 7 6 C2- 5kΩ 1 EN V- 13 R1OUT 5kΩ 10 R2OUT SP3222B DIP/SO 5 C2+ C4 15 R1OUT LOGIC OUTPUTS + *C3 5 C2+ + 17 VCC 0.1µF 3 4 C1- C2 + C5 2 C1+ + 0.1µF RS-232 OUTPUTS RS-232 INPUTS 5kΩ SHDN 20 1 EN SHDN GND GND *can be returned to either VCC or GND 18 18 16 *can be returned to either VCC or GND Figure 8. SP3222B Typical Operating Circuits VCC C5 C1 + + 16 VCC 0.1µF 1 C1+ V+ 2 0.1µF *C3 3 C14 C2+ C2 LOGIC INPUTS + 0.1µF SP3232B V- LOGIC OUTPUTS C4 11 T1IN T1OUT 14 10 T2IN T2OUT 7 R1IN 13 R2IN 8 5kΩ 9 R2OUT 0.1µF 6 5 C2- 12 R1OUT + + 0.1µF RS-232 OUTPUTS RS-232 INPUTS 5kΩ GND 15 *can be returned to either VCC or GND Figure 9. SP3232B Typical Operating Circuit Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers 7 © Copyright 2003 Sipex Corporation DESCRIPTION The drivers can guarantee a data rate of 250kbps fully loaded with 3KΩ in parallel with 1000pF, ensuring compatibility with PC-to-PC communication software. The SP3222B/3232B transceivers meet the EIA/ TIA-232 and V.28/V.24 communication protocols and can be implemented in battery-powered, portable, or hand-held applications such as notebook or palmtop computers. The SP3222B/3232B devices all feature Sipex's proprietary on-board charge pump circuitry that generates 2 x VCC for RS-232 voltage levels from a single +3.0V to +5.5V power supply. This series is ideal for +3.3V-only systems, mixed +3.3V to +5.5V systems, or +5.0V-only systems that require true RS-232 performance. The SP3222B/3232B series have drivers that operate at a typical data rate of 250kbps fully loaded. The slew rate of the driver output is internally limited to a maximum of 30V/µs in order to meet the EIA standards (EIA RS-232D 2.1.7, Paragraph 5). The transition of the loaded output from HIGH to LOW also meets the monotonicity requirements of the standard. Figure 10 shows a loopback test circuit used to the RS-232 drivers. Figure 11 shows the test results of the loopback circuit with all drivers active at 120kbps with RS-232 loads in parallel with 1000pF capacitors. Figure 12 shows the test results where one driver was active at 250kbps and all drivers loaded with an RS-232 receiver in parallel with a 1000pF capacitor. A solid RS-232 data transmission rate of 250kbps provides compatibility with many designs in personal computer peripherals and LAN applications. The SP3222B and SP3232B are 2-driver/2receiver devices ideal for portable or hand-held applications. The SP3222B features a 1µA shutdown mode that reduces power consumption and extends battery life in portable systems. Its receivers remain active in shutdown mode, allowing external devices such as modems to be monitored using only 1µA supply current. The SP3222B driver's output stages are turned off (tri-state) when the device is in shutdown mode. When the power is off, the SP3222B device permits the outputs to be driven up to ±12V. The driver's inputs do not have pull-up resistors. Designers should connect unused inputs to VCC or GND. THEORY OF OPERATION The SP3222B/3232B series are made up of three basic circuit blocks: 1. Drivers, 2. Receivers, and 3. the Sipex proprietary charge pump. In the shutdown mode, the supply current falls to less than 1µA, where SHDN = LOW. When the SP3222B device is shut down, the device's driver outputs are disabled (tri-stated) and the charge pumps are turned off with V+ pulled down to VCC and V- pulled to GND. The time required to exit shutdown is typically 100µs. Connect SHDN to VCC if the shutdown mode is not used. Drivers The drivers are inverting level transmitters that convert TTL or CMOS logic levels to ±5.0V EIA/TIA-232 levels inverted relative to the input logic levels. Typically, the RS-232 output voltage swing is ±5.5V with no load and at least ±5V minimum fully loaded. The driver outputs are protected against infinite short-circuits to ground without degradation in reliability. Driver outputs will meet EIA/TIA-562 levels of ±3.7V with supply voltages as low as 2.7V. Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers 8 © Copyright 2003 Sipex Corporation VCC C5 C1 + + 0.1µF VCC C1+ V+ 0.1µF + 0.1µF C3 C1- C2 + C2+ 0.1µF SP3222B SP3232B VC4 C2LOGIC INPUTS LOGIC OUTPUTS + 0.1µF TxOUT TxIN RxIN RxOUT 5kΩ EN* *SHDN VCC GND 1000pF * SP3222EB only Figure 10. SP3222B/3232B Driver Loopback Test Circuit Figure 11. Driver Loopback Test Results at 120kbps Rev. 6/30/03 Figure 12. Driver Loopback Test Results at 250 kbps SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers 9 © Copyright 2003 Sipex Corporation In applications that are sensitive to power-supply noise, decouple VCC to ground with a capacitor of the same value as charge-pump capacitor C1. Physically connect bypass capacitors as close to the IC as possible. Receivers The receivers convert EIA/TIA-232 levels to TTL or CMOS logic output levels. The SP3222B receivers have an inverting tri-state output. These receiver outputs (RxOUT) are tri-stated when the enable control EN = HIGH. In the shutdown mode, the receivers can be active or inactive. EN has no effect on TxOUT. The truth table logic of the SP3222B driver and receiver outputs can be found in Table 2. The charge pumps operate in a discontinuous mode using an internal oscillator. If the output voltages are less than a magnitude of 5.5V, the charge pumps are enabled. If the output voltage exceed a magnitude of 5.5V, the charge pumps are disabled. This oscillator controls the four phases of the voltage shifting. A description of each phase follows. Since receiver input is usually from a transmission line where long cable lengths and system interference can degrade the signal, the inputs have a typical hysteresis margin of 300mV. This ensures that the receiver is virtually immune to noisy transmission lines. Should an input be left unconnected, a 5kΩ pulldown resistor to ground will commit the output of the receiver to a HIGH state. Phase 1 — VSS charge storage — During this phase of the clock cycle, the positive side of capacitors C1 and C2 are initially charged to VCC. Cl+ is then switched to GND and the charge in C1– is transferred to C2–. Since C2+ is connected to VCC, the voltage potential across capacitor C2 is now 2 times VCC. Charge Pump The charge pump is a Sipex–patented design (5,306,954) and uses a unique approach compared to older less–efficient designs. The charge pump still requires four external capacitors, but uses a four–phase voltage shifting technique to attain symmetrical 5.5V power supplies. The internal power supply consists of a regulated dual charge pump that provides output voltages 5.5V regardless of the input voltage (VCC) over the +3.0V to +5.5V range. Phase 2 — VSS transfer — Phase two of the clock connects the negative terminal of C2 to the VSS storage capacitor and the positive terminal of C2 to GND. This transfers a negative generated voltage to C3. This generated voltage is regulated to a minimum voltage of -5.5V. Simultaneous with the transfer of the voltage to C3, the positive side of capacitor C1 is switched to VCC and the negative side is connected to GND. In most circumstances, decoupling the power supply can be achieved adequately using a 0.1µF bypass capacitor at C5 (refer to Figures 8 and 9). SHDN EN TxOUT RxOUT 0 0 Tri-state Active 0 1 Tri-state Tri-state 1 0 Active Active 1 1 Active Tri-state Phase 3 — VDD charge storage — The third phase of the clock is identical to the first phase — the charge transferred in C1 produces –VCC in the negative terminal of C1, which is applied to the negative side of capacitor C2. Since C2+ is at VCC, the voltage potential across C2 is 2 times VCC. Phase 4 — VDD transfer — The fourth phase of the clock connects the negative terminal of C2 to GND, and transfers this positive generated voltage across C2 to C4, the VDD storage capacitor. Table 2. SP3222B Truth Table Logic for Shutdown and Enable Control Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers 10 © Copyright 2003 Sipex Corporation The Human Body Model has been the generally accepted ESD testing method for semiconductors. This method is also specified in MIL-STD883, Method 3015.7 for ESD testing. The premise of this ESD test is to simulate the human body’s potential to store electrostatic energy and discharge it to an integrated circuit. This voltage is regulated to +5.5V. At this voltage, the internal oscillator is disabled. Simultaneous with the transfer of the voltage to C4, the positive side of capacitor C1 is switched to VCC and the negative side is connected to GND, allowing the charge pump cycle to begin again. The charge pump cycle will continue as long as the operational conditions for the internal oscillator are present. The simulation is performed by using a test model as shown in Figure 18. This method will test the IC’s capability to withstand an ESD transient during normal handling such as in manufacturing areas where the ICs tend to be handled frequently. Since both V+ and V– are separately generated from VCC; in a no–load condition V+ and V– will be symmetrical. Older charge pump approaches that generate V– from V+ will show a decrease in the magnitude of V– compared to V+ due to the inherent inefficiencies in the design. For the Human Body Model, the current limiting resistor (RS) and the source capacitor (CS) are 1.5kΩ and 100pF, respectively. The clock rate for the charge pump typically operates at 250kHz. The external capacitors can be as low as 0.1µF with a 16V breakdown voltage rating. ESD Tolerance The SP3222B/3232B series incorporates ruggedized ESD cells on all driver output and receiver input pins. The ESD structure is improved over our previous family for more rugged applications and environments sensitive to electrostatic discharges and associated transients. VCC = +5V +5V C1 + C2 – –5V C4 + – – + VDD Storage Capacitor + – –5V VSS Storage Capacitor C3 Figure 13. Charge Pump — Phase 1 VCC = +5V C4 + C1 + C2 – – + – –10V – + VDD Storage Capacitor VSS Storage Capacitor C3 Figure 14. Charge Pump — Phase 2 Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers 11 © Copyright 2003 Sipex Corporation [ T ] +6V a) C2+ T GND 1 GND 2 b) C2- T -6V Ch1 2.00V Ch2 2.00V M 1.00µs Ch1 5.48V Figure 15. Charge Pump Waveforms VCC = +5V C4 +5V + C1 + C2 – –5V – + – + – VDD Storage Capacitor VSS Storage Capacitor C3 –5V Figure 16. Charge Pump — Phase 3 VCC = +5V C4 +10V C1 + C2 – + – – + + – VDD Storage Capacitor VSS Storage Capacitor C3 Figure 17. Charge Pump — Phase 4 R RSS R RC C SW2 SW2 SW1 SW1 C CSS DC Power Source Device Under Test Figure 18. ESD Test Circuit for Human Body Model Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers 12 © Copyright 2003 Sipex Corporation PACKAGE: PLASTIC SHRINK SMALL OUTLINE (SSOP) E H D A Ø e B A1 L DIMENSIONS (Inches) Minimum/Maximum (mm) Rev. 6/30/03 16–PIN 20–PIN A 0.068/0.078 (1.73/1.99) 0.068/0.078 (1.73/1.99) A1 0.002/0.008 (0.05/0.21) 0.002/0.008 (0.05/0.21) B 0.010/0.015 (0.25/0.38) 0.010/0.015 (0.25/0.38) D 0.239/0.249 (6.07/6.33) 0.278/0.289 (7.07/7.33) E 0.205/0.212 (5.20/5.38) 0.205/0.212 (5.20/5.38) e 0.0256 BSC (0.65 BSC) 0.0256 BSC (0.65 BSC) H 0.301/0.311 (7.65/7.90) 0.301/0.311 (7.65/7.90) L 0.022/0.037 (0.55/0.95) 0.022/0.037 (0.55/0.95) Ø 0°/8° (0°/8°) 0°/8° (0°/8°) SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers 13 © Copyright 2003 Sipex Corporation PACKAGE: PLASTIC DUAL–IN–LINE (NARROW) E1 E D1 = 0.005" min. (0.127 min.) A1 = 0.015" min. (0.381min.) D A = 0.210" max. (5.334 max). C A2 e = 0.100 BSC (2.540 BSC) B1 B Ø L eA = 0.300 BSC (7.620 BSC) ALTERNATE END PINS (BOTH ENDS) DIMENSIONS (Inches) Minimum/Maximum (mm) 16–PIN 18–PIN A2 0.115/0.195 (2.921/4.953) 0.115/0.195 (2.921/4.953) B 0.014/0.022 (0.356/0.559) 0.014/0.022 (0.356/0.559) B1 0.045/0.070 (1.143/1.778) 0.045/0.070 (1.143/1.778) C 0.008/0.014 (0.203/0.356) 0.008/0.014 (0.203/0.356) 0.780/0.800 0.880/0.920 (19.812/20.320) (22.352/23.368) D Rev. 6/30/03 E 0.300/0.325 (7.620/8.255) 0.300/0.325 (7.620/8.255) E1 0.240/0.280 (6.096/7.112) 0.240/0.280 (6.096/7.112) L 0.115/0.150 (2.921/3.810) 0.115/0.150 (2.921/3.810) Ø 0°/ 15° (0°/15°) 0°/ 15° (0°/15°) SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers 14 © Copyright 2003 Sipex Corporation PACKAGE: PLASTIC SMALL OUTLINE (SOIC) (WIDE) E H D A Ø e B A1 L DIMENSIONS (Inches) Minimum/Maximum (mm) Rev. 6/30/03 16–PIN 18–PIN A 0.090/0.104 (2.29/2.649) 0.090/0.104 (2.29/2.649)) A1 0.004/0.012 (0.102/0.300) 0.004/0.012 (0.102/0.300) B 0.013/0.020 (0.330/0.508) 0.013/0.020 (0.330/0.508) D 0.398/0.413 (10.10/10.49) 0.447/0.463 (11.35/11.74) E 0.291/0.299 (7.402/7.600) 0.291/0.299 (7.402/7.600) e 0.050 BSC (1.270 BSC) 0.050 BSC (1.270 BSC) H 0.394/0.419 (10.00/10.64) 0.394/0.419 (10.00/10.64) L 0.016/0.050 (0.406/1.270) 0.016/0.050 (0.406/1.270) Ø 0°/8° (0°/8°) 0°/8° (0°/8°) SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers 15 © Copyright 2003 Sipex Corporation PACKAGE: PLASTIC SMALL OUTLINE (SOIC) (NARROW) E H h x 45° D A Ø e B A1 L DIMENSIONS (Inches) Minimum/Maximum (mm) Rev. 6/30/03 16–PIN A 0.053/0.069 (1.346/1.748) A1 0.004/0.010 (0.102/0.249) B 0.013/0.020 (0.330/0.508) D 0.386/0.394 (9.802/10.000) E 0.150/0.157 (3.802/3.988) e 0.050 BSC (1.270 BSC) H 0.228/0.244 (5.801/6.198) h 0.010/0.020 (0.254/0.498) L 0.016/0.050 (0.406/1.270) Ø 0°/8° (0°/8°) SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers 16 © Copyright 2003 Sipex Corporation PACKAGE: PLASTIC THIN SMALL OUTLINE (TSSOP) DIMENSIONS in inches (mm) Minimum/Maximum Symbol D e 14 Lead 16 Lead 20 Lead 24 Lead 28 Lead 38 Lead 0.193/0.201 0.193/0.201 0.252/0.260 0.303/0.311 0.378/0.386 0.378/0.386 (4.90/5.10) (4.90/5.10) (6.40/6.60) (7.70/7.90) (9.60/9.80) (9.60/9.80) 0.026 BSC (0.65 BSC) 0.026 BSC (0.65 BSC) 0.026 BSC (0.65 BSC) 0.026 BSC (0.65 BSC) 0.026 BSC 0.020 BSC (0.65 BSC) (0.50 BSC) e 0.126 BSC (3.2 BSC) 0.252 BSC (6.4 BSC) 1.0 OIA 0.169 (4.30) 0.177 (4.50) 0.039 (1.0) 0’-8’ 12’REF e/2 0.039 (1.0) 0.043 (1.10) Max D 0.033 (0.85) 0.037 (0.95) 0.007 (0.19) 0.012 (0.30) 0.002 (0.05) 0.006 (0.15) (θ2) 0.008 (0.20) 0.004 (0.09) Min 0.004 (0.09) Min Gage Plane 0.010 (0.25) (θ3) 0.020 (0.50) 0.026 (0.75) (θ1) 1.0 REF Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers 17 © Copyright 2003 Sipex Corporation ORDERING INFORMATION Model Temperature Range Package Type SP3222BCA ............................................. 0˚C to +70˚C .......................................... 20-Pin SSOP SP3222BCP ............................................. 0˚C to +70˚C ............................................ 18-Pin PDIP SP3222BCT ............................................. 0˚C to +70˚C ........................................ 18-Pin WSOIC SP3222BCY ............................................. 0˚C to +70˚C ........................................ 20-Pin TSSOP SP3222BEA ............................................ -40˚C to +85˚C ........................................ 20-Pin SSOP SP3222BEP ............................................ -40˚C to +85˚C .......................................... 18-Pin PDIP SP3222BET ............................................ -40˚C to +85˚C ...................................... 18-Pin WSOIC SP3222BEY ............................................ -40˚C to +85˚C ...................................... 20-Pin TSSOP SP3232BCA ............................................. 0˚C to +70˚C .......................................... 16-Pin SSOP SP3232BCP ............................................. 0˚C to +70˚C ............................................ 16-Pin PDIP SP3232BCT ............................................. 0˚C to +70˚C ........................................ 16-Pin WSOIC SP3232BCN ............................................. 0˚C to +70˚C ......................................... 16-Pin nSOIC SP3232BCY ............................................. 0˚C to +70˚C ........................................ 16-Pin TSSOP SP3232BEA ............................................ -40˚C to +85˚C ........................................ 16-Pin SSOP SP3232BEP ............................................ -40˚C to +85˚C .......................................... 16-Pin PDIP SP3232BET ............................................ -40˚C to +85˚C ...................................... 16-Pin WSOIC SP3232BEN ............................................ -40˚C to +85˚C ....................................... 16-Pin nSOIC SP3232BEY ............................................ -40˚C to +85˚C ...................................... 16-Pin TSSOP Please consult the factory for pricing and availability on a Tape-On-Reel option. Corporation ANALOG EXCELLENCE Sipex Corporation Headquarters and Sales Office 233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600 Sales Office 22 Linnell Circle Billerica, MA 01821 TEL: (978) 667-8700 FAX: (978) 670-9001 e-mail: [email protected] Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers 18 © Copyright 2003 Sipex Corporation