STMICROELECTRONICS STGD3NB60ST4

STGD3NB60S

N-CHANNEL 3A - 600V DPAK
Power MESH IGBT
PRELIMINARY DATA
TYPE
STGD3NB60S
■
■
■
■
■
V CES
V CE(sat )
IC
600 V
< 1.5 V
3 A
HIGH INPUT IMPEDANCE
(VOLTAGE DRIVEN)
VERY LOW ON-VOLTAGE DROP (Vcesat)
HIGH CURRENT CAPABILITY
OFF LOSSES INCLUDE TAIL CURRENT
SURFACE-MOUNTING DPAK (TO-252)
POWER PACKAGE IN TAPE & REEL
(SUFFIX ”T4”)
3
1
DPAK
TO-252
(Suffix ”T4”)
DESCRIPTION
Using the latest high voltage technology based
on a patented strip layout, STMicroelectronics
has designed an advanced family of IGBTs, the
PowerMESH
IGBTs,
with
outstanding
perfomances. The suffix ”S” identifies a family
optimized to achieve minimum on-voltage drop
for low frequency applications (<1kHz).
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
■ LIGHT DIMMER
■ STATIC RELAYS
■ MOTOR CONTROL
ABSOLUTE MAXIMUM RATINGS
Symb ol
Value
Un it
V CES
Collector-Emitter Voltage (VGS = 0)
Parameter
600
V
V ECR
Reverse Battery Protection
20
V
V GE
G ate-Emitter Voltage
± 20
V
o
IC
Collector Current (continuous) at Tc = 25 C
6
A
IC
Collector Current (continuous) at Tc = 100 C
o
3
A
24
A
40
W
0.32
W /o C
I CM (•)
P tot
Collector Current (pulsed)
o
T otal Dissipation at Tc = 25 C
Derating Factor
T s tg
Tj
Storage T emperature
Max. Operating Junction Temperature
-65 to 150
o
C
150
o
C
(•) Pulse width limited by safe operating area
June 1999
1/8
STGD3NB60S
THERMAL DATA
R thj -case
R thj -amb
R thc-sink
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Thermal Resistance Case-sink
Max
Max
T yp
o
3.125
100
1.5
C/W
C/W
o
C/W
o
ELECTRICAL CHARACTERISTICS (Tj = 25 oC unless otherwise specified)
OFF
Symbo l
Parameter
Test Con ditions
Collector-Emitt er
Breakdown Voltage
I C = 250 µA
I CES
Collector cut-off
(V GE = 0)
V CE = Max Rating
V CE = Max Rating
IGES
Gate-Emitter Leakage
Current (VCE = 0)
V GE = ± 20 V
V BR(CES)
V GE = 0
Min.
Typ.
Max.
600
Unit
V
10
100
µA
µA
± 100
nA
Max.
Unit
5
V
1.2
1
1.5
V
V
Min.
Typ.
Max.
Unit
1.7
2.5
S
V GE = 0
255
30
5.6
pF
pF
pF
V GE = 15 V
18
5.4
5.5
nC
nC
nC
T j = 25 oC
T j = 125 o C
V CE = 0
ON (∗)
Symbo l
V GE(th)
V CE(SAT )
Parameter
Test Con ditions
Gate Threshold
Voltage
V CE = V GE
IC = 250 µA
Collector-Emitt er
Saturation Voltage
V GE = 15 V
V GE = 15 V
IC = 3 A
IC = 1 A
Min.
Typ.
2.5
DYNAMIC
Symbo l
gf s
Parameter
Test Con ditions
Forward
Transconductance
V CE =25 V
IC = 3 A
C i es
C o es
C res
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V CE = 25 V
f = 1 MHz
QG
Q GE
Q GC
Total G ate Charge
Gate-Emitter Charge
Gate-Collector Charge
V CE = 480 V
Latching Current
V clamp = 480 V
T j = 150 o C
I CL
IC = 3 A
R G =1kΩ
12
A
SWITCHING ON
Symbo l
t d(on)
tr
(di/dt) on
Eo n
2/8
Parameter
Test Co nditions
Min .
T yp.
Max.
Unit
Delay Time
Rise Time
V CC = 480 V
V GE = 15 V
IC = 3 A
R G = 1kΩ
170
540
ns
ns
Turn-on Current Slope
V CC = 480 V
R G = 1kΩ
T j = 125 o C
IC = 3 A
V GE = 15 V
30
A/µs
300
µJ
Turn-on Switching
Losses
STGD3NB60S
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING OFF
Symbo l
Parameter
Test Con ditions
Min.
Typ.
Max.
Unit
tc
t r (v off )
t d (off)
tf
E o ff(**)
Cross-O ver Time
V CC = 480 V
Off Voltage Rise Time R GE = 1 kΩ
Delay Time
Fall T ime
Turn-off Switching Loss
IC = 3 A
V GE = 15 V
1.8
1.0
3.4
0.72
1.15
µs
µs
µs
µs
mJ
tc
t r (v off )
t d (off)
tf
E o ff(**)
Cross-O ver Time
V CC = 480 V
Off Voltage Rise Time R GE = 10 Ω
Delay Time
T j = 125 o C
Fall T ime
Turn-off Switching Loss
IC = 3 A
V GE = 15 V
2.8
1.45
3.6
1.2
1.8
µs
µs
µs
µs
mJ
(•) Pulse width limited by max. junction temperature
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(**)Losses Include Also The Tail (Jedec Standardization)
Thermal Impedance
3/8
STGD3NB60S
Output Characteristics
Transfer Characteristics
Transconductance
Collector-Emitter On Voltage vs Temperature
Collector-Emitter On Voltage vs Collector Current
Gate Threshold vs Temperature
4/8
STGD3NB60S
Normalized Breakdown Voltage vs Temperature
Capacitance Variations
Gate Charge vs Gate-Emitter Voltage
Total Switching Losses vs Gate Resistance
Total Switching Losses vs Temperature
Total Switching Losses vs Collector Current
5/8
STGD3NB60S
Switching Off Safe Operatin Area
Fig. 1: Gate Charge test Circuit
Fig. 3: Switching Waveforms
6/8
Fig. 2: Test Circuit For Inductive Load Switching
STGD3NB60S
TO-252 (DPAK) MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
2.2
2.4
0.086
0.094
A1
0.9
1.1
0.035
0.043
A2
0.03
0.23
0.001
0.009
B
0.64
0.9
0.025
0.035
B2
5.2
5.4
0.204
0.212
C
0.45
0.6
0.017
0.023
C2
0.48
0.6
0.019
0.023
D
6
6.2
0.236
0.244
E
6.4
6.6
0.252
0.260
G
4.4
4.6
0.173
0.181
H
9.35
10.1
0.368
0.397
L2
0.8
L4
0.031
0.6
1
0.023
0.039
A1
C2
A
H
A2
C
DETAIL ”A”
L2
D
=
1
=
G
2
=
=
=
E
=
B2
3
B
DETAIL ”A”
L4
0068772-B
7/8
STGD3NB60S
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specific ation mentioned in this publication are
subjec t to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics
 1999 STMicroelectronics – Printed in Italy – All Rights Reserved
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8/8
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.