STPIC6C595 POWER LOGIC 8-BIT SHIFT REGISTER ■ ■ ■ ■ ■ ■ ■ LOW RDS(on): 4Ω TYP 30mJ AVAILANCHE ENERGY EIGHT 100mA DMOS OUTPUTS 250mA CURRENT LIMIT CAPABILITY 33V OUTPUT CLAMP VOLTAGE DEVICE ARE CASCADABLE LOW POWER CONSUMPTION DESCRIPTION This STPIC6C595 is a monolithic, medium-voltage, low current power 8-bit shift register designed for use in systems that require relatively moderate load power such as LEDs. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids, and other low-current or medium-voltage loads. The device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage register clock (SRCK) and the register clock (RCK), respectively. The device transfers data out the serial output (SER OUT) port on the rising edge of SRCK. The storage register transfers data to the output buffer when shift register clear (CLR) is high. When CLR is low, the input shift register is cleared. When output enable (G) is held high, all data in the output buffer is held low and all drain output are off. When G is held low, data from the storage register is transparent to the output buffer. When data in the output SOP TSSOP buffers is low, the DMOS transistor outputs are off. When data is high, the DMOS transistor outputs have sink-current capability. The SER OUT allows for cascading of the data from the shift register to additional devices. Output are low-side, open-drain DMOS transistors with output ratings of 33V and 100mA continuous sink-current capability. Each output provides a 250 mA maximum current limit at TC = 25°C. The current limit decreases as the junction temperature increases for additional device protection. The device also provides up to 1.5KV of ESD protection when tested using the human-body model and 200V machine model. The STPIC6C595 is characterized for operation over the operating case temperature range of -40°C to 125°C. ORDERING CODES Type Package Comments STPIC6C595M STPIC6C595MTR STPIC6C595TTR SO-16 (Tube) SO-16 (Tape & Reel) TSSOP16 (Tape & Reel) 50parts per tube / 20tube per box 2500 parts per reel 2500 parts per reel August 2002 1/14 STPIC6C595 Figure 1 : Logic Symbol And Pin Configuration Figure 2 : Input And Output Equivalent Circuits 2/14 STPIC6C595 ABSOLUTE MAXIMUM RATINGS Symbol VCC VI Parameter Value Logic Supply Voltage (See Note 1) Logic Input Voltage Range Unit 7 V -0.3 to 7 V VDS Power DMOS Drain to Source Voltage (See Note 2) 33 V IDS Continuous Source to Drain Diode Anode Current 250 mA IDS Pulsed Source to Drain Diode Anode Current (See Note 3) 500 mA ID Pulsed Drain Current, Each Output, All Output ON (TC=25°C) 250 mA ID Continuous Current, Each Output, All Output ON (TC=25°C) 100 mA ID Peak Drain Current Single Output (TC=25°C) (See Note 3) 250 mA EAS Single Pulse Avalanche Energy (See Figure11 and 12) 30 mJ IAS Avalanche Current (See Note 4 and figure 17) 200 mA Pd Continuous total dissipation (TC ≤ 25°C) 1087 mW Pd Continuous total dissipation (TC = 125°C) 217 mW TJ Operating Virtual Junction Temperature Range -40 to +150 °C TC Operating Case Temperature Range -40 to +125 °C Tstg Storage Temperature Range -65 to +150 °C TL Lead Temperature 1.6mm (1/16inch) from case for 10 seconds 260 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. THERMAL DATA Symbol Parameter Rthj-amb Thermal Resistance Junction-ambient Value Unit 115 °C/W RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min. Max. Unit 4.5 5.5 V VCC Logic Supply Voltage VIH High Level Input Voltage 0.85VCC VCC V VIL Low Level Input Voltage 0 0.15VCC V IDP 250 mA tsu Pulse Drain Output Current (TC=25°C, VCC=5V,all outputs ON) (see note 3, 5 and figure 15) Set-up Time, SER IN High Before SRCK ↑ (see Figure 6 and 8) 20 ns th Hold Time, SER IN High Before G ↑ (see Figure 6, 7, 8) 20 ns tW Pulse Duration (see Figure 8) 40 TC Operating Case Temperature -40 ns 125 °C 3/14 STPIC6C595 DC CHARACTERISTICS (VCC=5V, TC= 25°C, unless otherwise specified.) Symbol Parameter V(BR)DSX Drain-to-Source breakdown Voltage VSD Source-to-Drain Diode Forward Voltage High Level Output Voltage VOH SER OUT Test Conditions ID = 1mA Min. Typ. 33 37 IF = 100 mA 0.85 Max. Unit V 1.2 V IOH = -20 µA VCC = 4.5V 4.4 IOH = -4 mA VCC = 4.5V 4 IOH = 20 µA VCC = 4.5V 0.005 0.1 IOH = 4 mA VCC = 4.5V 0.3 0.5 V VCC = 5.5V VI = VCC VI = 0 1 µA 4.49 V 4.2 V VOL Low Level Output Voltage SER OUT IIH High Level Input Current IIL Low Level Input Current VCC = 5.5V -1 µA ICC Logic Supply Current VCC = 5.5V All outputs OFF or ON 20 200 µA Logic Supply Current at Frequency fSRCK = 5MHz CL = 30pF All outputs OFF (See Figg. 6, 18 and 19) VDS(on) = 0.5V IN = ID TC=85°C (See Note 5, 6, 7) 0.2 2 mA ICC(FRQ) IN IDSX RDS(on) Nominal Current Off-State Drain Current 90 V mA VDS = 30V VCC = 5.5V 0.3 5 µA VDS = 30V TC=125°C VCC =5.5V or 0V 0.6 8 µA Static Drain Source ON ID = 50mA State Resistance (See Note I = 50mA D 5, 6 and figg. 14, 16) TC=125°C ID = 100mA VCC = 4.5V 4.5 6 Ω VCC = 4.5V 6.5 9 Ω VCC = 4.5V 4.5 6 Ω Max. Unit SWITCHING CHARACTERISTICS (VCC=5V, TC= 25°C, unless otherwise specified.) Symbol Parameter tr Propagation Dealy Time, High to Low Level Output from G Propagation Dealy Time, Low to High Level Output from G Rise Time, Drain Output tPHL tPLH Test Conditions CL = 30pF ID = 75mA (See Figg. 4, 5, 6,7, 20) Min. Typ. 80 ns 130 ns 60 ns tf Fall Time, Drain Output 50 ns tpd propagation Delay Time 20 ns ta Reverse Recovery Current Rise Time Reverse Recovery Time 39 ns 115 ns trr IF = 100mA di/dt = 10A/µs (See Note 5, 6 and Fig. 9 and 10) Note 1: All Voltage value are with respect to GND Note 2: Each power DMOS source is internally connected to GND Note 3: Pulse duration ≤ 100µs and duty cycle ≤ 2% Note 4: Drain Supply Voltage = 15V, starting junction temperature (TJS) = 25°C. L = 1.5H and IAS = 200mA (See Fig. 11 and 12) Note 5: Technique should limit TJ - TC to 10°C maximum Note 6: These parameters are measured with voltage sensing contacts separate from the current-carrying contacts. Note 7: Nominal Current is defined for a consistent comparison between devices from different sources. It is the current that produces a voltage drop of 0.5V at TC = 85°C. 4/14 STPIC6C595 Figure 3 : Logic Diagram 5/14 STPIC6C595 Figure 4 : Typical Operation Mode Test Circuits Figure 5 : Typical Operation Mode Waveforms NOTE: A) The word generator has the following characteristics: tr ≤ 10ns, tf ≤ 10ns, tW = 300ns, pulse repetition rate (PRR) = 5KHz, ZO = 50Ω B) CL includes probe and jig capacitance. 6/14 STPIC6C595 Figure 6 : Typical Operation Mode Test Circuits Figure 7 : Switching Time Waveform Figure 8 : Input Setup And Hold Waveform NOTE: A) The word generator has the following characteristics: tr ≤ 10ns, tf ≤ 10ns, tW = 300ns, pulse repetition rate (PRR) = 5KHz, ZO = 50Ω B) CL includes probe and jig capacitance. 7/14 STPIC6C595 Figure 9 : Reverse Recovery Current Test Circuits Figure 10 : Source Drain Diode Waveform NOTE: A) The VGG amplitude and RG are adjusted for di/dt = 10A/µs. A VGG double-pulse trainn is used to set IF = 0.1A. where t1 = 10µs, t2 = 7µs and t3 = 3µs B) The Drain terminal under test is connected to the TPK test point. All other terminals are connected together and connected to the TPA test point. C) IRM = maximum recovery current. 8/14 STPIC6C595 Figure 11 : Single Pulse Avalanche Energy Test Circuits Figure 12 : Single Pulse Avalanche Energy Waveform NOTE: A) The word generator has the following characteristics: tr ≤ 10ns, tf ≤ 10ns, ZO = 50Ω B) Input pulse duration, tW is increased until peak current IAS = 200 mA. Energy test level is defined as EAS = (IAS x V(BR)DSX x tAV)/2 = 30mJ. 9/14 STPIC6C595 TYPICAL PERFORMANCE CHARACTERISTICS (unless otherwise specified Tj = 25°C) Figure 13 : Max Continuous Drain Current vs Number of Outputs Conducting Simultaneously Figure 16 : Static Drain-Source ON-State Resistance vs Logic Supply Voltage Figure 14 : Static Drain-Source ON-State Resistance vs Drain Current Figure 17 : Peak Avalanche Current vs Time Duration of Avalanche Figure 15 : Maximum Peak Drain Current vs Number of Outputs Conducting Simultaneously Figure 18 : Supply Current vs Frequency 10/14 STPIC6C595 Figure 19 : Supply Current vs Supply Voltage Figure 21 : Normalized Junction to Ambient Thermal Resistance Figure 20 : Switching Time vs Case Temperature 11/14 STPIC6C595 SO-16 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45˚ (typ.) D 9.8 E 5.8 10 0.385 6.2 0.228 0.393 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.62 0.024 8 ˚ (max.) PO13H 12/14 STPIC6C595 TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0˚ L 0.45 A 0.60 0.0256 BSC 8˚ 0˚ 0.75 0.018 8˚ 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 13/14 STPIC6C595 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for t consequences of use of such information nor for any infringement of patents or other rights of third parties which may result fro its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specificatio mentioned in this publication are subject to change without notice. This publication supersedes and replaces all informatio previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES 14/14