9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE FEATURES SY10H600 SY100H600 DESCRIPTION ■ 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ ECL and TTL enable inputs ■ Dual supply ■ 3.5ns max. D to Q ■ PNP TTL inputs for low loading ■ Choice of ECL compatibility: MECL 10KH (10Hxxx) or 100K (100Hxxx) ■ Fully compatible with Motorola MC10H/100H600 ■ Available in 28-pin PLCC package The SY10/100H600 are 9-bit, dual supply TTL-to-ECL translators. Devices in the Micrel-Synergy 9-bit translator series utilize the 28-lead PLCC for optimal power pinning, signal flow-through and electrical performance. The H600 features both ECL and TTL logic enable controls for maximum flexibility. The 10H version is compatible with MECL 10KH ECL logic levels. The 100H version is compatible with 100K levels. D0 D2 D1 VCCT D3 PIN CONFIGURATION D5 D4 BLOCK DIAGRAM ENECL ENTTL D3 TTL D4 D5 D6 D7 D8 Q2 18 27 17 28 1 14 3 13 4 12 5 ECL Q5 15 2 Q3 Q4 16 TOP VIEW PLCC 6 7 8 9 Q0 Q1 VCCE VCCO Q2 VCCO Q3 10 11 Q5 Q4 D2 Q1 26 VCCO Q6 VEE D1 D6 D7 D8 GND ENTTL NC ENECL Q0 Q8 Q7 D0 25 24 23 22 21 20 19 PIN NAMES Q6 Pin Q7 Q8 Function GND TTL Ground (0V) VCCE ECL VCC (0V) VCCO ECL VCC (0V) — Outputs VCCT TTL Supply (+5.0V) VEE ECL Supply (–5.2/–4.5V) D0–D8 Data Inputs (TTL) Q0–Q8 Data Outputs (ECL) ENECL Enable Control (ECL) ENTTL Enable Control (TTL) Rev.: D 1 Amendment: /0 Issue Date: February, 1998 SY10H600 SY100H600 Micrel TRUTH LOGIC DIAGRAM TABLE ENECL ENTTL D Q H X H H H X L L X H H H X H L L L L X L DC LOGIC ELECTRICAL DIAGRAMCHARACTERISTICS VCCT = 5.0V ± 10%; VEE = –4.75V to –5.5V (10H Version); VEE = –4.2V to –5.5V (100H Version) TA = 0°C Symbol Parameter Power Supply Current, ECL IEE ICCH ICCL 10H 100H Power Supply Current, TTL TA = +25°C TA = +85°C Min. Max. Min. Max. Min. Max. — — 125 122 — — 125 123 — — 125 132 — — 48 50 — — 48 50 — — 48 50 Unit Condition mA — mA — Unit Condition ns 50Ω to –2.0V ns 50Ω to –2.0V AC LOGIC ELECTRICAL DIAGRAMCHARACTERISTICS VCCT = 5.0V ± 10%; VEE = –4.75V to –5.5V (10H Version); VEE = –4.2V to –5.5V (100H Version) TA = 0°C Symbol TA = +25°C TA = +85°C Parameter Min. Max. Min. Max. Min. Max. tPLH tPHL Propagation Delay to Output D ENECL/ENTTL 1.4 1.8 3.0 3.7 1.5 1.9 3.2 3.9 1.7 2.0 3.5 4.1 tr tf Output Rise/Fall Time 20% to 80%, 80% to 20% 0.5 1.5 0.5 1.5 0.5 1.5 PRODUCT LOGIC DIAGRAM ORDERING CODE Ordering Code Package Type Operating Range SY10H600JC J28-1 Commercial SY10H600JCTR J28-1 Commercial SY100H600JC J28-1 Commercial SY100H600JCTR J28-1 Commercial 2 SY10H600 SY100H600 Micrel 28 LEAD PLCC (J28-1) Rev. 03 3 SY10H600 SY100H600 Micrel MICREL-SYNERGY TEL 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA + 1 (408) 980-9191 FAX + 1 (408) 914-7878 WEB http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. © 2000 Micrel Incorporated 4