TDA7297D 10W+10W DUAL BRIDGE AMPLIFIER 1 FEATURES Figure 1. Package ■ TECHNOLOGY BI20II WIDE SUPPLY VOLTAGE RANGE (6.5 - 18V) OUTPUT POWER 10+10W @ THD = 10%, RL = 8Ω, VCC = 13V MINIMUM EXTERNAL COMPONENTS – NO SVR CAPACITOR – NO BOOTSTRAP – NO BOUCHEROT CELLS – INTERNALLY FIXED GAIN STAND-BY & MUTE FUNCTIONS SHORT CIRCUIT PROTECTION ■ THERMAL OVERLOAD PROTECTIONE ■ ■ ■ ■ ■ PowerSO20 (SLUG UP) Table 1. Order Codes 2 Part Number Package TDA7297D PowerSO20 (SLUG UP) DESCRIPTION The TDA7297D is a dual bridge amplifier specially designed for Home Audio, Plasma TV, LCD TV applications. Figure 2. TEST AND APPLICATION CIRCUIT VCC +5V JP1 R1 47K R2 47K C3 0.22µF IN1 S-GND ST-BY 6 7 + 2 OUT1+ 5 OUT1- 19 OUT2+ 16 OUT2- C2 100nF C7 100nF 13 R3 10K 9 C4 10µF Vref C5 0.22µF IN2 MUTE C1 470µF 15 14 R4 10K 8 + + - C6 1µF 1 10 11 PW-GND 20 + D02AU1407 May 2004 REV. 1 1/11 TDA7297D Table 2. Absolute Maximum Ratings Symbol Parameter Value Unit Vs Supply Voltage 20 V IO Output Peak Current (internally limited) 2 A Ptot Total Power Dissipation (Tamb = 70°C 33 W Top Operating Temperature 0 to 70 °C -40 to 150 °C Value Unit 2.1 °C/W Tstg, Tj Storage and Junction Temperature Table 3. Thermal Data Symbol Rth j-case Parameter Thermal Resistance Junction-case Figure 3. PIN CONNECTION PW GND 20 1 PW GND OUT2+ 19 2 OUT1+ N.C. 18 3 N.C. N.C. 17 4 N.C. OUT2- 16 5 OUT1- VCC 15 6 VCC IN2- 14 7 IN1 SGND 13 8 MUTE N.C. 12 9 ST BY PW GND 11 10 D02AU1408 2/11 PW GND TDA7297D Table 4. Electrical Characteristcs (VCC = 13V, RL = 8Ω, f = 1KHz, Tamb = 25°C unless otherwise specified) Symbol VCC Iq Parameter Test Condition Supply Range Total Quiescent Current Typ. 6.5 RL = ∞ VOS Output Offset Voltage PO Output Power THD 10% Total Harmonic Distortion PO = 1W THD Min. 50 8.3 CT AMUTE Supply Voltage Rejection 120 mV 0.1 W 0.3 % 1 % 46 60 dB Mute Attenuation 60 80 dB 150 °C 31 32 Voltage Gain Matching Ri Input Resistance VTMUTE Mute Threshold VTST-BY St-by Threshold 3 mA Crosstalk Closed Loop Voltage Gain eN 65 dB GV IST-BY V 56 Thermal Threshold ∆GV 18 40 Tw f = 100Hz, VR =0.5V Unit 10 PO = 0.1W to 5W f = 100Hz to 15KHz SVR Max. Vo = -30dB A Curve f = 20Hz to 20KHz dB 0.5 dB 25 30 2.3 2.9 4.1 V 0.8 1.3 1.8 V 100 µA 500 µV µV St-by Current Total Output Noise Voltage 33 150 220 KΩ APPLICATIVE SUGGESTIONS STAND-BY AND MUTE FUNCTIONS 3.1 Microprocessor Application In order to avoid annoying "Pop-Noise" during Turn-On/Off transients, it is necessary to guarantee the right Stby and mute signals sequence.It is quite simple to obtain this function using a microprocessor (Fig. 4 and 5). At first St-by signal (from µP) goes high and the voltage across the St-by terminal (Pin 9) starts to increase exponentially. The external RC network is intended to turn-on slowly the biasing circuits of the amplifier, this to avoid "POP" and "CLICK" on the outputs. When this voltage reaches the St-by threshold level, the amplifier is switched-on and the external capacitors in series to the input terminals (C1, C3) start to charge. It's necessary to mantain the mute signal low until the capacitors are fully charged, this to avoid that the device goes in play mode causing a loud "Pop Noise" on the speakers. A delay of 100-200ms between St-by and mute signals is suitable for a proper operation. 3/11 TDA7297D Figure 4. Microprocessor Application VCC C1 0.22µF IN1 6 7 + 2 C5 470µF OUT1+ 5 OUT1- 19 OUT2+ 16 OUT2- 15 - ST-BY R1 10K 9 C2 10µF S-GND µP 13 Vref C3 0.22µF IN2 MUTE R2 10K 14 + + - 8 C4 1µF 1 10 PW-GND 11 - 20 + D02AU1409 Figure 5. Microprocessor Driving Signals +VS(V) +13V VIN (mV) VST-BY pin 9 1.8 1.3 0.8 VMUTE pin 8 4.1 2.9 2.3 Iq (mA) VOUT (V) OFF ST-BY 4/11 PLAY MUTE MUTE ST-BY OFF D02AU1411-Mod C6 100nF TDA7297D Figure 6. THD+N vs Output Power Figure 9. Frequency Response THD(%) L evel(d B r) 10 5 .00 0 0 5 4 .00 0 0 Vcc=13V 2 3 .00 0 0 Rl= 8ohm 1 V c c = 1 6 .5 V R l = 8 ohm Pou t = 1W 2 .00 0 0 F=1KHz 0.5 1 .00 0 0 f=5KHz 0 .0 0.2 -1 .00 0 0.1 -2 .00 0 0.05 f=1KHz -3 .00 0 0.02 0.01 100m -4 .00 0 200m 500m 1 2 5 10 20 -5 .00 0 10 100 1k Figure 7. THD+N vs Output Power 10 16 5 14 2 Vcc=11V 12 1 Rl= 8ohm 10 F=1KHz 0.5 f=5KHz Rl =8ohm F=1KHz 8 0.2 6 0.1 4 0.05 2 f=1KHz d=10% d=1% 0 0.02 0.01 100m 100k Figure 10. Output Power vs supply Voltage Po(W) THD(%) 10k freq uency (H z) 2 x Pout (W) 6 200m 500m 1 2x Pout (W) 2 5 9 10 11 12 13 14 15 16 10 11 Figure 11. Power Dissipation vs Pout THD(%) 10 5 Vcc=13V Rl= 8ohm 1 8 Vs (V) Figure 8. THD+N vs Frequency 2 7 10 Pdiss(W) Po = 5W 0.5 0.2 0.1 0.05 0.02 11 10 9 8 7 6 5 4 3 2 1 0 Vcc=13V Rl = 8 ohm F=1KHz 0 0.01 1 2 3 4 5 6 7 8 9 2xPout(W) 20 50 100 200 500 1k 2k 5k 10k Frequency (Hz) 5/11 TDA7297D Figure 12. Mute Attenuation vs. Vpin 8t Figure 14. Quiescent Curent vs. Supply Voltage Attenuation (dB) Iq (mA) 10 70 0 -10 65 -20 60 -30 55 -40 50 -50 -60 45 -70 40 -80 35 -90 30 -100 1 1.5 2 2.5 3 3.5 4 4.5 5 Vpin.6(V) Figure 13. Standard-By Attenuation vs Vpin. 9 10 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 Attenuation (dB) 0 0.2 0.4 0.6 0.8 1 1.2 1.4 Vpin.7 (V) 6/11 1.6 1.8 2 2.2 2.4 6 7 8 9 10 11 12 13 Vsupply(V) 14 15 16 17 18 TDA7297D Figure 15. PC Board Component Layout Sign GND Figure 16. Evaluation Board Top Layer Layout 7/11 TDA7297D Figure 17. Evaluation Board Bottom Layer Layout 8/11 TDA7297D Figure 18. PowerSO20 (SLUG UP) Mechanical Data & Package Dimensions DIM. A A2 A4 A5 a1 b c D (1) D1 D2 E E1 (1) E2 E3 e e3 G H h L N R S V mm TYP. MIN. 3.25 3 0.8 0.15 0.030 0.4 0.23 15.8 9.4 3.15 0.2 MAX. 3.5 3.3 1 0.25 -0.040 0.53 0.32 16 9.8 MIN. 0.128 0.118 0.031 0.006 0.0012 0.016 0.009 0.622 0.370 14.5 11.1 2.9 6.2 1.42 0.547 0.429 inch TYP. MAX. 0.138 0.124 0.130 0.039 0.008 0.010 -0.0016 0.021 0.012 0.630 0.385 0.039 0.570 0.437 0.114 0.244 0.050 0.056 0.450 0.004 0.625 0.043 0.043 1 13.9 10.9 5.8 1.12 1.27 11.43 0 15.5 0.228 0.044 0.1 0 15.9 0.61 1.1 1.1 0.031 10¡ (max) 0.8 0.6 OUTLINE AND MECHANICAL DATA 0.024 0¡ (min.) 8¡ (max.) 5¡ (min.) 7¡ (max.) PowerSO20 (SLUG UP) (1) ÒD and E1Ódo not include mold flash or protusions. - Mold flash or protusions shall not exceed 0.15mm (0.006Ó) - Critical dimensions: ÒEÓ,Òa1Ó,ÒeÓ and ÒGÓ. N H N E3 A2 b R A4 A5 A c V e D2 (x2) DETAIL A e3 E2 E M h x 45û 1 10 DETAIL A E2 E1 0.35 Gage Plane a1 S L -CSEATING PLANE G 20 D1 C (COPLANARITY) 11 PSO20DME D 0088529 C 9/11 TDA7297D Table 5. Revision History 10/11 Date Revision May 2004 1 Description of Changes First Issue TDA7297D Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. 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