TEA7088A LOW-RANGE PHONE DEDICATED CHIP . . . .. . RING - GENERATION OF 8 MELODY TONES (Including the 3 German Melody Tones) - 4 STEPS DIGITAL CONTROL ON THE AMPLIFIER OUTPUT LEVEL SPEECH - TRANSMIT GAINEXTERNALLY ADJUSTABLE - RECEIVINGGAINEXTERNALLYADJUSTABLE - AGCSLOPEEXTERNALLYPROGRAMMABLE - SOFTCLIPPING ON SENDING CHANNEL - RECEIVE AMPLIFIER FOR PIEZO OR ELECTRODYNAMIC TRANSDUCER - +6dB MODE ON RECEIVE CHANNEL - LINE POWER MANAGEMENT DIALING - DTMF GENERATOR - LOW DC MASK DURING MAKE PERIOD THROUGH MICROCONTROLLER SERIAL BUS INTERFACE MICROCONTROLLER INTERFACE - 1.79MHz CLOCK OR 3.58MHz OSCILLATOR INPUT MICROCONTROLLER POWER SUPPLY MICROCONTROLLER CONTROL INTERFACE INCLUDING SERIAL BUS LINE CURRENT EXTRACTOR FOR SUPPLY OF EXTERNAL PERIPHERALS DESCRIPTION The TEA7088A is a Telephone Analog Front End device, TAFE, which integrates the three basic functions of a standard telephone set : - Speech network, - DTMF generator, - Ringer generator on buzzer. A complete telephone set can be designed using TEA7088A associated with a low cost microcontroller. January 1998 SO28 (Plastic Package) ORDER CODE : TEA7088AFP PIN CONNECTIONS S OFT 1 28 DTMF RECIN 2 27 VREF SN 3 26 VRMC AGC 4 25 DCL MIC1 5 24 DATA MIC2 6 23 MSK GTR 7 22 OSC VCC 8 21 RI GND 9 20 P ON IVLS 10 19 RES VS 11 18 VRING VL 12 17 BUZ VMC 13 16 EAR+ GREC 14 15 EAR- 7088A-01.EPS . 1/17 TEA7088A SPEECH The speech network includes : - a low noise transmit channel suitable for any kind of microphone transducer. Softclipping on transmit line signal is provided by the chip. - a low noise receive channel with symmetrical outputs to be compatible with both piezoceramic and electrodynamic earpiece. An additional 6dB gain can be inserted in the receive channel through software control. - a line length gain control (AGC) with starting point of gain regulation fixed at 25mAline current ; slope of gain regulationis externallyadjustablewith one resistor.AGC can be removedby hardware (maximum gain flat) or by software (-2dB flat). The phone impedance and sidetone can be tuned through external networks. DTMF GENERATOR The onboard DTMF generator fullfils the CEPT requirements with an external single pole filter. RINGER Up to 8 different tones can be generated by the TEA7088Aringer. The digital volume control of the ringer can be performed through a specific command (4 steps). A ring indication signal is provided to the microcontroller by the TEA7088A.If more tones are requested the input RM/MSK allows to inject tones generated by the microcontroller. FURTHER ADVANTAGES The microcontroller power supply is provided by the TEA7088A.The power supply is specifically designed to copewitha longflash or a long groundkey duration. The TEA7088A is able to supply the necessary current to an external speakerphone circuit TEA7540 and loudspea ker amplifier TEA7532 without any additional circuitry. Line current and reset indications are provided to the microcontroller by the TEA7088A. The microcontroller drives the TEA7088A through a 2 wires serial interface. Name SOFT RECIN SN AGC MIC1 MIC2 GTR VCC GND IVLS VS VL V MC GREC EAREAR+ BUZ VRING RES PON RI OSC MSK DATA DCL VRMC VREF DTMF 2/17 Pin N° 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Description Transmit Softclipping Time Constant Receiving Input Sidetone Network Input Line Current Regulation Stop Value Microphone Input Microphone Input Transmit Gain Adjustment Transmit and Receive Part Power Supply Ground Line Current Source Power Supply Voltage Stabilizer Positive Line Unregulated Microcontroller Power Supply Receive Gain Adjustment Negative Earphone Output Positive Earphone Output Ringer Buzzer Output Ring Power Supply Reset Power On Ring Indicator Oscillator Input Mask, Ring Melody Input Data Input Data Clock Input Microcontroller Stabilized Power Supply Reference Voltage (VCC/2) DTMF Filter 7088A-01.TBL PIN DESCRIPTION 7088A-02.EPS C14 R17 R14 R12 C3 R8 R4 C3 Microphone C11 R11 Ea rphone To Line MIC2 MIC1 GTR SOFT EAR- EAR+ GREC VREF VS R10 6 5 7 1 15 16 14 27 11 VCC VIN R25 -1 Earphone Amplifier VREF 12 4 AGC AGC KVL VSTAB VL VCC DTMF 28 8 C8 MUTE R13 9 GND AGC SIDETONE & AGC VREF 2 3 SN 20 To P RES 19 PON & RESET CONTROL PON VCC 21 RI To P 22 OSC OSCILLATOR P INTERFACE DTMF GENERATOR RING GENERATOR MUTE CONTROL 1.79MHz EXT. CLOCK /2 TEA7088A BUZZER AMPLIFIER RING POWER SUPPLY 3.58MHz RESONATOR LOGIC POWER SUPPLY C12 SERIAL REGULATOR RECIN LINE CURRENT POWER SUPPLY 10 IVLS C30 Sidetone VMC BUZ VRING VRMC 24 DATA 25 DCL 23 MSK 13 17 26 18 To P C10 C15 C16 R40 + R15 C1 To Line TEA7088A Figure 1 : Block Diagram 3/17 TEA7088A ELECTRICAL CHARACTERISTICS The block diagram is given in Figure 1. The values of the different networks used in this datasheet are defined as followed : - The return loss is adjusted by R10 of 600Ω. - The transmit adjust gain network R8 is calculated in order to have a gain of 46dB typical with ILS = 22mA. - The sidetone network ZST is set to be lower than 20dB (Vear/Vmic) on a 600Ω load on line. - The DC characteristics are set by a resistor of 82kΩ between VL and VS. Symbol Parameter Authorized Voltage on Pin 2 - RECIN Pin 3 - SN Pin 8 - VCC Pin 10 - IVLS Pin 12 - VL Pin 13 - VMC Pin 17 - BUZ Pin 18 - VRING Pin 19 - RES Pin 20 - PON Pin 21 - RI Pin 22 - OSC Pin 23 - MSK Pin 24 - DATA Pin 25 - DCL Pin 26 - VRMC Value Unit 13 12 11 6 12 6 VRING +0.3, GND -0.3 27 VRMC +0.3, GND -0.3 VRMC +0.3, GND -0.3 VRMC +0.3, GND -0.3 VRMC +0.3, GND -0.3 VRMC +0.3, GND -0.3 VRMC +0.3, GND -0.3 VRMC +0.3, GND -0.3 5 V V V V V V V V V V V V V V V V 120 mA ILINE Line Current IRING Ring Current 50 mA Toper Operating Temperature -25, +70 °C Tstg Storage Temperature -55, +150 °C Tj Junction Temperature -25, +150 °C DC Characteristics (Tamb = 25°C ; Logic in Default Mode unless otherwise noted) Symbol VL Parameter Line Voltage - In Speech and DTMF Mode - In Mask Mode Test Conditions Test 1 IL = 22mA IL = 90mA IL = 22mA Min. Typ. Max. Unit 4 6.7 4.6 7.5 5.2 8.3 3 V V V IVRMC Stabilized Supply Voltage - Output Current VRMC - Output Voltage IRMC = 1.5mA 3.15 3.35 IVMC Unstabilized Supply Voltage - Start up Current - Output Current Test 1, IL = 22mA VMC = 2.5V, IVRMC = 1.5mA VMC = 3.6V, IVRMC = 0mA 10 15 3 Line Current Source Supply Test 1, VLS = 0V ; VMC = 3.6V IL = 22mA IL = 90mA 10 67 14 75 ILS Test 1, IL = 22mA 1.5 The line current source supply depends of IL : - For IL < 20mA : ILS (mA) = 0.765 x IL (mA) - 1.4mA - For IL > 20mA : ILS (mA) = 0.92 x IL (mA) - 4.5mA On this pin the maximum output level is : V10 = V12 - (1.2 + 10 x ILS) and V10 < 6V 4/17 mA 3.55 V mA mA 18 82 mA mA 7088A-02.TBL Absolute Maximum Ratings TEA7088A ELECTRICAL SPECIFICATIONS (continued) AC Characteristics (Tamb = 25°C ; RL = 600Ω ; Logic in Default Mode unless otherwise noted) Symbol R1 Parameter Test Conditions Min. Typ. Max. 17 Test 2, IL = 22mA f = 300/3400Hz, V AC = -10dBV Return Loss Unit dB Transmit Characteristics (Tamb = 25°C ; RL = 600Ω ; f = 1kHz ; Logic in Default Mode unless otherwise noted) Symbol Gtx Parameter Test Conditions Min. Typ. Max. Unit Test 3, Vm = -55dBV R8 = 1.3kΩ, R25 = 3.9kΩ IL = 22mA IL = 90mA 45 38 46 40 47 42 dB dB Microphone Input Impedance between MIC1 & MIC2 32 40 48 kΩ Noise Test 3, 2kΩ on microphone inputs, IL = 22mA Microphone Mute Test 3, Vm = -55dBV, IL = 22mA Soft Clipping - Distortion - Maximum Level on Line Test 3, IL = 22mA, see Figure 2 Vm = -41dBV Vm = -34dBV Microphone Gain Gtxl Gtxs Zmic Ntx Mmic Dtx VL Max. Figure 2 : Softclipping -10 R25 (Ω) = -5 -2 1 10 Vmicrophon e pe a k (mV) 100 7088A-03.EPS VAC peak on line (V) -15 1 Figure 3 8 4 VAC pe a k 20 40 60 IL (mA) 80 10 0 7088A-04.EPS VL (Pin 12) (V) 2 1.5 % Vp 300 ISL − 5mA (R25 > 2.6kΩ) For line current lower than ILL or higher than ISL, The transmit and receive gains have a constant value. AGC can be inhibited also through MCU code ”010100”. In this case Tx and Rx gains are fixed 2dB lower than the maximum gain. VAC pe a k 6 0 0 dB If no resistor or a resistor higher than 300kΩ is connected on Pin AGC, the gain is constant and equal to Gtxl and Grxl. ±0.5dB. 10 2 60 R10// RL + R11 Gtxl = 20log 820 ⋅ R8 // 50kΩ The AGC variation is programmed with one resistor connected on Pin AGC. ISL is the line current at which the gain must be decreased by 6dB. Thres hold Level 0.1 dBmp The maximum gain Gtl is adjustable between 44 and 56dB with R8 : 10 0.1 -76 The minimum saturation voltage of the TEA7088A respect to ground is 2.2V. On long line, when the voltage over TEA7088A is low, the softclipping function automatically limits the AC dynamic to avoid to reach the 2.2V limit on TEA7088A respect to ground. 5/17 TEA7088A ELECTRICAL SPECIFICATIONS (continued) Receive Characteristics (Tamb = 25°C ; RL = 660Ω ; f = 1kHz) Symbol Eff GRXl GRXs Dr Nr Vear (010010) Zout Parameter Sidetone Eff = (Vear+ - Vear -) /Vm Gain in Symmetric Mode Grx = (Vear+ - Vear-) / VL Test Conditions Test 3, Vm = -55dBV, IL = 22mA, R14 = 10kΩ, R17 = 15kΩ Test 6, VL = -14.5dBV, R14 = 10kΩ, R17 = 15kΩ, R25 = 3.9kΩ IL = 22mA IL = 90mA Test 4, Rear = 300Ω, IL = 22mA Vear = -12dBV Vear = -8dBV Test 4, IL = 22mA IL = 22mA, VL = -14.5dBV Distortion Noise Earphone Mute Min. 0.7 -6 Typ. Max. 22.5 Unit dB 1.7 -4 2.7 -2 dB dB 2 5 % % dBmp dB 20 Ω -76 60 Output Impedance Automatic Gain Control Inhibition (Tamb = 25°C ; RL = 660Ω ; f = 1kHz no AGC mode selected) Symbol Gtp Grp Parameter Test Conditions Test 3 & Test 4, IL = 22 to 90mA Code : 010100 Vm = -55dBV VL = -14.5dBV Transmit Gain Receive Gain Min. Typ. Max. Unit Gtxl -3 Grxl -3 Gtxl -2 Grxl -2 Gtxl -1 Grxl -1 dB dB Min. Typ. Max. Unit 1 20 9 1.2 V V mA 3.75 4.05 100 V ms V 13 5.6 2.8 1.4 13.5 6.7 3.4 1.8 VRMS VRMS VRMS VRMS Ring Characteristics (Tamb = 25°C) Symbol VThri ON VThri OFF ICRing VRMC tRON VRING Vbout Parameter Ringing Threshold Voltage Internal Consumption in Ring Mode Microprocessor Supply Voltage Rise Time Internal Zener Voltage Buzzer Vout Freq = 1312Hz Freq. Code 001111 Test Conditions Test 5 a/b RI high (see Figure 4) Rl low (see Figure 4) VRING = 10V 15 5 3.45 IRING = 10mA 27 VRING = Level Level Level Level 27Vzener (see Figure 5) Code (011111) Code (011110) Code (011101) Code (011100) Figure 4 : Ringer Hysteresis Ringer 12 4.4 2.2 1 Figure 5 : Ringer Output Waveform ON Ringer Status Ringer Threshold (VTHRI) 6/17 VON V 7088A-06.EPS VOFF 7088A-05.EPS OFF Vb o ut TEA7088A ELECTRICAL SPECIFICATIONS (continued) DTMF Generator (Tamb = 25°C ; RL = 660Ω) Symbol Parameter Test Conditions Min. Test 6 Pin Osc fclock = 1.79MHz oscillator off or Resonator : 3.58MHz oscillator on C13 =100nF, IL = 22mA - 0.4 Amf Tone Frequency Accuracy Llf Lhf Low Freq. Group Line Level High Freq. Group Line Level -10 -8 +1 Pmf Preemphasis HF/LF tDON tDOFF Rise Time Decay Time Cmf DTMF Confidence Tone : Earphone level (low freq.) Earphone level (high freq.) – - Unwanted Harmonics Level (see Figure 6) Typ. Max. Unit 0.4 % -8.5 -6.5 -7 -5 dBm dBm +2 +3 dB 5 5 ms ms 13 17 17 22 21 27 mV mV – – – – Figure 6 : Unwanted Harmonics Level in DTMF -30 -70 -90 100 1k 10k (Hz) 100k 1M 7088A-07.EPS Vline (dBm) -50 Figure 7 : Microcontroller Interface VRING VL 18 IS pe ech kIL VMC C10 47 F I (In Ring) VRMC (3.4V) 26 VREFI 5.6V C15 10 F P + LCD 7088A-08.EPS 13 Ba tte ry IS tart-u p 7/17 TEA7088A MICROCONTROLLER INTERFACE WITH TEA7088A All inputs can be driven by a Low level max. of 0.1 x VRMC and a high level min. of 0.9 x VRMC . Inputs MSK, DCL and DATA have internal pull-up resistors of 120kΩ and input OSC has a internal pull up of 240kΩ. All outputs can drive a ±1mA typical. Power Supply The microcontroller is power supplied by a 3.4V regulated supply (VRMC) and by an unregulated power supply (VMC). The two supplies are connected through a serial regulator.The unregulatedpower supply (VMC) has a DC voltageequal to: V12 - 0.6V and must be lower than 6V. It is also possible to connect a battery at Pin VMC and use the regulated output at Pin VRMC to supply a LCD driver. The current consumption on the serial regulator has a typical value of 60µA. Power ON (PON) The TEA7088Ageneratesa poweron signal (PON) as soon as the voltage on Pin VRMC is higher than 2.6V (0.75 x VRMC final) and the line current is present. Note : Du ri ng th e b re a k p e riod in t he loopdisconndect and Flash mode and during the exchange line break, the power ON signal goes to low level. Maximum delay for Pon decay edge after I Line goes to zero is 50ms (with C8 = 47µF, C11 = 1µF, C27 = 10µF). Reset The TEA7088Agenerates a rise edge Reset signal as soon as the logic power supply is higher than 2.6V (0.75 x VRMC final). RESET remains high until VRMC decreases below 2.5V or the RESET control code is received. In Ring, RESET is identical to RI output. Only new positive edge PON, derived on opening and closing the line, is forcing the default mode again. The Reset control code is only active in speech mode. 8/17 Serial Bus Interface (Data and Clock) The serial bus uses 6 bits. Astandard 8 bit bus can be used, bits a6 and a7 are not take in account by the TEA7088A. Different types of codes are used : a) The Ring Control Code : - Ring start up - Output level codes b) The Operating Code : - Speech - Dialing - Microphone mute - Earphone/Microphone mute c) The Data Codes (DTMF, ring frequencies) : Those data codes are stored inside the TEA7088Aand are used as soon as the dialing code or the ring start code is received. d) The Configuration Code : - AGC / no AGC (toggle) - No mask / mask (Low DC in ”make”) (toggle) - Normal gain / normal gain +6dB, on receive channel (toggle) - 1.79MHz external clock / 3.58MHz internal oscillator (toggle) Those configuration codes are ”Flip-Flop” codes. For instance : The first time that the+6dB code is sent, the receive gain increases of +6dB. If the same code is sent again, the receive gain goes back to normal value. In the same way the 3.58MHz internal oscillator can be switched OFF with a second transmission of the proper code. e) The RESET Code : Reset code from the MCU will reset internallogic of TEA7088A to default mode and will induce TEA7088A to generate a ”RESET” status ”low” to the MCU on Pin 19. Warning : the ”RESET” code deactivates the serial bus interface which is reactivated only after a ”ON-HOOK/OFF-HOOK” sequence. f) The INITIALIZATION Code : Initialization code from the MCU will reset the internal logic of TEA7088A to default mode, but the TEA7088Awill not generatereset command to the MCU on Pin 19. TEA7088A MICROCONTROLLER INTERFACE WITH TEA7088A (continued) Figure 8 : Reset and Power ON Wit ho u t u s ing th e RES ET Co d e th ro u gh th e S e ria l Bu s Inte rfa c e IL A B C D E D A VMC 5 2.7 t VRMC 3.4 2.6 t 2.5V t PON t RES ET t Us in g the RES ET Cod e th ro u gh th e S e ria l Bus Inte rfa c e IL A B C D E D F D A VMC 5 2.7 t VRMC 3.4 2.6 t 2.5V PON td td t t RES ET t Re s et control code (010111) s e nt on the s e rial bus 7088A-09.EPS A : ON-HOOK B : S TART UP + S P EECH C : P ULSE DIALING D : SP EECH or DTMF E : LINE BREAK EXCHANGE DURATION F : LINE BREAK EXCHANGE DURATION > td td : DELAY FIXED BY THE MICROCONTROLLER 9/17 TEA7088A MICROCONTROLLER INTERFACE WITH TEA7088A (continued) The Start Up Conditions of the TEA7088A As soon as RESET is high and before sending any code the circuit is in the following default configuration : - Speech - No mask - AGC ON in transmit and receive channels - Normal gain on receive channel - 1.79MHz input clock (oscillator in stand by) 6 bit Codes Between two DTMF or ring frequencies, introducing a Mute or speech code implies to wait 1ms to end the sinewave or square period. DTMF Dialing To dial in DTMF the following sequence of codes must be sent : DTMF Frequency code : 00XXXX Dialing Mode code : 010001 Mute or SPEECH code : 010010 or 010000 The duration of the DTMF signal is fixed by the delay between Dialing mode code and MUTE or SPEECH code. Pulse Dialing The pulse dialing function is performed by the microcontroller through the high voltage stage. The ”MAKE” voltage over the TEA7088A during dialing can be reduced by sending the mask code 0010101. To recover the normal speech voltage at the end of dialing the mask code must be sent again. If the mask code is not used the voltage over the TEA7088Aduring dialing is the same as in speech mode. Ring Indicator (RI) In ring mode TEA7088A generates a high logic level on Pin RI as soon as the voltage on Pin VRING is higher than VTHRI ON (19V Typ.), and the voltage on VRMC is higher than 3.4V. When the voltage on VRMC becomes higher than 2.6V, RESET signal becomes also high. Mask Input (MSK) MSK input must be high by default (Figure 10). In speech configuration forcing MSK input to low level will have same functionality than the MASK code. For ring mode when it is necessary to send other frequencies than the 8 basic ones, this input allows to drive the buzzer output. Figure 9 : DATA/CLOCK Timing t0 t1 t2 t3 t4 t5 t3 CLK Data S ynchro a1 a2 a3 a4 Datas with a Change During CLK = 1 a5 a6 t0, t1, t2, t3, t4, t5 > 1µs 7088A-10.EPS a0 Data Figure 10 : MASK Timing P ULSE MODE OTHER MODES FLASH MODE OTHER MODES MSK 10/17 7088A-11.EPS IL TEA7088A MICROCONTROLLER INTERFACE WITH TEA7088A (continued) Keyboard Remarks a4 a3 a2 a1 a0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 822Hz Ring Signal 744Hz Ring Signal 1005Hz Ring Signal 909Hz Ring Signal 1187Hz Ring Signal 1074Hz Ring Signal 1451Hz Ring Signal 1312Hz Ring Signal 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 1 Speech Mode Dialing Mode or Ring Start Earphone & Microphone Mute Microphone Mute 0 1 0 1 0 1 Mask/No Mask 0 1 0 1 1 0 0 1 0 1 1 1 Reset Pin Control 1 1 1 0 1 0 Initialization Code 0 1 0 1 0 0 AGC / No AGC 1 0 1 0 0 0 1.79MHz Ext Clock & Oscillator Stand by / 3.58MHz Ceramic (toggle) 0 1 1 1 0 0 Minimum Ring Level (level 1) 0 1 1 1 0 1 Intermediate Low Ring Level (level 2) 0 1 1 1 1 0 Intermediate High Ring Level (level 3) 0 1 1 1 1 1 Maximum Ring Level (level 4) ”2” ”1” ”A” ”3” ”8” ”7” ”C” ”9” ”5” ”4” ”B” ”6” ”0” ”*” ”D” ”#” ”+6dB” 1336Hz 1209Hz 1633Hz 1477Hz 1336Hz 1209Hz 1633Hz 1477Hz 1336Hz 1209Hz 1633Hz 1477Hz 1336Hz 1209Hz 1633Hz 1477Hz + 697Hz + 697Hz + 697Hz + 697Hz + 852Hz + 852Hz + 852Hz + 852Hz + 770Hz + 770Hz + 770Hz + 770Hz + 941Hz + 941Hz + 941Hz + 941Hz In DTMF Dialing In Ring Mode Normal/+6dB on Receive Channel 7088A-03.TBL Codes a5 11/17 TEA7088A Figure 11 : Test Circuits - Test 1 (VL / VRMC / VMC / IVMC / ILS ) 33Ω 47 F 82kΩ 1 F 100nF 2 11 VS 560kΩ 8 RECIN 4 AGC VCC 3.9kΩ VREF 1 S OFT 12 3 VREF 1.3kΩ GTR 7 10kΩ 26 VRMC 100nF S idetone 15kΩ 1.6kΩ VCC VCC 600Ω IL 13V 620Ω SN C2 4.7nF VL 100 F GREC 14 10 F 100nF 15kΩ 28 DTMF EAR+ 16 27 VREF TEA7088A 13 VMC 10 F 300Ω 2.2 F 100 F EAR- 15 2kΩ MIC2 6 47Ω 17 BUZ 470nF MIC1 5 24 23 22 20 19 GND RESET PON RI 21 1N4148 IVLS 10 VCC ILS 9 7088A-12.EPS 25 OSC 10 F MSK DCL 18 VRING 24V DATA 47nF 47 F Figure 12 : Test 2 (R1) 33Ω IAC 13V VCC VCC 47 F 1 F 100nF 4 AGC 560kΩ 8 2 11 VS VRE F RECIN 3.9kΩ 1 S OFT 12 3 1.3kΩ GTR 7 10kΩ 26 VRMC 100nF VREF SN VAC S ide tone 15kΩ 1.6kΩ 82kΩ 620Ω VCC IL C2 4.7nF VL 100 F GREC 14 10 F 15kΩ 100nF 28 DTMF EAR+ 16 27 VREF TEA7088A 13 VMC 10 F 300Ω 2.2 F 100 F EAR- 15 2kΩ 47Ω MIC2 6 17 BUZ 470nF 47nF 12/17 IAC RI = 20 log Z + 600 Z - 600 RI PON RESET GND 25 24 23 22 21 20 19 9 1N4148 IVLS 10 VCC ILS 47 F 7088A-13.EPS VAC Z= OSC 10 F MSK 24V DATA 18 VRING DCL MIC1 5 TEA7088A Figure 13 : Test 3 (Gtl / Gts / Zmic / Nt / Mmic / Dt / Vlmax / Eff) 33Ω C2 4.7nF 47 F 82kΩ 1 F 100nF 11 1 S OFT 12 3 VL 2 VS 560kΩ 8 VCC 4 AGC RECIN 3.9kΩ VR EF VREF 1.3kΩ GTR 7 10kΩ 26 VRMC 100nF S ide tone 15kΩ 1.6kΩ VC C VCC 600Ω IL 13V 620Ω SN 100 F GREC 14 10 F 15kΩ 100nF 28 DTMF EAR+ 16 27 VREF TE A7088A 13 VMC 100 F 10 F Ve a r 300Ω 2.2 F EAR- 15 MIC2 6 47Ω 17 BUZ 2kΩ 47nF 470nF 24 22 21 20 19 GND PON RI OSC 23 MIC1 5 1N4148 IVLS 10 VC C ILS 9 47 F 7088A-14.EPS 25 V12 (010000) Mmic = 20 log V12 (010011) V12 Gtl/Gts = 20 log Vm MSK DCL DATA 10 F RESET 18 VRING 24V Vm Ve a r Eff = 20 log Vm Figure 14 : Test 4 (Grl / Grs / Dr / Mear / Nr) 33Ω IAC C2 4.7nF 47 F 1 F 100nF 11 VS 1 SOFT 3 12 VL 2 VCC 560kΩ 8 RECIN 4 AGC Sidetone 15kΩ 1.6kΩ 3.9kΩ VREF 100nF 82kΩ VCC VCC VAC IL 13V 620Ω VREF SN 100 F 1.3kΩ GTR 7 10kΩ 26 VRMC GREC 14 10 F 100nF 15kΩ 28 DTMF EAR+ 16 27 VREF TEA7088A 13 VMC 10 F 300Ω Vear 2.2 F 100 F EAR- 15 2kΩ MIC2 6 47Ω 17 BUZ 470nF MIC1 5 Grl/Grs = 20 log 24 23 22 20 19 GND RESET PON RI 21 9 1N4148 IVLS 10 VCC ILS 47 F 7088A-15.EPS 25 OSC 10 F MSK 24V DATA 18 VRING DCL 47nF Vear V12 13/17 TEA7088A Figure 15 : Test 5a (Vthri) 33Ω C2 4.7nF 13V 1 F 100nF 1 S OFT 12 3 VR EF SN 11 VL 2 VS 56 0kΩ 8 RECIN 4 AGC VCC 3.9kΩ VRE F 1.3kΩ GTR 7 10kΩ 26 VRMC 100nF S ide tone 15kΩ 1.6kΩ VC C VCC 47 F 82kΩ 62 0Ω GREC 14 10 F 100nF 15kΩ 28 DTMF EAR+ 16 27 VRE F TEA7088A 13 VMC 10 F 300Ω 2.2 F 100 F EAR- 15 2kΩ MIC2 6 47Ω 17 BUZ 470nF 47nF PON RESET 25 24 23 22 21 20 19 1N4148 GND RI 10 F OSC 24V MSK Vthri DATA 18 VRING DCL MIC1 5 IVLS 10 VC C 7088A-16.EPS Vb o ut 47 F 9 Figure 16 : Test 5b (Vbout) 33Ω 13V 1 F 100nF 11 1 S OFT 12 3 VL 2 VS 560kΩ 8 RECIN 4 AGC VCC 3.9kΩ VREF VREF 1.3kΩ GTR 7 10kΩ 26 VRMC 100nF Sidetone 15kΩ 1.6kΩ VCC VCC 47 F 82kΩ 620 Ω SN C2 4.7nF GREC 14 10 F 100nF 15kΩ 28 DTMF EAR+ 16 27 VREF TEA7088A 13 VMC 10 F 300Ω 2.2 F 100 F EAR- 15 2kΩ 47Ω MIC2 6 17 BUZ 24 23 21 20 19 GND RESET PON RI OSC 22 1N4148 IVLS 10 9 6 bit s e rial code (0111XX/Fi/010001) ; OSCIN = 1.79MHz e xterna l clock (de fa ult mode ) or 3.58MHz e xterna l ceramic/crystal (with code ”101000” to s e lect internal os cillator) 14/17 VCC ILS 47 F 7088A-17.EPS 25 MSK 10 F DATA 18 VRING IRING 470nF MIC1 5 47nF DCL Vbout TEA7088A Figure 17 : Test 6 (DTMF) 33Ω 600Ω 1 F 100nF 560kΩ 8 2 11 VS 4 AGC VCC 3.9kΩ VREF 1 SOFT 12 3 VREF 1.3kΩ GTR 7 10kΩ 26 VRMC 100nF Sidetone 15kΩ 1.6kΩ VCC VCC 47 F 82kΩ RECIN IL 13V 620Ω SN C2 4.7nF VL 100 F GREC 14 10 F 100nF 15kΩ 28 DTMF EAR+ 16 27 VREF TEA7088A 13 VMC 10 F 300 Ω 2.2 F 100 F EAR- 15 2kΩ MIC2 6 47Ω 17 BUZ 470nF MIC1 5 24 23 21 20 19 GND RESET PON RI OSC 22 1N4148 VCC IVLS 10 9 ILS 47 F 7088A-18.EPS 25 MSK 10 F DATA 18 VRING DCL 47nF 6 bit s e rial code (00XXXX/Fi/010010) ; OSCIN = 1.79MHz e xterna l clock (de fault mode ) or 3.5 8MHz e xterna l ce ramic/crystal (with code ”101 000” to s e lect interna l o s cillator) 15/17 7088A-19.EPS B A D8 D6 SW1B D7 4 x 1N4004 D9 SW1A C1 820nF R40 1kΩ Q3 BF393 R29 22kΩ D11 6.2V R28 22kΩ C8 47µF C19 30pF D5 BAT42 R2 330kΩ D3 24V R15 1kΩ Buzzer C14 47nF C13 100nF C3 100nF R4 560kΩ VREF VCC X1 C18 30pF 1 SOFT 4 AGC 25 2 8 26 18 VRING 17 BUZ 13 VMC 27 VREF 28 DTMF C15 4.7µF C16 10µF 47Ω C10 470µF R25 R10 620Ω VRMC V CC 24 DATA C2 4.7nF MSK 23 C11 1µF 11 TEA7088A 20 MCU 21 RI RECIN DCL VS PON R27 5.6Ω 19 9 22 3 3.58MHz X2 IVLS 10 MIC1 5 MIC2 6 EAR- 15 EAR+ 16 GREC 14 1 4 7 * C17 2.2nF 3 6 9 # S M L R V CC C22 47nF 2 5 8 0 R8 1.3kΩ VREF VCC C26 1µF R14 10kΩ R6 C5 C21 47nF C30 47nF R21 2kΩ R17 15kΩ R5 Sidetone GTR 7 C12 100nF R13 300Ω 12 GND D2 13V R12 82kΩ VL R11 33Ω OSC Impedance RESET SN 16/17 Handset Q1 BSS92 TEA7088A TYPICAL APPLICATION TEA7088A PM-SO28.EPS PACKAGE MECHANICAL DATA 28 PINS - PLASTIC PACKAGE Dimensions Millimeters Typ. 0.1 0.35 0.23 Max. 2.65 0.3 0.49 0.32 Min. Inches Typ. 0.004 0.014 0.009 0.5 Max. 0.104 0.012 0.019 0.013 0.020 o 45 (Typ.) 17.7 10 18.1 10.65 0.697 0.394 1.27 16.51 7.4 0.4 0.713 0.419 0.050 0.65 7.6 1.27 0.291 0.016 0.299 0.050 SO28.TBL A a1 b b1 C c1 D E e e3 F L S Min. o 8 (Max.) Information furni shed is believed to be accurate and reliable. However, SGS-THOMSON Micr oelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise und erany patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This pu blication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. 1998 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of I 2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips 2 2 I C Patent. Rights to use these components in a I C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 17/17