TIL308, TIL309 NUMERIC DISPLAYS WITH LOGIC SLBS002–D1096, MARCH 1972–REVISED SEPTEMBER 1992 SOLID-STATE DISPLAYS WITH INTEGRAL TTL MSI CIRCUIT CHIP FOR USE IN ALL SYSTEMS REQUIRING A DISPLAY OF BCD DATA • • • • • • 6,9-mm (0.270-Inch) Character Height TIL308 Has Left Decimal TIL309 Has Right Decimal Easy System Interface Wide Viewing Angle Internal TTL MSI Chip With Latch, Decoder, and Driver Constant-Current Drive for Light-Emitting Diodes • mechanical data These assemblies consist of display chips and a TTL MSI chip mounted on a header with a red molded plastic body. Multiple displays may be mounted on 11,43-mm (0.450-inch) centers. PIN ASSIGNMENTS Pin 1 Pn 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7 Pin 8 QB QC QD QA LS C D GND Pin 9 Pin 10 Pin 11 Pin 12 Pin 13 Pin 14 Pin 15 Pin 16 NC B BI DP LT QDP A VCC 3,56 (0.140) 2,79 (0.110) Seating Plane (see Note A) 4,32 (0.170) MIN CL of Pin 1 4,42 (0.174) 3,81 (0.150) 0,56 (0.022) 0,46 (0.018) DIA All Pins 7,87 (0.310) 7,62 (0.300) 1,52 (0.060) 1,02 (0.040) Decimal Point TIL309 CL of Pin 1 1 2,54 (0.100) 4,45 (0.175) 3,94 (0.155) 4 Places 6,45 (0.254) 10° 0,66 (0.026) 0,66 (0.026) 3,81 (0.150) 3,80 (0.150) 26,67 (1.050) 25,65 (1.010) 2,54 (0.100) T.P. 14 Places (see Note C) Logic Chip Decimal Point TIL308 TIL308 TIL309 A F G E TOP VIEW D.P. A B C D F G E B 10,67 (0.420) 9,65 (0.380) C D D.P. ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES NOTES: A. Lead dimensions are not controlled above the seating plane. B. Centerlines of character segments and decimal points are shown as dashed lines. Associated dimensions are nominal. C. The true-position pin spacing is 2,54 mm (0.100 inch) between centerlines. Each centerline is located with 0,26 mm (0.010 inch) of its true longitudinal position relative to pins 1 and 16. Copyright 1992, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 QDP QD QC QB QA VCC BI LS To Logic Chip A POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 B a Latch Data Inputs C f b g e c d D dp DP TL308 has left decimal. TL309 has right decimal. LT TIL308, TIL309 NUMERIC DISPLAYS WITH LOGIC Latch Outputs SLBS002–D1096, MARCH 1972–REVISED SEPTEMBER 1992 2 logic diagram TIL308, TIL309 NUMERIC DISPLAYS WITH LOGIC SLBS002–D1096, MARCH 1972–REVISED SEPTEMBER 1992 description These internally-driven seven-segment light-emitting-diode (LED) displays contain a five-bit latch and a decoder/LED driver in a single 16-pin package. A description of the functions of the inputs and outputs of these devices are in the terminal function table. The TTL MSI circuits contain the equivalent of 78 gates on a single chip. Logic inputs and outputs are completely TTL/DTL compatible. The buffered inputs are implemented with relatively large resistors in series with the bases of the input transistors to lower drive-current requirements to one-half of that required for a standard Series 54/74 TTL input. Some of the additional features of these displays are as follows: • • • • • • • • • Latched BCD and decimal point logic outputs provided to drive logic processors simultaneously with the displayed data Minimum number of inputs required . . . 4-line BCD plus decimal point Overriding blanking for suppressing entire display or pulse-modulation of LED brightness LED test input to simultaneously turn on all display segments and decimal point Can be operated in a real-time mode or latched-update-only mode by use of the latch strobe input Displays numbers 0 through 9 as well as A, C, E, F, or minus sign Can be blanked by entry of BCD 13 or by use of the blanking input Decimal point controlled independently with decimal-point latch Constant-current-source TTL-LED interface for optimum performance. The latch outputs except QDP are active pullup, and each one, except QDP, is capable of driving three standard Series 54/74 loads. The LED driver outputs are designed specifically to maintain a relatively constant on-level current of approximately 7 mA through each LED segment and decimal point. All inputs are diode-clamped to minimize transmission-line effects, thereby simplifying system design. Power dissipation is typically 575 mW with all segments on. Terminal Functions PIN NAME BLANKING Input (BI) DESCRIPTION NO. 11 When low, will blank (turn off) the entire display. Mus be high for normal operation of the display. Latch Data Inputs A, B, C, D, DP 15, 10, 6, 7, 12 Data on these inputs are entered into the latches under the control of the latch strobe input. The binary weights of the inputs are: A = 1, B = 2, C = 4, D = 8. DP is decimal point latch data input. Latch Outputs QA, QB, QC, QD, QDP LATCH STROBE Input (LS) 4, 1, 2, 3, 14 The BCD data that drives the decoder is stored in the five latches and is available at these outputs. The binary weights of the outputs are: QA = 1, QB = 2, QC = 4, QD = 8. QDP is decimal point latch output. LED TEST Input (LT) 5 When low, the data in latches follow the data on the latch inputs. When high, the data in the latches are held constant and are unaffected by new data on the latch inputs. 13 When low, will turn on the entire display, overriding the data in the latches and the blanking input. Must be high for normal operation of the display. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TIL308, TIL309 NUMERIC DISPLAYS WITH LOGIC SLBS002–D1096, MARCH 1972–REVISED SEPTEMBER 1992 FUNCTION TABLE FUNCTION LATCH INPUTS B A LATCH OUTPUTS DISPLAY STROBE BLANKING INPUT LED TEST QD QC QB L L H H L L L L L H L H H L L L H H L H H L L H L L L H H L L H H H L H H L H L L L L H H L H L H H L L H H L H H L L H L H H L H H H H L L H H H L L L L H L H H H L L H H L H H H L H L L L H H H L H H H L H H H H L L L L H H H H L H H L H H H H H L L H H H H H H H X L H X X X X X X X L X X X X X D C DP 0 L L L L 1 L L L H 2 L L H L L 3 L L H H H 4 L H L L L 5 L H L H H 6 L H H L 7 L H H H 8 H L L L 9 H L L H A H L H L L Minus Sign H L H H H C H H L L L Blank H H L H H E H H H L L F H H H H H L Blank X X X X X LED TEST (LT) X X X X X QA QDP TIL308 TIL309 H = high level, L = low level, X = irrelevant. DP input has arbitrarily been shown activated (high) on every other line of the table. absolute maximum ratings over operating case temperature range (unless otherwise noted) Supply voltage, VCC (see Note 1): Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Nonrepetitive peak, tw ≤ 100 ms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating case temperature range, TC (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 85°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 25°C to 85°C NOTES: 1. Voltage values are with respect to network ground terminal. 2. Case temperature is the surface temperature of the plastic measured directly over the integrated circuit. Forced-air cooling may be required to maintain this temperature. recommended operating conditions Supply voltage, VCC Low logic level Normalilzed fanout from each output,, N (to Series 54/74 integrated circuits) High logic level NOM MAX UNIT 5 5.25 V QDP 1 QA, QB, QC, QD 3 QDP 3 QA, QB, QC, QD 6 Latch strobe pulse duration, tw Setup time, tsu Latch data input (DP) before latch strobe (LS)↑ Hold time, th Latch data input (DP) after latch strobe (LS)↑ Operating case temperature, TC 4 MIN 4.75 45 ns 60 ns 0 0 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ns 70 °C TIL308, TIL309 NUMERIC DISPLAYS WITH LOGIC SLBS002–D1096, MARCH 1972–REVISED SEPTEMBER 1992 electrical characteristics at 25°C case temperature PARAMETER VIH VIL High-level input voltage VIK Input clamp voltage VOH High level output voltage High-level VOL Low-level output voltage g (see Note 3) TEST CONDITIONS MIN TYP† QDP QA, QB, QC, QD QDP QA, QB, QC, QD II IIH Input current at maximum input voltage IIL Low-level input current High-level input current Short circuit output current Short-circuit ICC Supply current QA, QB, QC, QD VCC = 4.75 V, VCC = 4.75 V, II = – 12 mA IOH = – 120 µA VCC = 4.75 V, VCC = 4.75 V, IOH = – 240 µA IOL = 1.6 mA VCC = 4.75 V, VCC = 5.25 V, IOL = 4.8 mA VI = 5.5 V VCC = 5.25 V, VCC = 5.25 V, VI = 2.4 V VI = 0.4 V VCC = 5 5.25 25 V QDP VCC = 5.25 V, Iv Luminous intensity (see Note 4) λp Wavelength at peak emission Figure VCC = 5 V DP Input VCC = 5 V, 0.8 V – 1.5 V 24 2.4 V 04 0.4 1 mA µA – 0.8 mA – 27.5 –1 – 3.2 115 700 1200 40 70 See Note 5 V 20 –9 All inputs at 0 V UNIT V Low-level input voltage IOS MAX 2 180 mA mA µcd 660 nm ∆λ Spectral bandwidth VCC = 5 V, See Note 5 20 nm † All typical values are at VCC = 5 V. NOTES: 3. This parameter is measured with the display blanked. 4. Luminous intensity is measured with a light sensor and filter combination that approximates the CIE (International Commission on Illumination) eye-response curve. 5. These parameters are measured with all LED segments and the decimal point on. switching characteristics, VCC = 5 V, TC = 25°C PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A B, A, B C, C D, D DP QA, QB, QC, QD, QDP TEST CONDITIONS CL = 15 pF,, See Figure 1 RL = 1.2 kΩ,, MIN TYP 35 40 MAX UNIT ns PARAMETER MEASUREMENT INFORMATION Output VCC RL From Output Under Test CL = 15 pF NOTES: A. CL includes probe and jig capacitance. B. All diodes are 1N3064. C. Measurements mode with LS input grounded. Figure 1. Load Circuit POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TIL308, TIL309 NUMERIC DISPLAYS WITH LOGIC SLBS002–D1096, MARCH 1972–REVISED SEPTEMBER 1992 TYPICAL CHARACTERISTICS RELATIVE LUMINOUS INTENSITY vs CASE TEMPERATURE RELATIVE SPECTRAL CHARACTERISTICS 0.9 Luminous Intensity Relative to Value at TC = 25 °C 1 VCC = 5 V TC = 25°C Relative Luminous Intensity 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 600 620 640 660 680 700 4 VCC = 5 V 2 1 0.7 0.4 0.2 0.1 0 Figure 2 6 10 20 30 40 50 TC – Case Temperature – °C λ – Wavelength – nm Figure 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 60 70 IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current. TI warrants performance of its semiconductor products and related software to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage (“Critical Applications”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI products in such applications requires the written approval of an appropriate TI officer. Questions concerning potential risk applications should be directed to TI through a local SC sales office. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards should be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor does TI warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. Copyright 1996, Texas Instruments Incorporated