SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 D D D D D D Supply Current . . . 300 µA Max High Unity-Gain Bandwidth . . . 2 MHz Typ High Slew Rate . . . 0.45 V/µs Min Supply-Current Change Over Military Temp Range . . . 10 µA Typ at VCC ± = ± 15 V Specified for Both 5-V Single-Supply and ±15-V Operation Phase-Reversal Protection D High Open-Loop Gain . . . 6.5 V/µV D D D D (136 dB) Typ Low Offset Voltage . . . 100 µV Max Offset Voltage Drift With Time 0.005 µV/mo Typ Low Input Bias Current . . . 50 nA Max Low Noise Voltage . . . 19 nV/√Hz Typ description The TLE202x, TLE202xA, and TLE202xB devices are precision, high-speed, low-power operational amplifiers using a new Texas Instruments Excalibur process. These devices combine the best features of the OP21 with highly improved slew rate and unity-gain bandwidth. The complementary bipolar Excalibur process utilizes isolated vertical pnp transistors that yield dramatic improvement in unity-gain bandwidth and slew rate over similar devices. The addition of a bias circuit in conjunction with this process results in extremely stable parameters with both time and temperature. This means that a precision device remains a precision device even with changes in temperature and over years of use. This combination of excellent dc performance with a common-mode input voltage range that includes the negative rail makes these devices the ideal choice for low-level signal conditioning applications in either single-supply or split-supply configurations. In addition, these devices offer phase-reversal protection circuitry that eliminates an unexpected change in output states when one of the inputs goes below the negative supply rail. A variety of available options includes small-outline and chip-carrier versions for high-density systems applications. The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized for operation from − 40°C to 85°C. The M-suffix devices are characterized for operation over the full military temperature range of −55°C to 125°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. Copyright 1997−2007, Texas Instruments Incorporated !"#$ % &'!!($ #% )'*+&#$ ,#$(!,'&$% &!" $ %)(&&#$% )(! $.( $(!"% (#% %$!'"($% %$#,#!, /#!!#$0- !,'&$ )!&(%%1 ,(% $ (&(%%#!+0 &+',( $(%$1 #++ )#!#"($(!%- POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TLE2021 AVAILABLE OPTIONS PACKAGED DEVICES TA VIOmax AT 25°C SMALL OUTLINE† (D) SSOP‡ (DB) CHIP CARRIER (FK) CERAMIC DIP (JG) PLASTIC DIP (P) TSSOP‡ (PW) CHIP FORM§ (Y) 0°C 0 C to 70°C 200 µV 500 µV TLE2021ACD TLE2021CD TLE2021CDBLE — — TLE2021ACP TLE2021CP — TLE2021CPWLE — TLE2021Y −40°C to 85°C 200 µV 500 µV TLE2021AID TLE2021ID — — — TLE2021AIP TLE2021IP — — −55 C −55°C to 125°C 100 µV 200 µV 500 µV — TLE2021AMD TLE2021MD — TLE2021BMFK TLE2021AMFK TLE2021MFK TLE2021BMJG TLE2021AMJG TLE2021MJG — TLE2021AMP TLE2021MP — — † The D packages are available taped and reeled. To order a taped and reeled part, add the suffix R (e.g., TLE2021CDR). ‡ The DB and PW packages are only available left-end taped and reeled. § Chip forms are tested at 25°C only. TLE2022 AVAILABLE OPTIONS PACKAGED DEVICES CHIP CARRIER (FK) CERAMIC DIP (JG) PLASTIC DIP (P) TSSOP‡ (PW) CHIP FORM§ (Y) — TLE2022CDBLE — — — TLE2022ACP TLE2022CP — — TLE2022CPWLE — — TLE2022Y TLE2022BID TLE2022AID TLE2022ID — — — — TLE2022AIP TLE2022IP — — — TLE2022AMD TLE2022MD — — TLE2022AMFK TLE2022MFK TLE2022BMJG TLE2022AMJG TLE2022MJG — TLE2022AMP TLE2022MP — — TA VIOmax AT 25°C SMALL OUTLINE† (D) SSOP‡ (DB) 0°C to 70°C 150 µV 300 µV 500 µV TLE2022BCD TLE2022ACD TLE2022CD — −40°C to 85°C 150 µV 300 µV 500 µV −55 C −55°C to 125°C 150 µV 300 µV 500 µV † The D packages are available taped and reeled. To order a taped and reeled part, add the suffix R (e.g., TLE2022CDR). ‡ The DB and PW packages are only available left-end taped and reeled. § Chip forms are tested at 25°C only. TLE2024 AVAILABLE OPTIONS PACKAGED DEVICES TA VIOmax AT 25°C 0°C 0 C to 70°C 500 µV 750 µV 1000 µV −40°C −40 C to 85°C 85 C −55°C −55 C to 125 125°C C SMALL OUTLINE (DW) CERAMIC DIP (J) PLASTIC DIP (N) TLE2024BCDW TLE2024ACDW TLE2024CDW — — TLE2024BCN TLE2024ACN TLE2024CN — — TLE2024Y 500 µV 750 µV 1000 µV TLE2024BIDW TLE2024AIDW TLE2024IDW — — TLE2024BIN TLE2024AIN TLE2024IN — 500 µV 750 µV 1000 µV TLE2024BMDW TLE2024AMDW TLE2024MDW TLE2024BMFK TLE2024AMFK TLE2024MFK TLE2024BMJ TLE2024AMJ TLE2024MJ TLE2024BMN TLE2024AMN TLE2024MN — § Chip forms are tested at 25°C only. 2 CHIP FORM§ (Y) CHIP CARRIER (FK) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TLE2021 D, DB, JG, P, OR PW PACKAGE (TOP VIEW) 1 8 2 7 3 6 4 5 NC OFFSET N1 NC NC NC OFFSET N1 IN− IN+ VCC − /GND TLE2021 FK PACKAGE (TOP VIEW) NC VCC+ OUT OFFSET N2 NC IN− NC IN+ NC 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 NC VCC+ NC OUT NC NC V CC−/ GND NC OFFSET N2 NC NC − No internal connection 4 1OUT 1IN− 1IN+ VCC − /GND 1 8 2 7 3 6 4 5 FK PACKAGE (TOP VIEW) NC 1OUT NC VCC + NC D, DB, JG, P, OR PW PACKAGE (TOP VIEW) VCC+ 2OUT 2IN− 2IN+ NC 1IN − NC 1IN + NC 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 NC 2OUT NC 2IN − NC NC V CC−/ GND NC 2IN + NC NC − No internal connection 4 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 4OUT 4IN− 4IN + VCC − /GND 3IN + 3IN − 3OUT NC NC − No internal connection J OR N PACKAGE (TOP VIEW) 1IN + NC VCC + NC 2IN + 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 4IN + NC VCC − /GND NC 3IN + 1OUT 1IN − 1IN + VCC + 2IN + 2IN − 2OUT 1 14 2 13 3 12 4 11 5 10 6 9 7 8 4OUT 4IN − 4IN + VCC − /GND 3IN + 3IN − 3OUT 2IN − 2OUT NC 3OUT 3IN − 1OUT 1IN − 1IN + VCC + 2IN + 2IN − 2OUT NC FK PACKAGE (TOP VIEW) 1IN − 1OUT NC 4OUT 4IN − DW PACKAGE (TOP VIEW) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TLE2021Y chip information This chip, when properly assembled, display characteristics similar to the TLE2021. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. This chip may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS (7) (6) (5) OFFSET N1 IN + IN − OFFSET N2 VCC+ (7) (1) (3) (2) + (6) OUT − (5) (4) VCC − /GND 78 CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax= 150°C TOLERANCES ARE ± 10%. ALL DIMENSIONS ARE IN MILS. (4) (1) PIN (4) IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP. (2) (3) 54 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TLE2022Y chip information This chip, when properly assembled, displays characteristics similar to TLE2022. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. This chip may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS (7) (6) IN + (3) (2) IN − OUT (8) (7) + (1) OUT − + − (5) 80 VCC+ (8) (5) (6) IN + IN − (4) (4) VCC − (1) CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ± 10%. ALL DIMENSIONS ARE IN MILS. (2) (3) PIN (4) IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP. 86 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TLE2024Y chip information This chip, when properly assembled, displays characteristics similar to the TLE2024. Thermal compression or ultrasonic bonding may be used on the doped aluminum-bonding pads. This chip may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS 1IN + 1IN − 2OUT 2IN + 100 3IN − 4OUT VCC + (4) (3) + (1) 1OUT (2) − + (7) (10) − + (5) (6) 2IN + 2IN − (8) 3OUT (9) − + (14) − (12) (13) 4IN + 4IN − (11) VCC −/GND 140 CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ± 10%. ALL DIMENSIONS ARE IN MILS. PIN (11) IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 equivalent schematic (each amplifier) VCC+ Q13 Q3 Q22 Q17 Q7 Q28 Q35 Q31 Q29 Q19 Q1 Q32 Q24 Q39 Q20 Q8 Q5 Q34 Q38 Q11 D3 Q2 Q36 C4 IN − Q4 Q12 D4 IN + R7 Q23 Q25 C2 Q10 D1 D2 OUT Q14 Q40 C3 Q21 Q27 R6 R1 C1 Q6 Q9 R2 R4 R3 R5 Q15 OFFSET N1 Q30 Q33 Q26 Q18 Q37 Q16 OFFSET N2 VCC − /GND ACTUAL DEVICE COMPONENT COUNT COMPONENT Transistors TLE2021 TLE2022 TLE2024 40 80 160 Resistors 7 14 28 Diodes 4 8 16 Capacitors 4 8 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC+ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V Supply voltage, VCC − (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 0.6 V Input voltage range, VI (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±VCC Input current, II (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1 mA Output current, IO (each output): TLE2021 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA TLE2022 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 30 mA TLE2024 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 40 mA Total current into VCC+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 mA Total current out of VCC − . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 mA Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C Case temperature for 60 seconds, TC: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, DP, P, or PW package . . . . . . . . 260°C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package . . . . . . . . . . . . . . . . . . . . 300°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC +, and VCC − . 2. Differential voltages are at IN+ with respect to IN −. Excessive current flows if a differential input voltage in excess of approximately ± 600 mV is applied between the inputs unless some limiting resistance is used. 3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING TA = 125°C POWER RATING D−8 725 mW 5.8 mW/°C 464 mW 377 mW 145 mW DB−8 525 mW 4.2 mW/°C 336 mW — — DW−16 1025 mW 8.2 mW/°C 656 mW 533 mW 205 mW FK 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW J−14 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW JG−8 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mW N−14 1150 mW 9.2 mW/°C 736 mW 598 mW 230 mW P−8 1000 mW 8.0 mW/°C 640 mW 520 mW 200 mW PW−8 525 mW 4.2 mW/°C 336 mW — — recommended operating conditions Supply voltage, VCC Common-mode input voltage, VIC VCC = ± 5 V VCC ± = ± 15 V Operating free-air temperature, TA 8 POST OFFICE BOX 655303 C SUFFIX I SUFFIX M SUFFIX MIN MAX MIN MAX MIN MAX ±2 ± 20 ±2 ± 20 ±2 ± 20 0 3.5 0 3.2 0 3.2 −15 13.5 −15 13.2 −15 13.2 0 70 −40 85 −55 125 • DALLAS, TEXAS 75265 UNIT V V °C Temperature coefficient of input offset voltage αVIO VIC = VICRmin, RS = 50 Ω VCC = 5 V to 30 V Low-level output voltage Large-signal differential voltage amplification Common-mode rejection ratio Supply-voltage rejection ratio (∆VCC /∆VIO) Supply current Supply-current change over operating temperature range VOL AVD CMRR kSVR ICC POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ∆ICC 4 25°C 25°C 25°C Full range Full range 100 105 25°C Full range 80 85 25°C Full range 0.3 0.3 Full range 25°C Full range 3.9 Full range Full range 0 to 3.5 25°C 5 200 120 110 1.5 0.7 4.3 − 0.3 to 4 300 300 0.85 0.8 90 70 25°C Full range 10 6 850 600 MAX Full range 25 0.2 25°C 2 120 TYP 0.005 0 to 3.5 MIN TLE2021C 25°C Full range Full range 25°C TA† 100 105 80 85 0.3 0.3 3.9 4 0 to 3.5 0 to 3.5 MIN 5 200 120 110 1.5 0.7 4.3 − 0.3 to 4 25 0.2 0.005 2 100 TYP TLE2021AC 300 300 0.85 0.8 90 70 10 6 600 300 MAX 100 105 80 85 0.3 0.3 3.9 4 0 to 3.5 0 to 3.5 MIN 5 200 120 110 1.5 0.7 4.3 − 0.3 to 4 25 0.2 0.005 2 80 TYP TLE2021BC 300 300 0.85 0.8 90 70 10 6 300 200 MAX µA µA A dB dB V/ V V/µV V V V nA nA µV/mo µV/°C µV V UNIT † Full range is 0°C to 70°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. VO = 2.5 V, No load VO = 1.4 V to 4 V, RL = 10 kΩ RL= 10 kΩ High-level output voltage VOH RS = 50 Ω Common-mode input voltage range Input bias current IIB VIC = 0, RS = 50 Ω TEST CONDITIONS VICR Input offset current IIO Input offset voltage long-term drift (see Note 4) Input offset voltage VIO PARAMETER TLE2021 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 9 10 Temperature coefficient of input offset voltage αVIO VIC = VICR min, RS = 50 Ω VCC ± = ± 2.5 V to ± 15 V Maximum negative peak output voltage swing Large-signal differential voltage amplification Common-mode rejection ratio Supply-voltage rejection ratio (∆VCC /∆VIO) Supply current Supply-current change over operating temperature range VOM − AVD CMRR kSVR ICC POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ∆ICC No load −15 to 13.5 0.2 25°C 25°C 25°C 25°C Full range Full range 100 105 25°C Full range 96 100 1 1 −13.7 −13.7 Full range 25°C Full range 25°C Full range 13.9 14 Full range Full range −15 to 13.5 25°C 6 240 120 115 6.5 −14.1 14.3 −15.3 to 14 350 350 90 70 25°C Full range 10 6 750 500 MAX Full range 25 0.006 2 120 TYP TLE2021C MIN 25°C Full range Full range 25°C TA† 100 105 96 100 1 1 −13.7 −13.7 13.9 14 −15 to 13.5 −15 to 13.5 6 240 120 115 6.5 −14.1 14.3 −15.3 to 14 25 0.2 0.006 2 80 TYP TLE2021AC MIN 350 350 90 70 10 6 500 200 MAX 100 105 96 100 1 1 −13.7 −13.7 13.9 14 −15 to 13.5 −15 to 13.5 6 240 120 115 6.5 −14.1 14.3 −15.3 to 14 25 0.2 0.006 2 40 TYP TLE2021BC MIN 350 350 90 70 10 6 200 100 MAX µA µA A dB dB V/ V V/µV V V V nA nA µV/mo µV/°C µV V UNIT † Full range is 0°C to 70°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. VO = 0, VO = ± 10 V, RL = 10 kΩ RL = 10 kΩ Maximum positive peak output voltage swing VOM+ RS = 50 Ω Common-mode input voltage range Input bias current IIB VIC = 0, RS = 50 Ω TEST CONDITIONS VICR Input offset current IIO Input offset voltage long-term drift (see Note 4) Input offset voltage VIO PARAMETER TLE2021 electrical characteristics at specified free-air temperature, VCC = ±15 V (unless otherwise noted) 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 Temperature coefficient of input offset voltage αVIO VIC = VICRmin, VCC = 5 V to 30 V Low-level output voltage Large-signal differential voltage amplification Common-mode rejection ratio Supply-voltage rejection ratio (∆VCC ± /∆VIO) Supply current Supply current change over operating temperature range VOL AVD CMRR kSVR ICC POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ∆ICC No load RS = 50 Ω RL = 10 kΩ RS = 50 Ω 0 to 3.5 0.5 25°C 4 25°C Full range Full range 25°C 95 100 25°C Full range 80 85 25°C Full range 0.3 0.3 Full range 25°C Full range 25°C 3.9 Full range Full range 0 to 3.5 25°C 25 C 7 450 115 100 1.5 0.7 4.3 −0.3 to 4 600 600 0.85 0.8 90 70 25°C Full range 10 6 800 600 MAX Full range 35 0.005 2 TYP TLE2022C MIN 25°C Full range Full range 25°C TA† 98 103 82 87 0.4 0.4 3.9 4 0 to 3.5 0 to 3.5 7 450 118 102 1.5 0.7 4.3 −0.3 to 4 33 0.4 0.005 2 TYP TLE2022AC MIN 600 600 0.85 0.8 90 70 10 6 550 400 MAX 100 105 85 90 0.5 0.5 3.9 4 0 to 3.5 0 to 3.5 7 450 120 105 1.5 0.7 4.3 −0.3 to 4 30 0.3 0.005 2 TYP TLE2022BC MIN 600 600 0.85 0.8 90 70 10 6 400 250 MAX µA µA A dB dB V/ V V/µV V V V nA nA µV/mo V/mo µV/°C V/°C µV V UNIT † Full range is 0°C to 70°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. VO = 2.5 V, VO = 1.4 V to 4 V, RL = 10 kΩ High-level output voltage VOH RS = 50 Ω Common-mode input voltage range Input bias current IIB VIC = 0, TEST CONDITIONS VICR Input offset current IIO Input offset voltage long-term drift (see Note 4) Input offset voltage VIO PARAMETER TLE2022 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 11 12 Temperature coefficient of input offset voltage αVIO POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 VCC ± = ± 2.5 V to ± 15 V Common-mode rejection ratio Supply-voltage rejection ratio (∆VCC ± /∆VIO) Supply current Supply current change over operating temperature range CMRR kSVR ICC ∆ICC No load −15 to 13.5 0.5 25°C 25°C 25°C Full range Full range 95 100 25°C Full range 91 95 25°C Full range 0.8 0.8 −13.7 −13.7 Full range 25°C Full range 25°C 13.9 14 Full range Full range −15 to 13.5 25°C 25 C 9 550 115 106 4 −14.1 14.3 −15.3 to 14 700 700 90 70 25°C Full range 10 6 700 500 MAX Full range 35 0.006 2 150 TYP TLE2022C MIN 25°C Full range Full range 25°C TA† 98 103 93 97 1 1 −13.7 −13.7 13.9 14 −15 to 13.5 −15 to 13.5 9 550 118 109 7 −14.1 14.3 −15.3 to 14 33 0.4 0.006 2 120 TYP TLE2022AC MIN 700 700 90 70 10 6 450 300 MAX 100 105 96 100 1.5 1.5 −13.7 −13.7 13.9 14 −15 to 13.5 −15 to 13.5 9 550 120 112 10 −14.1 14.3 −15.3 to 14 30 0.3 0.006 2 70 TYP TLE2022BC MIN 700 700 90 70 10 6 300 150 MAX µA µA A dB dB V/ V V/µV V V V nA nA µV/mo V/mo µV/°C V/°C µV V UNIT † Full range is 0°C to 70°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. VO = 0, VO = ± 10 V, RS = 50 Ω VIC = VICRmin, Large-signal differential voltage amplification AVD RL = 10 kΩ Maximum negative peak output voltage swing VOM − RL = 10 kΩ Maximum positive peak output voltage swing VOM + RS = 50 Ω RS = 50 Ω Common-mode input voltage range Input bias current IIB VIC = 0, TEST CONDITIONS VICR Input offset current IIO Input offset voltage long-term drift (see Note 4) Input offset voltage VIO PARAMETER TLE2022 electrical characteristics at specified free-air temperature, VCC = ± 15 V (unless otherwise noted) 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 Temperature coefficient of input offset voltage αVIO VIC = VICRmin, VCC = 5 V to 30 V Low-level output voltage Large-signal differential voltage amplification Common-mode rejection ratio Supply-voltage rejection ratio (∆VCC /∆VIO) Supply current Supply current change over operating temperature range VOL AVD CMRR kSVR ICC POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ∆ICC No load RS = 50 Ω RL = 10 kΩ RS = 50 Ω 25°C 25°C 25°C Full range Full range 93 98 25°C Full range 80 80 25°C Full range 0.1 0.2 Full range 25°C Full range 3.7 3.9 Full range Full range 0 to 3.5 25°C 15 800 112 90 1.5 0.7 4.2 −0.3 to 4 1200 1200 0.95 0.8 90 70 25°C Full range 10 6 1300 1100 MAX Full range 45 0.6 25°C 2 TYP 0.005 0 to 3.5 MIN TLE2024C 25°C Full range Full range 25°C TA† 95 100 82 82 0.1 0.3 3.7 3.9 0 to 3.5 0 to 3.5 MIN 15 800 115 92 1.5 0.7 4.2 −0.3 to 4 40 0.5 0.005 2 TYP TLE2024AC 1200 1200 0.95 0.8 90 70 10 6 1050 850 MAX 98 103 85 85 0.1 0.4 3.8 4 0 to 3.5 0 to 3.5 MIN 15 800 117 95 1.5 0.7 4.3 −0.3 to 4 35 0.4 0.005 2 TYP TLE2024BC 1200 1200 0.95 0.8 90 70 10 6 800 600 MAX µA µA A dB dB V/ V V/µV V V V nA nA µV/mo µV/°C µV V UNIT † Full range is 0°C to 70°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. VO = 2.5 V, VO = 1.4 V to 4 V, RL = 10 kΩ High-level output voltage VOH RS = 50 Ω Common-mode input voltage range Input bias current IIB VIC = 0, TEST CONDITIONS VICR Input offset current IIO Input offset voltage long-term drift (see Note 4) Input offset voltage VIO PARAMETER TLE2024 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 13 14 Temperature coefficient of input offset voltage αVIO VCC ± = ± 2.5 V to ± 15 V Common-mode rejection ratio Supply-voltage rejection ratio (∆VCC ± /∆VIO) Supply current Supply current change over operating temperature range CMRR kSVR ICC POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ∆ICC No load −15 to 13.5 0.6 25°C 25°C Full range Full range 25°C 93 98 25°C Full range 88 92 25°C Full range 0.4 0.4 −13.6 −13.7 Full range 25°C Full range 25°C 13.7 13.8 Full range Full range −15 to 13.5 25°C 20 1050 112 102 2 −14.1 14.1 −15.3 to 14 1400 1400 90 70 25°C Full range 10 6 1200 1000 MAX Full range 50 0.006 2 TYP TLE2024C MIN 25°C Full range Full range 25°C TA† 95 100 90 94 0.8 0.8 −13.6 −13.7 13.8 13.9 −15 to 13.5 −15 to 13.5 20 1050 115 105 4 −14.1 14.2 −15.3 to 14 45 0.5 0.006 2 TYP TLE2024AC MIN 1400 1400 90 70 10 6 950 750 MAX 98 103 93 97 1 1 −13.6 −13.7 13.9 14 −15 to 13.5 −15 to 13.5 20 1050 117 108 7 −14.1 14.3 −15.3 to 14 40 0.4 0.006 2 TYP TLE2024BC MIN 1400 1400 90 70 10 6 700 500 MAX µA µA A dB dB V/ V V/µV V V V nA nA µV/mo µV/°C µV V UNIT † Full range is 0°C to 70°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. VO = 0, VO = ± 10 V, RS = 50 Ω VIC = VICRmin, Large-signal differential voltage amplification AVD RL = 10 kΩ Maximum negative peak output voltage swing VOM − RL = 10 kΩ Maximum positive peak output voltage swing VOM + RS = 50 Ω RS = 50 Ω Common-mode input voltage range Input bias current IIB VIC = 0, TEST CONDITIONS VICR Input offset current IIO Input offset voltage long-term drift (see Note 4) Input offset voltage VIO PARAMETER TLE2024 electrical characteristics at specified free-air temperature, VCC = ± 15 V (unless otherwise noted) 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 Temperature coefficient of input offset voltage αVIO VIC = VICR min, RS = 50 Ω VCC = 5 V to 30 V Low-level output voltage Large-signal differential voltage amplification Common-mode rejection ratio Supply-voltage rejection ratio (∆VCC /∆VIO) Supply current Supply-current change over operating temperature range VOL AVD CMRR kSVR ICC POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ∆ICC 4 25°C 25°C 25°C Full range Full range 100 105 25°C Full range 80 Full range 85 25°C 0.3 0.25 Full range 25°C Full range 3.9 Full range Full range 0 to 3.2 25°C 6 200 120 110 1.5 0.7 4.3 −0.3 to 4 300 300 0.9 0.8 90 70 25°C Full range 10 6 950 600 MAX Full range 25 0.2 25°C 2 120 TYP TLE2021I 0.005 0 to 3.5 MIN 25°C Full range Full range 25°C TA† 100 105 80 85 0.25 0.3 3.9 4 0 to 3.2 0 to 3.5 6 200 120 110 1.5 0.7 4.3 −0.3 to 4 25 0.2 0.005 2 100 TYP TLE2021AI MIN 300 300 0.9 0.8 90 70 10 6 600 300 MAX 100 105 80 85 0.25 0.3 3.9 4 0 to 3.2 0 to 3.5 6 200 120 110 1.5 0.7 4.3 − 0.3 to 4 25 0.2 0.005 2 80 TYP TLE2021BI MIN 300 300 0.9 0.8 90 70 10 6 300 200 MAX µA µA A dB dB V/ V V/µV V V V nA nA µV/mo µV/°C µV V UNIT † Full range is − 40°C to 85°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. VO = 2.5 V, No load VO = 1.4 V to 4 V, RL = 10 kΩ RL = 10 kΩ High-level output voltage VOH RS = 50 Ω Common-mode input voltage range Input bias current IIB VIC = 0, RS = 50 Ω TEST CONDITIONS VICR Input offset current IIO Input offset voltage long-term drift (see Note 4) Input offset voltage VIO PARAMETER TLE2021 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 15 16 Temperature coefficient of input offset voltage αVIO VIC = VICR min, RS = 50 Ω VCC ± = ± 2. 5 V to ± 15 V Large-signal differential voltage amplification Common-mode rejection ratio Supply-voltage rejection ratio (∆VCC /∆VIO) Supply current Supply-current change over operating temperature range AVD CMRR kSVR ICC POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ∆ICC 14 25°C Full range Full range 25°C 100 105 25°C Full range 96 100 25°C Full range 0.75 1 −13.6 −13.7 Full range 25°C Full range 25°C 13.9 Full range Full range −15 to 13.2 25°C 7 240 120 115 6.5 −14.1 14.3 −15.3 to 14 350 350 90 70 25°C Full range 10 6 850 500 MAX Full range 25 0.2 25°C 2 120 TYP TLE2021I 0.006 −15 to 13.5 MIN 25°C Full range Full range 25°C TA† 100 105 96 100 0.75 1 −13.6 −13.7 13.9 14 −15 to 13.2 −15 to 13.5 7 240 120 115 6.5 −14.1 14.3 −15.3 to 14 25 0.2 0.006 2 80 TYP TLE2021AI MIN 350 350 90 70 10 6 500 200 MAX 100 105 96 100 0.75 1 −13.6 −13.7 13.9 14 −15 to 13.2 −15 to 13.5 7 240 120 115 6.5 −14.1 14.3 −15.3 to 14 25 0.2 0.006 2 40 TYP TLE2021BI MIN 350 350 90 70 10 6 200 100 MAX µA µA A dB dB V/ V V/µV V V V nA nA µV/mo µV/°C µV V UNIT † Full range is − 40°C to 85°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. VO = 0 V, No load VO = 10 V, RL = 10 kΩ Maximum negative peak output voltage swing VOM − RL = 10 kΩ Maximum positive peak output voltage swing RS = 50 Ω VIC = 0, RS = 50 Ω TEST CONDITIONS VOM + Common-mode input voltage range Input bias current IIB VICR Input offset current IIO Input offset voltage long-term drift (see Note 4) Input offset voltage VIO PARAMETER TLE2021 electrical characteristics at specified free-air temperature, VCC = ± 15 V (unless otherwise noted) 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 Temperature coefficient of input offset voltage αVIO VIC = VICRmin, VCC = 5 V to 30 V Low-level output voltage Large-signal differential voltage amplification Common-mode rejection ratio Supply-voltage rejection ratio (∆VCC ± /∆VIO) Supply current Supply current change over operating temperature range VOL AVD CMRR kSVR ICC POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ∆ICC No load RS = 50 Ω RL = 10 kΩ RS = 50 Ω 4 25°C Full range Full range 25°C 95 100 25°C Full range 80 85 25°C Full range 0.2 0.3 Full range 25°C Full range 25°C 3.9 Full range Full range 0 to 3.2 25°C 25 C 15 450 115 100 1.5 0.7 4.3 −0.3 to 4 600 600 0.9 0.8 90 70 25°C Full range 10 6 800 600 MAX Full range 35 0.5 25°C 2 TYP TLE2022I 0.005 0 to 3.5 MIN 25°C Full range Full range 25°C TA† 98 103 82 87 0.2 0.4 3.9 4 0 to 3.2 0 to 3.5 15 450 118 102 1.5 0.7 4.3 −0.3 to 4 33 0.4 0.005 2 TYP TLE2022AI MIN 600 600 0.9 0.8 90 70 10 6 550 400 MAX 100 105 85 90 0.2 0.5 3.9 4 0 to 3.2 0 to 3.5 15 450 120 105 1.5 0.7 4.3 −0.3 to 4 30 0.3 0.005 2 TYP TLE2022BI MIN 600 600 0.9 0.8 90 70 10 6 400 250 MAX µA µA A dB dB V/ V V/µV V V V nA nA µV/mo V/mo µV/°C V/°C µV V UNIT † Full range is − 40°C to 85°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. VO = 2.5 V, VO = 1.4 V to 4 V, RL = 10 kΩ High-level output voltage VOH RS = 50 Ω Common-mode input voltage range Input bias current IIB VIC = 0, TEST CONDITIONS VICR Input offset current IIO Input offset voltage long-term drift (see Note 4) Input offset voltage VIO PARAMETER TLE2022 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 17 18 Temperature coefficient of input offset voltage αVIO POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 VCC = ± 2.5 V to ± 15 V Common-mode rejection ratio Supply-voltage rejection ratio (∆VCC ± /∆VIO) Supply current Supply current change over operating temperature range CMRR kSVR ICC ∆ICC 14 Full range 25°C 25°C Full range Full range 95 100 25°C Full range 91 95 25°C Full range 0.8 0.8 − 13.6 − 13.7 Full range 25°C Full range 25°C 13.9 − 15 to 13.2 Full range − 15 to 13.5 25°C 25 C 30 550 115 106 4 − 14.1 14.3 −15.3 to 14 700 700 90 70 25°C Full range 10 6 700 500 MAX Full range 35 0.5 25°C 2 150 TYP TLE2022I 0.006 MIN 25°C Full range Full range 25°C TA† 98 103 93 97 1 1 − 13.6 − 13.7 13.9 14 − 15 to 13.2 − 15 to 13.5 30 550 118 109 7 − 14.1 14.3 −15.3 to 14 33 0.4 0.006 2 120 TYP TLE2022AI MIN 700 700 90 70 10 6 450 300 MAX 100 105 96 100 1.5 1.5 − 13.6 − 13.7 13.9 14 − 15 to 13.2 − 15 to 13.5 30 550 120 112 10 − 14.1 14.3 −15.3 to 14 30 0.3 0.006 2 70 TYP TLE2022BI MIN 700 700 90 70 10 6 300 150 MAX µA µA A dB dB V/ V V/µV V V V nA nA µV/mo V/mo µV/°C V/°C µV V UNIT † Full range is − 40°C to 85°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. VO = 0, VO = ± 10 V, No load VIC = VICRmin, RS = 50 Ω Large-signal differential voltage amplification AVD RL = 10 kΩ Maximum negative peak output voltage swing VOM − RL = 10 kΩ Maximum positive peak output voltage swing VOM + RS = 50 Ω RS = 50 Ω Common-mode input voltage range Input bias current IIB VIC = 0, TEST CONDITIONS VICR Input offset current IIO Input offset voltage long-term drift (see Note 4) Input offset voltage VIO PARAMETER TLE2022 electrical characteristics at specified free-air temperature, VCC = ± 15 V (unless otherwise noted) 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 Temperature coefficient of input offset voltage αVIO POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 VCC ± = ± 2.5 V to ± 15 V Common-mode rejection ratio Supply-voltage rejection ratio (∆VCC± /∆VIO) Supply current Supply current change over operating temperature range CMRR kSVR ICC ∆ICC No load 25°C 25°C 98 93 25°C Full range Full range Full range 25°C 80 80 25°C Full range 0.1 0.2 Full range 25°C Full range 3.7 3.9 Full range Full range 0 to 3.2 25°C 30 800 112 90 1.5 0.7 4.2 −0.3 to 4 1200 1200 0.95 0.8 90 70 25°C Full range 10 6 1300 1100 MAX Full range 45 0.6 25°C 2 TYP 0.005 0 to 3.5 MIN TLE2024I 25°C Full range Full range 25°C TA† 95 100 82 82 0.1 0.3 3.7 3.9 0 to 3.2 0 to 3.5 MIN 30 800 115 92 1.5 0.7 4.2 −0.3 to 4 40 0.5 0.005 2 TYP TLE2024AI 1200 1200 0.95 0.8 90 70 10 6 1050 850 MAX 98 103 85 85 0.1 0.4 3.8 4 0 to 3.2 0 to 3.5 MIN 30 800 117 95 1.5 0.7 4.3 −0.3 to 4 35 0.4 0.005 2 TYP TLE2024BI 1200 1200 0.95 0.8 90 70 10 6 800 600 MAX µA µA A dB dB V/ V V/µV V V V nA nA µV/mo µV/°C µV V UNIT † Full range is − 40°C to 85°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. VO = 0, VO = 1.4 V to 4 V, RS = 50 Ω VIC = VICRmin, Large-signal differential voltage amplification AVD RL = 10 kΩ Maximum negative peak output voltage swing VOM − RL = 10 kΩ Maximum positive peak output voltage swing VOM + RS = 50 Ω RS = 50 Ω Common-mode input voltage range Input bias current IIB VIC = 0, TEST CONDITIONS VICR Input offset current IIO Input offset voltage long-term drift (see Note 4) Input offset voltage VIO PARAMETER TLE2024 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 19 20 VCC ± = ± 2.5 V to ± 15 V Common-mode rejection ratio Supply-voltage rejection ratio (∆VCC ± /∆VIO) Supply current Supply current change over operating temperature range CMRR kSVR ICC POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ∆ICC −15 to 13.5 No load 25°C Full range Full range 25°C 93 98 25°C Full range 88 92 25°C Full range 0.4 0.4 −13.6 −13.7 Full range 25°C Full range 25°C 13.7 13.8 Full range Full range −15 to 13.2 25°C Full range 50 1050 112 102 2 −14.1 14.1 −15.3 to 14 1400 1400 90 70 25°C 50 10 Full range 6 1200 1000 MAX 95 100 90 94 0.8 0.8 −13.6 −13.7 13.7 13.9 −15 to 13.2 −15 to 13.5 50 1050 115 105 4 −14.1 14.2 −15.3 to 14 45 0.5 0.006 2 TYP TLE2024AI MIN 1400 1400 90 70 10 6 950 750 MAX 98 103 93 97 1 1 −13.6 −13.7 13.8 14 −15 to 13.2 −15 to 13.5 50 1050 117 108 7 −14.1 14.3 −15.3 to 14 40 0.4 0.006 2 TYP TLE2024BI MIN 1400 1400 90 70 10 6 700 500 MAX µA µA A dB dB V/ V V/µV V V V nA nA µV/mo µV/°C µV V UNIT † Full range is − 40°C to 85°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. VO = 0, VO = ± 10 V, RS = 50 Ω VIC = VICRmin, Large-signal differential voltage amplification AVD RL = 10 kΩ Maximum negative peak output voltage swing VOM − RL = 10 kΩ Maximum positive peak output voltage swing VOM + RS = 50 Ω Common-mode input voltage range VICR Input bias current IIB 0.6 25°C Input offset current IIO 0.006 25°C Input offset voltage long-term drift (see Note 4) RS = 50 Ω Full range 2 TYP TLE2024I Temperature coefficient of input offset voltage VIC = 0, MIN αVIO Full range 25°C TA† Input offset voltage TEST CONDITIONS VIO PARAMETER TLE2024 electrical characteristics at specified free-air temperature, VCC = ± 15 V (unless otherwise noted) 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 Temperature coefficient of input offset voltage αVIO VIC = VICRmin, VCC = 5 V to 30 V Low-level output voltage Large-signal differential voltage amplification Common-mode rejection ratio Supply-voltage rejection ratio (∆VCC ± /∆VIO) Supply current Supply current change over operating temperature range VOL AVD CMRR kSVR ICC POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ∆ICC No load RS = 50 Ω RL = 10 kΩ RS = 50 Ω 0 to 3.5 0.2 25°C 4 25°C 25°C 25°C Full range Full range 100 105 25°C Full range 80 85 25°C Full range 0.1 0.3 Full range 25°C Full range 3.8 Full range Full range 0 to 3.2 25°C 9 170 120 110 1.5 0.7 4.3 −0.3 to 4 230 230 0.95 0.8 90 70 25°C Full range 10 6 1100 600 MAX Full range 25 0.005 2 120 TYP TLE2021M MIN 25°C Full range Full range 25°C TA† 100 105 80 85 0.1 0.3 3.8 4 0 to 3.2 0 to 3.5 9 170 120 110 1.5 0.7 4.3 −0.3 to 4 25 0.2 0.005 2 100 TYP TLE2021AM MIN 230 230 0.95 0.8 90 70 10 6 600 300 MAX 100 105 80 85 0.1 0.3 3.8 4 0 to 3.2 0 to 3.5 9 170 120 110 1.5 0.7 4.3 −0.3 to 4 25 0.2 0.005 2 80 TYP TLE2021BM MIN 230 230 0.95 0.8 90 70 10 6 300 200 MAX µA µA A dB dB V/ V V/µV V V V nA nA µV/mo µV/°C µV V UNIT † Full range is − 55°C to 125°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. VO = 2.5 V, VO = 1.4 V to 4 V, RL = 10 kΩ High-level output voltage VOH RS = 50 Ω Common-mode input voltage range Input bias current IIB VIC = 0, TEST CONDITIONS VICR Input offset current IIO Input offset voltage long-term drift (see Note 4) Input offset voltage VIO PARAMETER TLE2021 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 21 22 Temperature coefficient of input offset voltage αVIO POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 VCC ± = ± 2.5 V to ± 15 V Common-mode rejection ratio Supply-voltage rejection ratio (∆VCC ± /∆VIO) Supply current Supply current change over operating temperature range CMRR kSVR ICC ∆ICC No load −15 to 13.5 0.2 25°C 14 25°C 25°C 105 100 25°C Full range Full range Full range 25°C 96 100 25°C Full range 0.5 1 −13.6 −13.7 Full range 25°C Full range 13.8 Full range Full range −15 to 13.2 25°C 10 200 120 115 6.5 −14.1 14.3 −15.3 to 14 300 300 90 70 25°C Full range 10 6 1000 500 MAX Full range 25 0.006 2 120 TYP TLE2021M MIN 25°C Full range Full range 25°C TA† 100 105 96 100 0.5 1 −13.6 −13.7 13.8 14 −15 to 13.2 −15 to 13.5 10 200 120 115 6.5 −14.1 14.3 −15.3 to 14 25 0.2 0.006 2 80 TYP TLE2021AM MIN 300 300 90 70 10 6 500 200 MAX 100 105 96 100 0.5 1 −13.6 −13.7 13.8 14 −15 to 13.2 −15 to 13.5 10 200 120 115 6.5 −14.1 14.3 −15.3 to 14 25 0.2 0.006 2 40 TYP TLE2021BM MIN 300 300 90 70 10 6 200 100 MAX µA µA A dB dB V/ V V/µV V V V nA nA µV/mo µV/°C µV V UNIT † Full range is − 55°C to 125°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. VO = 0, VO = ± 10 V, RS = 50 Ω VIC = VICRmin, Large-signal differential voltage amplification AVD RL = 10 kΩ Maximum negative peak output voltage swing VOM − RL = 10 kΩ Maximum positive peak output voltage swing VOM + RS = 50 Ω RS = 50 Ω Common-mode input voltage range Input bias current IIB VIC = 0, TEST CONDITIONS VICR Input offset current IIO Input offset voltage long-term drift (see Note 4) Input offset voltage VIO PARAMETER TLE2021 electrical characteristics at specified free-air temperature, VCC = ±15 V (unless otherwise noted) 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 Temperature coefficient of input offset voltage αVIO VIC = VICRmin, VCC = 5 V to 30 V Low-level output voltage Large-signal differential voltage amplification Common-mode rejection ratio Supply-voltage rejection ratio (∆VCC ± /∆VIO) Supply current Supply current change over operating temperature range VOL AVD CMRR kSVR ICC POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ∆ICC No load RS = 50 Ω RL = 10 kΩ RS = 50 Ω 0.5 25°C 4 Full range 25°C Full range Full range 25°C 95 100 25°C Full range 80 85 25°C Full range 0.1 0.3 Full range 25°C Full range 25°C 3.8 0 to 3.2 Full range 0 to 3.5 25°C 25 C 37 450 115 100 1.5 0.7 4.3 −0.3 to 4 600 600 0.95 0.8 90 70 25°C Full range 10 6 800 600 MAX Full range 35 0.005 2 TYP TLE2022M MIN 25°C Full range Full range 25°C TA† 98 103 82 87 0.1 0.4 3.8 4 0 to 3.2 0 to 3.5 37 450 118 102 1.5 0.7 4.3 −0.3 to 4 33 0.4 0.005 2 TYP TLE2022AM MIN 600 600 0.95 0.8 90 70 10 6 550 400 MAX 100 105 85 90 0.1 0.5 3.8 4 0 to 3.2 0 to 3.5 37 450 120 105 1.5 0.7 4.3 −0.3 to 4 30 0.3 0.005 2 TYP 600 600 0.95 0.8 90 70 10 6 400 250 MAX TLE2022BM MIN µA µA A dB dB V/ V V/µV V V V nA nA µV/mo V/mo µV/°C V/°C µV V UNIT † Full range is − 55°C to 125°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. VO = 2.5 V, VO = 1.4 V to 4 V, RL = 10 kΩ High-level output voltage VOH RS = 50 Ω Common-mode input voltage range Input bias current IIB VIC = 0, TEST CONDITIONS VICR Input offset current IIO Input offset voltage long-term drift (see Note 4) Input offset voltage VIO PARAMETER TLE2022 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 23 24 Temperature coefficient of input offset voltage αVIO POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 VCC ± = ± 2.5 V to ± 15 V Common-mode rejection ratio Supply-voltage rejection ratio (∆VCC ± /∆VIO) Supply current Supply current change over operating temperature range CMRR kSVR ICC ∆ICC No load 0.5 25°C 14 Full range 25°C 25°C Full range Full range 95 100 25°C Full range 91 95 25°C Full range 0.8 0.8 −13.6 −13.7 Full range 25°C Full range 25°C 13.9 −15 to 13.2 Full range −15 to 13.5 25°C 25 C 60 550 115 106 4 −14.1 14.3 −15.3 to 14 700 700 90 70 25°C Full range 10 6 700 500 MAX Full range 35 0.006 2 150 TYP TLE2022M MIN 25°C Full range Full range 25°C TA† 98 103 93 97 1 1 −13.6 −13.7 13.9 14 −15 to 13.2 −15 to 13.5 60 550 118 109 7 −14.1 14.3 −15.3 to 14 33 0.4 0.006 2 120 TYP TLE2022AM MIN 700 700 90 70 10 6 450 300 MAX 100 105 96 100 1.5 1.5 −13.6 −13.7 13.9 14 −15 to 13.2 −15 to 13.5 60 550 120 112 10 −14.1 14.3 −15.3 to 14 30 0.3 0.006 2 70 TYP TLE2022BM MIN 700 700 90 70 10 6 300 150 MAX µA µA A dB dB V/ V V/µV V V V nA nA µV/mo V/mo µV/°C V/°C µV V UNIT † Full range is 0°C to 70°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. VO = 0, VO = ± 10 V, RS = 50 Ω VIC = VICRmin, Large-signal differential voltage amplification AVD RL = 10 kΩ Maximum negative peak output voltage swing VOM − RL = 10 kΩ Maximum positive peak output voltage swing VOM + RS = 50 Ω RS = 50 Ω Common-mode input voltage range Input bias current IIB VIC = 0, TEST CONDITIONS VICR Input offset current IIO Input offset voltage long-term drift (see Note 4) Input offset voltage VIO PARAMETER TLE2022 electrical characteristics at specified free-air temperature, VCC = ± 15 V (unless otherwise noted) 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 Temperature coefficient of input offset voltage αVIO POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 VCC ± = ± 2.5 V to ± 15 V Common-mode rejection ratio Supply-voltage rejection ratio (∆VCC± /∆VIO) Supply current Supply current change over operating temperature range CMRR kSVR ICC ∆ICC No load 25°C 25°C 98 93 25°C Full range Full range Full range 25°C 80 80 25°C Full range 0.1 0.2 Full range 25°C Full range 3.7 3.9 Full range Full range 0 to 3.2 25°C 50 800 112 90 1.5 0.7 4.2 −0.3 to 4 1200 1200 0.95 0.8 90 70 25°C Full range 10 6 1300 1100 MAX Full range 45 0.6 25°C 2 TYP 0.005 0 to 3.5 MIN TLE2024M 25°C Full range Full range 25°C TA† 95 100 82 82 0.1 0.3 3.7 3.9 0 to 3.2 0 to 3.5 MIN 50 800 115 92 1.5 0.7 4.2 −0.3 to 4 40 0.5 0.005 2 TYP TLE2024AM 1200 1200 0.95 0.8 90 70 10 6 1050 850 MAX 98 103 85 85 0.1 0.4 3.8 4 0 to 3.2 0 to 3.5 MIN 50 800 117 95 1.5 0.7 4.3 −0.3 to 4 35 0.4 0.005 2 TYP TLE2024BM 1200 1200 0.95 0.8 90 70 10 6 800 600 MAX µA µA A dB dB V/ V V/µV V V V nA nA µV/mo µV/°C µV V UNIT † Full range is − 55°C to 125°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. VO = 0, VO = 1.4 V to 4 V, RS = 50 Ω VIC = VICRmin, Large-signal differential voltage amplification AVD RL = 10 kΩ Maximum negative peak output voltage swing VOM − RL = 10 kΩ Maximum positive peak output voltage swing VOM + RS = 50 Ω RS = 50 Ω Common-mode input voltage range Input bias current IIB VIC = 0, TEST CONDITIONS VICR Input offset current IIO Input offset voltage long-term drift (see Note 4) Input offset voltage VIO PARAMETER TLE2024 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 25 26 Temperature coefficient of input offset voltage αVIO VCC ± = ± 2.5 V to ± 15 V Common-mode rejection ratio Supply-voltage rejection ratio (∆VCC ± /∆VIO) Supply current Supply current change over operating temperature range CMRR kSVR ICC POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ∆ICC No load −15 to 13.5 0.6 25°C 25°C Full range Full range 25°C 93 98 25°C Full range 88 92 25°C Full range 0.4 0.4 −13.6 −13.7 Full range 25°C Full range 25°C 13.7 13.8 Full range Full range −15 to 13.2 25°C 85 1050 112 102 2 −14.1 14.1 −15.3 to 14 1400 1400 90 70 25°C Full range 10 6 1200 1000 MAX Full range 50 0.006 2 TYP TLE2024M MIN 25°C Full range Full range 25°C TA† 95 100 90 94 0.8 0.8 −13.6 −13.7 13.7 13.9 −15 to 13.2 −15 to 13.5 85 1050 115 105 4 −14.1 14.2 −15.3 to 14 45 0.5 0.006 2 TYP TLE2024AM MIN 1400 1400 90 70 10 6 950 750 MAX 98 103 93 97 1 1 −13.6 −13.7 13.8 14 −15 to 13.2 −15 to 13.5 85 1050 117 108 7 −14.1 14.3 −15.3 to 14 40 0.4 0.006 2 TYP TLE2024BM MIN 1400 1400 90 70 10 6 700 500 MAX µA µA A dB dB V/ V V/µV V V V nA nA µV/mo µV/°C µV V UNIT † Full range is − 55°C to 125°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. VO = 0, VO = ± 10 V, RS = 50 Ω VIC = VICRmin, Large-signal differential voltage amplification AVD RL = 10 kΩ Maximum negative peak output voltage swing VOM − RL = 10 kΩ Maximum positive peak output voltage swing VOM + RS = 50 Ω RS = 50 Ω Common-mode input voltage range Input bias current IIB VIC = 0, TEST CONDITIONS VICR Input offset current IIO Input offset voltage long-term drift (see Note 4) Input offset voltage VIO PARAMETER TLE2024 electrical characteristics at specified free-air temperature, VCC = ± 15 V (unless otherwise noted) 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 Phase margin at unity gain φm 42° 1.2 0.09 0.47 0.16 30 50 MAX 0.42 0.45 MIN 0.09 0.47 0.16 15 19 0.65 TYP I SUFFIX 30 50 MAX 42° 1.2 0.9 0.47 0.16 17 21 0.5 TYP 0.45 0.09 0.47 0.16 15 19 0.65 TYP M SUFFIX 0.45 MIN MIN 46° 2 0.09 30 50 MAX 30 50 MAX φm Phase margin at unity gain See Figure 3 25°C 46° 46° † Full range is 0°C to 70°C for the C-suffix devices, − 40°C to 85°C for the I-suffix devices, and − 55°C to 125°C for the M-suffix devices. 25°C 0.47 0.16 15 19 0.65 TYP C SUFFIX 42° 1.2 0.09 0.47 0.16 17 21 0.5 TYP M SUFFIX 2 25°C Unity-gain bandwidth See Figure 3 Equivalent input noise current 25°C 0.45 0.45 MIN MIN I SUFFIX 2 In B1 f = 0.1 to 10 Hz 25°C 25°C f = 0.1 to 1 Hz Peak-to-peak equivalent input noise voltage VN(PP) 25°C Full range 25°C f = 10 Hz Equivalent input noise voltage (see Figure 2) Vn See Figure 1 TA† f = 1 kHz VO = 1V to 3 V, Slew rate at unity gain TEST CONDITIONS SR PARAMETER TLE2021 operating characteristics at specified free-air temperature, VCC = ± 15 V 25°C 25°C See Figure 3 25°C See Figure 3 25°C 25°C f = 0.1 to 1 Hz f = 0.1 to 10 Hz Unity-gain bandwidth Peak-to-peak equivalent input noise voltage VN(PP) 17 21 25°C 0.5 TYP 25°C MIN C SUFFIX 25°C f = 1 kHz See Figure 1 TA Equivalent input noise current Equivalent input noise voltage (see Figure 2) Vn VO = 1 V to 3 V, f = 10 Hz TEST CONDITIONS In B1 Slew rate at unity gain SR PARAMETER TLE2021 operating characteristics, VCC = 5 V, TA = 25°C MAX MAX MHz pA/Hz µV V nV/Hz V/ s V/µs UNIT MHz pA/Hz µV V nV/Hz V/µs UNIT 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 27 28 See Figure 3 See Figure 3 Peak-to-peak equivalent input noise voltage Equivalent input noise current Unity-gain bandwidth Phase margin at unity gain VN(PP) In B1 φm See Figure 1 MIN 47° 1.7 0.1 0.47 0.16 17 30 Unity-gain bandwidth Equivalent input noise current φm Phase margin at unity gain † Full range is 0°C to 70°C. In B1 See Figure 3 See Figure 3 25°C 25°C 25°C 25°C 25°C f = 0.1 to 10 Hz f = 0.1 to 1 Hz Peak-to-peak equivalent input noise voltage VN(PP) 25°C Full range 25°C 25°C f = 10 Hz Equivalent input noise voltage (see Figure 2) Vn See Figure 1 TA† f = 1 kHz VO = ± 10 V, Slew rate at unity gain TEST CONDITIONS SR PARAMETER 0.45 0.45 MIN 52° 2.8 0.1 0.47 0.16 15 19 0.65 TYP C SUFFIX 30 50 MAX 0.42 0.45 MIN 52° 2.8 0.1 0.47 0.16 15 19 0.65 TYP I SUFFIX 47° 1.7 0.1 0.47 0.16 17 21 TYP I SUFFIX 0.5 50 MIN 21 MAX 0.5 TYP C SUFFIX TLE2022 operating characteristics at specified free-air temperature, VCC = ± 15 V f = 0.1 to 10 Hz f = 0.1 to 1 Hz f = 1 kHz Equivalent input noise voltage (see Figure 2) Vn VO = 1 V to 3 V, f = 10 Hz Slew rate at unity gain TEST CONDITIONS SR PARAMETER TLE2022 operating characteristics, VCC = 5 V, TA = 25°C 30 50 MAX 30 50 MAX 0.4 52° 2.8 0.1 0.47 0.16 15 19 0.65 TYP M SUFFIX 47° 1.7 0.1 0.47 0.16 17 21 0.5 TYP M SUFFIX 0.45 MIN MIN MAX MAX MHz pA/√Hz µV V nV/√Hz V/ s V/µs UNIT MHz pA/√Hz µV V nV/√Hz V/µs UNIT 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 0.1 1.7 Peak-to-peak equivalent input noise voltage Equivalent input noise current Unity-gain bandwidth Phase margin at unity gain In B1 φm 47° 0.47 0.16 30 47° 1.7 0.1 0.47 0.16 17 30 50 MAX MIN 47° 1.7 0.1 0.47 0.16 17 21 0.5 TYP M SUFFIX 25°C 25°C See Figure 3 25°C Unity-gain bandwidth See Figure 3 Equivalent input noise current φm Phase margin at unity gain † Full range is 0°C to 70°C. In B1 25°C 25°C f = 0.1 to 10 Hz f = 0.1 to 1 Hz Peak-to-peak equivalent input noise voltage VN(PP) 25°C Full range 25°C 25°C f = 10 Hz Equivalent input noise voltage (see Figure 2) Vn See Figure 1 TA† f = 1 kHz VO = ± 10 V, Slew rate at unity gain TEST CONDITIONS SR PARAMETER 0.45 0.45 MIN 52° 2.8 0.1 0.47 0.16 15 19 0.7 TYP C SUFFIX 30 50 MAX 0.42 0.45 MIN 52° 2.8 0.1 0.47 0.16 15 19 0.7 TYP I SUFFIX 30 50 MAX 0.4 52° 2.8 0.1 0.47 0.16 15 19 0.7 TYP M SUFFIX 0.45 MIN TLE2024 operating characteristics at specified free-air temperature, VCC = ± 15 V (unless otherwise noted) See Figure 3 See Figure 3 f = 0.1 to 10 Hz f = 0.1 to 1 Hz 17 VN(PP) f = 1 kHz 21 TYP 0.5 50 MIN 21 MAX I SUFFIX 0.5 Equivalent input noise voltage (see Figure 2) See Figure 1 TYP Vn VO = 1 V to 3 V, f = 10 Hz MIN C SUFFIX Slew rate at unity gain TEST CONDITIONS SR PARAMETER TLE2024 operating characteristics, VCC = 5 V, TA = 25°C MAX MAX MHz pA/√Hz µV V nV/√Hz V/ s V/µs UNIT MHz pA/√Hz µV V nV/√ Hz V/µs UNIT 222 222 2 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 29 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TLE2021Y electrical characteristics at VCC = 5 V, TA = 25°C (unless otherwise noted) TLE2021Y PARAMETER VIO TEST CONDITIONS Input offset voltage TYP MAX 0.5 nA 35 nA − 0.3 to 4 V 4.3 V 0.7 V RL = 10 kΩ 1.5 V/µV RS = 50 Ω 100 dB 115 dB Input bias current RS = 50 Ω VICR Common-mode input voltage range VOH VOL Maximum high-level output voltage AVD CMRR Large-signal differential voltage amplification kSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) RL = 10 kΩ Maximum low-level output voltage Common-mode rejection ratio VO = 1.4 to 4 V, VIC = VICR min, µV/mo 0.005 RS = 50 Ω VIC = 0, Input offset current UNIT µV 150 Input offset voltage long-term drift (see Note 4) IIO IIB MIN VCC = 5 V to 30 V VO = 2.5 V, No load ICC Supply current 400 µA NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. TLE2021Y operating characteristics at VCC = 5 V, TA = 25°C TLE2021Y PARAMETER SR TEST CONDITIONS Slew rate at unity gain MIN TYP VO = 1 V to 3 V f = 10 Hz 0.5 f = 1 kHz 17 MAX UNIT V/µs 21 nV/√Hz Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current 0.1 pA/√Hz B1 φm Unity-gain bandwidth 1.7 MHz Phase margin at unity gain 47° 30 POST OFFICE BOX 655303 f = 0.1 to 1 Hz 0.16 f = 0.1 to 10 Hz 0.47 • DALLAS, TEXAS 75265 V µV SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TLE2022Y electrical characteristics, VCC = 5 V, TA = 25°C (unless otherwise noted) TLE2022Y PARAMETER VIO TEST CONDITIONS Input offset voltage Input offset voltage long-term drift (see Note 4) IIO IIB MIN VIC = 0, Input offset current RS = 50 Ω VOH VOL Maximum high-level output voltage AVD CMRR Large-signal differential voltage amplification Common-mode rejection ratio VO = 1.4 to 4 V, VIC = VICR min, 600 µV µV/mo nA 35 nA − 0.3 to 4 V 4.3 V 0.7 V RL= 10 kΩ 1.5 V/µV RS = 50 Ω 100 dB RL = 10 kΩ Maximum low-level output voltage 150 UNIT 0.5 RS = 50 Ω Common-mode input voltage range MAX 0.005 Input bias current VICR TYP kSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC = 5 V to 30 V 115 dB ICC Supply current VO = 2.5 V, No load 450 µA NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. TLE2022Y operating characteristics, VCC = 5 V, TA = 25°C TLE2022Y PARAMETER SR TEST CONDITIONS Slew rate at unity gain VO = 1 V to 3 V, f = 10 Hz See Figure 1 MIN TYP 0.5 MAX UNIT V/µs 21 Vn Equivalent input noise voltage (see Figure 2) VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current 0.1 pA/√Hz B1 φm Unity-gain bandwidth See Figure 3 1.7 MHz Phase margin at unity gain See Figure 3 47° f = 1 kHz 17 f = 0.1 to 1 Hz 0.16 f = 0.1 to 10 Hz 0.47 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 nV/√Hz V µV 31 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TLE2024Y electrical characteristics, VCC = 5 V, TA = 25°C (unless otherwise noted) TLE2024Y PARAMETER TEST CONDITIONS MIN Input offset voltage long-term drift (see Note 4) IIO IIB Input offset current Common-mode input voltage range VOH VOL High-level output voltage MAX RS = 50 Ω RS = 50 Ω UNIT µV/mo 0.005 VIC = 0, Input bias current VICR TYP 0.6 nA 45 nA −0.3 to 4 V 4.2 V 0.7 V Low-level output voltage RL = 10 kΩ AVD Large-signal differential voltage amplification VO = 1.4 V to 4 V, RL = 10 kΩ 1.5 V/µV CMRR Common-mode rejection ratio VIC = VICRmin, RS = 50 Ω 90 dB kSVR Supply-voltage rejection ratio (∆VCC /∆VIO) VCC = 5 V to 30 V 112 dB ICC Supply current VO = 2.5 V, No load 800 µA NOTE 4. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. TLE2024Y operating characteristics, VCC = 5 V, TA = 25°C TLE2024Y PARAMETER TEST CONDITIONS UNIT Vn Equivalent input noise voltage (see Figure 2) VN(PP) Peak-to-peak equivalent input noise voltage In B1 Equivalent input noise current 0.1 pA/√Hz Unity-gain bandwidth See Figure 3 1.7 MHz φm Phase margin at unity gain See Figure 3 47° POST OFFICE BOX 655303 0.5 MAX Slew rate at unity gain f = 1 kHz See Figure 1 TYP SR 32 VO = 1 V to 3 V, f = 10 Hz MIN 21 17 f = 0.1 to 1 Hz 0.16 f = 0.1 to 10 Hz 0.47 • DALLAS, TEXAS 75265 V/µs nV/√ Hz µV V SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 PARAMETER MEASUREMENT INFORMATION 20 kΩ 20 kΩ 5V 15 V − − VO VO VI + 30 pF (see Note A) + VI −15 V 30 pF (see Note A) 20 kΩ (a) SINGLE SUPPLY 20 kΩ (b) SPLIT SUPPLY NOTE A: CL includes fixture capacitance. Figure 1. Slew-Rate Test Circuit 2 kΩ 2 kΩ 15 V 5V − 20 Ω VO − + VO 2.5 V + −15 V 20 Ω 20 Ω 20 Ω (a) SINGLE SUPPLY (b) SPLIT SUPPLY Figure 2. Noise-Voltage Test Circuit 100 Ω VI 10 kΩ 10 kΩ 5V 15 V − VI VO 2.5 V − 100 Ω VO + + 30 pF (see Note A) −15 V 30 pF (see Note A) 10 kΩ (a) SINGLE SUPPLY 10 kΩ (b) SPLIT SUPPLY NOTE A: CL includes fixture capacitance. Figure 3. Unity-Gain Bandwidth and Phase-Margin Test Circuit POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 33 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 PARAMETER MEASUREMENT INFORMATION 5V − − 10 kΩ VI VO VO VI + 10 kΩ + 0.1 µF 15 V − 15 V 10 kΩ 30 pF (see Note A) 30 pF (see Note A) (a) SINGLE SUPPLY 10 kΩ (b) SPLIT SUPPLY NOTE A: CL includes fixture capacitance. Figure 4. Small-Signal Pulse-Response Test Circuit typical values Typical values presented in this data sheet represent the median (50% point) of device parametric performance. 34 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TYPICAL CHARACTERISTICS Table of Graphs FIGURE VIO Input offset voltage Distribution IIB Input bias current vs Common-mode input voltage vs Free-air temperature II Input current vs Differential input voltage VOM Maximum peak output voltage vs Output current vs Free-air temperature VOH High-level output voltage vs High-level output current vs Free-air temperature 19, 20 21 VOL Low-level output voltage vs Low-level output current vs Free-air temperature 22 23 VO(PP) Maximum peak-to-peak output voltage vs Frequency AVD Large-signal differential voltage amplification vs Frequency vs Free-air temperature 26 27, 28, 29 IOS Short-circuit output current vs Supply voltage vs Free-air temperature 30 − 33 34 − 37 ICC Supply current vs Supply voltage vs Free-air temperature 38, 39, 40 41, 42, 43 CMRR Common-mode rejection ratio vs Frequency 44, 45, 46 SR Slew rate vs Free-air temperature 47, 48, 49 Voltage-follower small-signal pulse response 5, 6, 7 8, 9, 10 11, 12, 13 14 15, 16, 17 18 24, 25 50, 51 Voltage-follower large-signal pulse response 52 − 57 VN(PP) Peak-to-peak equivalent input noise voltage 0.1 to 1 Hz 0.1 to 10 Hz Vn Equivalent input noise voltage vs Frequency B1 Unity-gain bandwidth vs Supply voltage vs Free-air temperature 61, 62 63, 64 φm Phase margin vs Supply voltage vs Load capacitance vs Free-air temperature 65, 66 67, 68 69, 70 Phase shift vs Frequency POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 58 59 60 26 35 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLE2022 INPUT OFFSET VOLTAGE DISTRIBUTION OF TLE2021 INPUT OFFSET VOLTAGE 20 ÏÏÏÏÏÏÏÏÏÏÏ 20 231 Units Tested From 1 Wafer Lot VCC ± = ± 15 V ÏÏÏÏ TA = 25°C P Package 16 Percentage of Units − % Percentage of Units − % 16 398 Amplifiers Tested From 1 Wafer Lot VCC ± = ± 15 V TA = 25°C 12 8 P Package 12 8 4 4 0 −600 −450 −300 −150 150 300 450 0 VIO − Input Offset Voltage − µV 0 −600 600 −400 −200 0 200 400 VIO − Input Offset Voltage − µV Figure 5 Figure 6 TLE2021 INPUT BIAS CURRENT vs COMMON-MODE INPUT VOLTAGE DISTRIBUTION OF TLE2024 INPUT OFFSET VOLTAGE 16 −40 796 Amplifiers Tested From 1 Wafer Lot VCC ± = ± 15 V TA = 25°C N Package VCC ± = ± 15 V TA = 25°C −35 IIB I IB − Input Bias Current − nA Percentage of Units − % 600 12 8 4 −30 −25 −20 −15 −10 −5 0 −1 −0.5 0 0.5 1 VIO − Input Offset Voltage − mV 0 −15 −10 −5 0 5 10 VIC − Common-Mode Input Voltage − V Figure 8 Figure 7 36 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TYPICAL CHARACTERISTICS TLE2022 INPUT BIAS CURRENT vs COMMON-MODE INPUT VOLTAGE TLE2024 INPUT BIAS CURRENT vs COMMON-MODE INPUT VOLTAGE −50 −60 VCC ± = ± 15 V TA = 25°C IIIB IB − Input Bias Current − nA IIB I IB − Input Bias Current − nA −45 VCC ± = ± 15 V TA = 25°C −40 −35 −40 ÁÁ ÁÁ −30 −25 −20 −15 −50 −10 −5 0 5 10 VIC − Common-Mode Input Voltage − V −30 −20 −15 15 −10 −5 15 10 TLE2022 INPUT BIAS CURRENT† vs FREE-AIR TEMPERATURE TLE2021 INPUT BIAS CURRENT† vs FREE-AIR TEMPERATURE −50 −35 VCC ± = ± 15 V VO = 0 VIC = 0 −25 −20 −15 −10 VCC ± = ± 15 V VO = 0 VIC = 0 −45 IIIB IB − Input Bias Current − nA IIB I IB − Input Bias Current − nA 5 Figure 10 Figure 9 −30 0 VIC − Common-Mode Input Voltage − V −40 −35 −30 −25 −5 0 −75 −50 −25 0 25 50 75 100 TA − Free-Air Temperature − °C 125 −20 −75 −50 −25 0 25 50 75 100 125 TA − Free-Air Temperature − °C Figure 11 Figure 12 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 37 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TYPICAL CHARACTERISTICS TLE2024 INPUT BIAS CURRENT† vs FREE-AIR TEMPERATURE INPUT CURRENT vs DIFFERENTIAL INPUT VOLTAGE ÏÏÏÏÏ ÏÏÏ ÏÏÏ ÏÏÏ −60 1 ÁÁ ÁÁ −50 VCC± = ±15 V VIC = 0 TA = 25°C 0.9 0.8 I III − Input Current − mA IIB − Input Bias Current − nA IIB VCC± = ±15 V VO = 0 VIC = 0 −40 −30 0.7 0.6 0.5 0.4 0.3 0.2 0.1 −20 −75 0 −50 −25 0 25 50 75 100 0 125 TA − Free-Air Temperature − °C 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 |VID| − Differential Input Voltage − V Figure 14 Figure 13 TLE2022 MAXIMUM PEAK OUTPUT VOLTAGE vs OUTPUT CURRENT TLE2021 MAXIMUM PEAK OUTPUT VOLTAGE vs OUTPUT CURRENT 16 VCC ± = ± 15 V TA = 25°C 14 12 ÏÏÏÏ ÏÏÏÏ 10 VOM − 8 |VVOM| OM − Maximum Peak Output Voltage − V VOM − Maximum Peak Output Voltage − V V OM 16 ÏÏÏÏ ÏÏÏÏ VOM+ 6 ÁÁÁ ÁÁÁ ÁÁÁ ÁÁ ÁÁ 4 2 0 0 2 4 6 8 IO − Output Current − mA 10 VCC ± = ± 15 V TA = 25°C 14 12 ÏÏÏÏ ÏÏÏÏ 10 VOM− 8 ÏÏÏ ÏÏÏ VOM+ 6 4 2 0 0 2 4 6 8 10 |IO| − Output Current − mA 12 Figure 16 Figure 15 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 38 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 14 1 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TYPICAL CHARACTERISTICS TLE2024 MAXIMUM PEAK OUTPUT VOLTAGE vs OUTPUT CURRENT 15 ÏÏÏÏ VCC ± = ± 15 V TA = 25°C 14 12 ÏÏÏ ÏÏÏ 10 VOM − 8 |VVOM| OM − Maximum Peak Output Voltage − V VOM − Maximum Peak Output Voltage − V VOM 16 MAXIMUM PEAK OUTPUT VOLTAGE† vs FREE-AIR TEMPERATURE ÏÏÏ VOM + 6 ÁÁ ÁÁ ÁÁ 4 2 0 0 2 8 10 4 6 IO − Output Current − mA 12 14 14.5 VOM + 14 VOM − 13.5 13 ÁÁÁ ÁÁÁ ÁÁÁ 12.5 12 −75 VCC ± = ± 15 V RL = 10 kΩ TA = 25°C −50 Figure 17 TLE2022 AND TLE2024 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 5 5 VCC = 5 V TA = 25°C VOH − High-Level Output Voltage − V VOH VOH VOH − High-Level Output Voltage − V 125 Figure 18 TLE2021 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT ÁÁ ÁÁ −25 0 25 50 75 100 TA − Free-Air Temperature − °C 4 3 2 ÁÁ ÁÁ 1 VCC = 5 V TA = 25°C 4 3 2 1 0 0 0 −1 −2 −3 −4 −5 −6 IOH − High-Level Output Current − mA −7 0 −2 −4 −6 −8 −10 IOH − High-Level Output Current − mA Figure 20 Figure 19 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 39 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TYPICAL CHARACTERISTICS 5 HIGH-LEVEL OUTPUT VOLTAGE† vs FREE-AIR TEMPERATURE LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 5 VCC = 5 V TA = 25°C ÁÁ ÁÁ VOL VOL − Low-Level Output Voltage − V VOH VOH − High-Level Output Voltage − V VCC = 5 V 4.8 4.6 No Load 4.4 ÁÁ ÁÁ ÁÁ RL = 10 kΩ 4.2 4 −75 −50 −25 0 25 50 75 100 4 3 2 1 0 125 0 0.5 1 1.5 2 2.5 IOL − Low-Level Output Current − mA TA − Free-Air Temperature − °C Figure 21 Figure 22 LOW-LEVEL OUTPUT VOLTAGE† vs FREE-AIR TEMPERATURE VVOPP O(PP) − Maximum Peak-to-Peak Output Voltage − V MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY VOL VOL − Low-Level Output Voltage − V 1 IOL = 1 mA 0.75 IOL = 0 0.5 ÁÁÁ ÁÁÁ 0.25 VCC ± = ± 5 V 0 −75 −50 −25 0 25 50 75 100 TA − Free-Air Temperature − °C 125 5 4 3 2 ÁÁÁÁÁ ÁÁ ÁÁÁÁÁ ÁÁ ÁÁÁÁÁ ÁÁ 1 VCC = 5 V RL = 10 kΩ TA = 25°C 0 100 Figure 23 1k 10 k 100 k f − Frequency − Hz Figure 24 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 40 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1M SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TYPICAL CHARACTERISTICS MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY VVOPP O(PP) − Maximum Peak-to-Peak Output Voltage − V 30 25 20 15 10 ÁÁ ÁÁÁÁ ÁÁ ÁÁÁÁ ÁÁ ÁÁÁÁ ÁÁ VCC ± = ± 15 V RL = 10 kΩ TA = 25°C 5 0 100 1k 10 k 100 k f − Frequency − Hz 1M Figure 25 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ 100 AVD − Large-Signal Differential Voltage Amplification − dB 60° 80° Phase Shift 80 100° VCC ± = ± 15 V AVD 60 120° VCC = 5 V 40 140° 20 160° ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ RL = 10 kΩ CL = 30 pF TA = 25°C 0 180° −20 10 100 Phase Shift 120 200° 1k 10 k 100 k f − Frequency − Hz 1M 10 M Figure 26 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 41 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TYPICAL CHARACTERISTICS TLE2021 LARGE-SCALE DIFFERENTIAL VOLTAGE AMPLIFICATION† vs FREE-AIR TEMPERATURE TLE2022 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION† vs FREE-AIR TEMPERATURE 10 6 RL = 10 kΩ ÏÏÏÏÏÏ ÏÏÏÏÏÏ 8 5 AVD AVD − Large-Signal Differential Voltage Amplification − V/µV AVD − Large-Signal Differential Voltage Amplification − V/ µ V RL = 10 kΩ VCC ± = ± 15 V 6 4 2 ÏÏÏÏ ÏÏÏÏ −50 −25 0 25 50 75 3 ÁÁ ÁÁ ÁÁ 2 1 VCC = 5 V 0 −75 VCC ± = ± 15 V 4 100 VCC = 5 V 0 −75 125 −50 −25 0 25 50 75 100 TA − Free-Air Temperature − °C TA − Free-Air Temperature − °C Figure 28 Figure 27 TLE2024 LARGE-SCALE DIFFERENTIAL VOLTAGE AMPLIFICATION† vs FREE-AIR TEMPERATURE TLE2021 SHORT-CIRCUIT OUTPUT CURRENT vs SUPPLY VOLTAGE ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ 10 10 VCC ± = ± 15 V 6 4 2 VCC ± = ± 5 V 0 −75 −50 −25 0 25 50 75 100 125 IIOS OS − Short-Circuit Output Current − mA AVD − Large-Signal Differential Voltage Amplification − V/ µ V RL = 10 kΩ 8 125 VO = 0 TA = 25°C 8 6 VID = −100 mV 4 2 0 −2 ÁÁ ÁÁ −4 ÏÏÏÏÏ −6 VID = 100 mV −8 −10 0 2 TA − Free-Air Temperature − °C 4 6 8 10 12 |VCC ±| − Supply Voltage − V 14 Figure 30 Figure 29 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 42 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 16 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TYPICAL CHARACTERISTICS TLE2022 AND TLE2024 SHORT-CIRCUIT OUTPUT CURRENT vs SUPPLY VOLTAGE TLE2021 SHORT-CIRCUIT OUTPUT CURRENT vs SUPPLY VOLTAGE 12 VO = 0 TA = 25°C 10 ÏÏÏÏÏ VID = −100 mV 5 0 −5 VID = 100 mV −10 −15 0 2 4 6 8 10 12 14 TA = 25°C IIOS OS − Short-Circuit Output Current − mA I OS − Short-Circuit Output Current − mA IOS 15 16 8 VID = −100 mV VO = VCC 4 0 ÁÁ ÁÁ ÁÁ −4 VID = 100 mV VO = 0 −8 − 12 5 0 |VCC ±| − Supply Voltage − V 10 15 20 25 VCC − Supply Voltage − V Figure 32 Figure 31 TLE2022 AND TLE2024 SHORT-CIRCUIT OUTPUT CURRENT vs SUPPLY VOLTAGE ÏÏÏÏ ÏÏÏÏ TLE2021 SHORT-CIRCUIT OUTPUT CURRENT† vs FREE-AIR TEMPERATURE 8 VCC = 5 V TA = 25°C 10 IOS I OS − Short-Circuit Output Current − mA I OS − Short-Circuit Output CUrrent − mA IOS 15 VID = − 100 mV VO = VCC 5 0 −5 VID = 100 mV VO = 0 −10 −15 0 5 10 30 15 20 25 30 ÁÁ ÁÁ 6 VID = −100 mV VO = 5 V 4 2 0 −2 VID = 100 mV VO = 0 −4 −6 −8 − 75 − 50 VCC − Supply Voltage − V − 25 0 25 50 75 100 TA − Free-Air Temperature − °C 125 Figure 34 Figure 33 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 43 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TYPICAL CHARACTERISTICS TLE2022 AND TLE2024 SHORT-CIRCUIT OUTPUT CURRENT † vs FREE-AIR TEMPERATURE TLE2021 SHORT-CIRCUIT OUTPUT CURRENT† vs FREE-AIR TEMPERATURE 12 VCC = 5 V VID = −100 mV VO = 5 V 4 IOS I OS − Short-Circuit Output Current − mA IOS I OS− Short-Circuit Output Current − mA 6 2 0 −2 −4 ÏÏÏ ÏÏÏÏÏ ÏÏÏ −8 −10 −75 −50 −25 0 25 50 75 8 VID = −100 mV 4 0 −4 ÁÁ ÁÁ VID = 100 mV VO = 0 −6 VCC ± = ± 15 V VO = 0 100 −8 VID = 100 mV −12 −75 125 −50 TA − Free-Air Temperature −°C 0 25 50 75 100 −25 TA − Free-Air Temperature − °C Figure 36 Figure 35 TLE2022 AND TLE2024 SHORT-CIRCUIT OUTPUT CURRENT † vs FREE-AIR TEMPERATURE TLE2021 SUPPLY CURRENT vs SUPPLY VOLTAGE 250 VO = 0 No Load VCC ± = ± 15 V VO = 0 200 A IICC CC − Supply Current − µua I OS − Short-Circuit Output Current − mA IOS 15 10 5 VID = − 100 mV 0 VID = 100 mV −10 −50 −25 0 25 50 75 100 125 ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ 150 TA = 125°C TA = 25°C 100 ÁÁ ÁÁ −5 −15 −75 TA = − 55°C 50 0 0 2 TA − Free-Air Temperature − °C 4 6 8 10 12 |VCC ±| − Supply Voltage − V 14 Figure 38 Figure 37 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 44 125 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 16 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TYPICAL CHARACTERISTICS TLE2022 SUPPLY CURRENT vs SUPPLY VOLTAGE TLE2024 SUPPLY CURRENT vs SUPPLY VOLTAGE 500 VO = 0 No Load TA = 125°C 800 I CC − Supply Current − µ A IICC A CC − Supply Current − µua 400 TA = 25°C 300 TA = 125°C TA = − 55°C ÁÁ ÁÁ ÁÁ 200 100 0 ÏÏÏÏ 1000 VO = 0 No Load TA = 25°C 600 TA = − 55°C 400 200 0 2 4 6 8 10 12 |VCC ±| − Supply Voltage − V 14 0 16 0 2 4 16 500 VCC ± = ± 15 V 400 ÏÏÏÏÏÏ ÏÏÏÏÏÏ 150 VCC ± = ± 2.5 V 125 100 ÁÁ ÁÁ 75 50 VO = 0 No Load −50 IICC A CC − Supply Current − µua A IICC CC − Supply Current − µua 14 VCC ± = ± 15 V 175 0 −75 12 TLE2022 SUPPLY CURRENT† vs FREE-AIR TEMPERATURE ÏÏÏÏÏ ÏÏÏÏÏ 200 25 10 Figure 40 TLE2021 SUPPLY CURRENT† vs FREE-AIR TEMPERATURE ÁÁ ÁÁ 8 |VCC ±| − Supply Voltage − V Figure 39 225 6 −25 0 25 50 75 100 TA − Free-Air Temperature − °C 125 VCC ± = ± 2.5 V 300 200 100 VO = 0 No Load 0 −75 −50 Figure 41 −25 0 25 50 75 100 TA − Free-Air Temperature − °C 125 Figure 42 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 45 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TYPICAL CHARACTERISTICS TLE2021 COMMON-MODE REJECTION RATIO vs FREQUENCY TLE2024 SUPPLY CURRENT † vs FREE-AIR TEMPERATURE 1000 CMRR − Common-Mode Rejection Ratio − dB ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ VCC ± = ± 15 V 800 I CC − Supply Current − µ A 120 VCC ± = ± 2.5 V 600 400 200 VO = 0 No Load 0 −75 −50 −25 0 25 50 75 100 ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ 100 VCC ± = ± 15 V 80 VCC = 5 V 60 40 20 TA = 25°C 0 125 10 100 TA − Free-Air Temperature − °C 1k 10 k 100 k f − Frequency − Hz Figure 43 TLE2024 COMMON-MODE REJECTION RATIO vs FREQUENCY CMRR − Common-Mode Rejection Ratio − dB CMRR − Common-Mode Rehection Ratio − dB ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏ ÏÏÏÏ 120 TA = 25°C 100 10 M Figure 44 TLE2022 COMMON-MODE REJECTION RATIO vs FREQUENCY 120 1M VCC ± = ± 15 V 80 VCC = 5 V 60 40 20 VCC ± = ± 15 V 100 VCC = 5 V 80 60 40 20 TA = 25°C 0 0 10 100 1k 10 k 100 k f − Frequency − Hz 1M 10 M 10 100 1k 10 k 100 k 1M 10 M f − Frequency − Hz Figure 45 Figure 46 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 46 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TYPICAL CHARACTERISTICS TLE2022 SLEW RATE† vs FREE-AIR TEMPERATURE TLE2021 SLEW RATE† vs FREE-AIR TEMPERATURE 1 1 ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏ ÏÏÏÏ VCC ± = ± 15 V 0.8 VCC = 5 V 0.6 0.4 0.2 0 −75 VCC ± = ± 15 V SR − Slew Rate − V/ µ uss SR − Slew Rate − V/us µs 0.8 0.6 VCC = 5 V 0.4 0.2 RL = 20 kΩ CL = 30 pF See Figure 1 −50 −25 0 25 50 75 100 TA − Free-Air Temperature − °C RL = 20 kΩ CL = 30 pF See Figure 1 0 −75 125 −50 TLE2024 SLEW RATE† vs FREE-AIR TEMPERATURE VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE 1 ÏÏÏÏÏ SR − Slew Rate − V/ V/sµ s VCC ± = ± 15 V VCC = 5 V 0.4 0 −75 −25 50 0 25 50 75 100 125 VCC ± = ± 15 V RL = 10 kΩ CL = 30 pF TA = 25°C See Figure 4 ÏÏÏÏÏ ÏÏÏÏÏ 0 ÁÁ ÁÁ RL = 20 kΩ CL = 30 pF See Figure 1 −50 VO − Output Voltage − mV VO 100 0.6 0.2 125 Figure 48 Figure 47 0.8 −25 0 25 50 75 100 TA − Free-Air Temperature − °C −50 −100 0 TA − Free-Air Temperature − °C Figure 49 20 40 t − Time − µs 60 80 Figure 50 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 47 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TYPICAL CHARACTERISTICS VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE 4 VCC = 5 V RL = 10 kΩ CL = 30 pF TA = 25°C See Figure 4 ÏÏÏÏÏ 2.55 VO − Output Voltage − V VO VO − Output Voltage − V VO 2.6 TLE2021 VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE 2.5 ÁÁÁ ÁÁÁ VCC = 5 V RL = 10 kΩ CL = 30 pF TA = 25°C See Figure 1 ÏÏÏÏÏ ÏÏÏÏÏ 3 2 ÁÁ ÁÁ 1 2.45 2.4 0 0 20 40 t − Time − µs 60 80 0 Figure 51 ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ 4 VCC = 5 V RL = 10 kΩ CL = 30 pF TA = 25°C See Figure 1 VO − Output Voltage − V VO VO VO − Output Voltage − V 80 TLE2024 VOLTAGE-FOLLOWER LARGE-SCALE PULSE RESPONSE 4 2 ÁÁÁ ÁÁÁ 1 3 VCC ± = 5 V RL = 10 kΩ CL = 30 pF TA = 25°C See Figure 1 2 1 0 0 0 20 40 t − Time − µs 60 0 80 20 40 t − Time − µs Figure 53 48 60 Figure 52 TLE2022 VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE 3 20 40 t − Time − µs Figure 54 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 60 80 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TYPICAL CHARACTERISTICS TLE2021 VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE VO − Output Voltage − V VO 10 VCC ± = ± 15 V RL = 10 kΩ CL = 30 pF TA = 25°C See Figure 1 15 10 VO VO − Output Voltage − V 15 TLE2022 VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE 5 0 ÁÁ ÁÁ ÁÁ ÁÁ −5 −10 ÏÏÏÏÏÏ ÏÏÏÏÏÏ VCC ± = ± 15 V RL = 10 kΩ CL = 30 pF TA = 25°C See Figure 1 5 0 −5 −10 −15 0 20 40 t − Time − µs 60 −15 80 0 TLE2024 VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ 15 VO − Output Voltage − V VO 10 VCC ± = ± 15 V RL = 10 kΩ CL = 30 pF TA = 25°C See Figure 1 5 0 −5 −10 −15 0 20 t − Time − µs Figure 57 60 80 Figure 56 40 60 80 VN(PP) VNPP − Peak-to-Peak Equivalent Input Noise Voltage − uV µV Figure 55 20 40 t − Time − µs ÁÁ ÁÁ ÁÁ POST OFFICE BOX 655303 PEAK-TO-PEAK EQUIVALENT INPUT NOISE VOLTAGE 0.1 TO 1 Hz ÏÏÏÏÏÏ ÏÏÏÏÏÏ 0.5 VCC ± = ± 15 V TA = 25°C 0.4 0.3 0.2 0.1 0 − 0.1 − 0.2 − 0.3 − 0.4 − 0.5 0 1 • DALLAS, TEXAS 75265 2 3 4 5 t − Time − s 6 7 8 9 10 Figure 58 49 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 PEAK-TO-PEAK EQUIVALENT INPUT NOISE VOLTAGE 0.1 TO 10 Hz 0.5 VCC ± = ± 15 V TA = 25°C 0.4 0.3 0.2 0.1 0 − 0.1 − 0.2 − 0.3 ÁÁÁ ÁÁÁ ÁÁÁ EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY ÁÁ ÁÁ ÁÁ VVn nV/ Hz n − Equivalent Input Noise Voltage − nVHz VN(PP) VNPP − Peak-to-Peak Equivalent Input Noise Voltage − uV µV TYPICAL CHARACTERISTICS − 0.4 ÏÏÏÏÏ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÏÏÏÏÏ ÁÁÁÁÁÁ ÏÏÏÏ ÏÏÏÏÏ ÁÁÁÁÁÁ ÏÏÏÏÏ 200 VCC ± = ± 15 V RS = 20 Ω TA = 25°C See Figure 2 160 120 80 40 0 − 0.5 0 1 2 3 4 5 6 t − Time − s 7 8 9 10 1 TLE2022 AND TLE2024 UNITY-GAIN BANDWIDTH vs SUPPLY VOLTAGE ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ 4 B1 B1 − Unity-Gain Bandwidth − MHz RL = 10 kΩ CL = 30 pF TA = 25°C See Figure 3 3 10 k Figure 60 4 2 1 0 RL = 10 kΩ CL = 30 pF TA = 25°C See Figure 3 3 2 1 0 0 2 4 6 8 10 12 14 |VCC±| − Supply Voltage − V 16 0 2 Figure 61 50 100 1k f − Frequency − Hz Figure 59 TLE2021 UNITY-GAIN BANDWIDTH vs SUPPLY VOLTAGE B1 B 1 − Unity-Gain Bandwidth − MHz 10 4 6 8 10 12 |VCC±| − Supply Voltage − V Figure 62 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 14 16 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TYPICAL CHARACTERISTICS TLE2021 UNITY-GAIN BANDWIDTH† vs FREE-AIR TEMPERATURE 4 TLE2022 AND TLE2024 UNITY-GAIN BANDWIDTH† vs FREE-AIR TEMPERATURE 4 RL = 10 kΩ 3 VCC ± = ± 15 V 2 ÏÏÏÏÏ 1 VCC = 5 V −50 −25 0 25 50 75 TA − Free-Air Temperature − °C 100 ÏÏÏÏÏÏ ÏÏÏÏÏÏ 3 VCC ± = ± 15 V 2 VCC = 5 V 1 0 −75 0 −75 125 −50 −25 0 25 50 75 100 TA − Free-Air Temperature − °C Figure 63 TLE2022 AND TLE2024 PHASE MARGIN vs SUPPLY VOLTAGE 53° φm m − Phase Margin φm m − Phase Margin 55° RL = 10 kΩ CL = 30 pF TA = 25°C See Figure 3 48° 125 Figure 64 TLE2021 PHASE MARGIN vs SUPPLY VOLTAGE 50° ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ RL = 10 kΩ CL = 30 pF See Figure 3 B1 B1 − Unity-Gain Bandwidth − MHz B B1 1 − Unity-Gain Bandwidth − MHz CL = 30 pF See Figure 3 46° ÁÁ ÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ RL = 10 kΩ CL = 30 pF TA = 25°C See Figure 3 51° ÁÁ ÁÁ 44° 49° 47° 42° 45° 40° 0 2 4 6 8 10 12 14 |VCC ±| − Supply Voltage − V 16 0 2 4 6 8 10 12 |VCC±| − Supply Voltage − V 14 16 Figure 66 Figure 65 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 51 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 TYPICAL CHARACTERISTICS TLE2022 AND TLE2024 PHASE MARGIN vs LOAD CAPACITANCE TLE2021 PHASE MARGIN vs LOAD CAPACITANCE 60° 70° RL = 10 kΩ TA = 30 pF See Figure 3 50° 60° VCC ± = ± 15 V VCC ± = ± 15 V ÁÁ ÁÁ ÁÁ φm m − Phase Margin φm m − Phase Margin 50° 40° VCC = 5 V 30° VCC = 5 V 40° 30° 20° 10° 10° 0 20 40 60 80 CL − Load Capacitance − pF 0° 100 0 20 40 60 80 CL − Load Capacitance − pF Figure 67 50° 48° TLE2022 AND TLE2024 PHASE MARGIN† vs FREE-AIR TEMPERATURE 54° RL = 10 kΩ CL = 30 pF See Figure 3 52° VCC ± = ± 15 V VCC ± = ± 15 V 46° φm m − Phase Margin 50° 44° 42° VCC = 5 V 40° 38° 36° −75 48° ÁÁ ÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ 44° 42° −50 −25 0 25 50 75 100 TA − Free-Air Temperature − °C 125 VCC = 5 V 46° 40° −75 RL = 10 kΩ CL = 30 pF See Figure 3 −50 Figure 69 −25 0 25 50 75 100 TA − Free-Air Temperature − °C Figure 70 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 52 100 Figure 68 TLE2021 PHASE MARGIN† vs FREE-AIR TEMPERATURE φm m − Phase Margin RL = 10 kΩ TA = 25°C See Figure 3 ÁÁ ÁÁ 20° 0 Á Á ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 125 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 APPLICATION INFORMATION voltage-follower applications The TLE202x circuitry includes input-protection diodes to limit the voltage across the input transistors; however, no provision is made in the circuit to limit the current if these diodes are forward biased. This condition can occur when the device is operated in the voltage-follower configuration and driven with a fast, large-signal pulse. It is recommended that a feedback resistor be used to limit the current to a maximum of 1 mA to prevent degradation of the device. This feedback resistor forms a pole with the input capacitance of the device. For feedback resistor values greater than 10 kΩ, this pole degrades the amplifier phase margin. This problem can be alleviated by adding a capacitor (20 pF to 50 pF) in parallel with the feedback resistor (see Figure 71). CF = 20 pF to 50 pF IF ≤ 1 mA RF VCC + − VO VI + VCC − Figure 71. Voltage Follower Input offset voltage nulling The TLE202x series offers external null pins that further reduce the input offset voltage. The circuit in Figure 72 can be connected as shown if this feature is desired. When external nulling is not needed, the null pins may be left disconnected. − IN − OFFSET N2 OFFSET N1 + IN + 5 kΩ 1 kΩ VCC − (split supply) GND (single supply) Figure 72. Input Offset Voltage Null Circuit POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 53 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 APPLICATION INFORMATION macromodel information Macromodel information provided was derived using Microsim Parts, the model generation software used with Microsim PSpice. The Boyle macromodel (see Note 5) and subcircuit in Figure 73, Figure 74, and Figure 75 were generated using the TLE202x typical electrical and operating characteristics at 25°C. Using this information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases): D D D D D D D D D D D D Maximum positive output voltage swing Maximum negative output voltage swing Slew rate Quiescent power dissipation Input bias current Open-loop voltage amplification Unity-gain frequency Common-mode rejection ratio Phase margin DC output resistance AC output resistance Short-circuit output current limit NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal of Solid-State Circuits, SC-9, 353 (1974). 99 3 VCC + egnd ree cee Iee + din 9 − + rp 92 fb re1 IN − IN+ 1 re2 14 13 Q1 2 Q2 r2 − 53 dc C1 dp 11 C2 6 gcm 54 − ve de 5 − ro1 + OUT Figure 73. Boyle Subcircuit PSpice and Parts are trademarks of MicroSim Corporation. 54 vlim 8 rc2 4 7 + ga 12 rc1 VCC − vc hlim − + POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 + dip − − − + 90 ro2 vb 91 + vip vin SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 .SUBCKT TLE2021 1 2 3 4 5 * c1 11 12 6.244E−12 c2 6 7 13.4E−12 c3 87 0 10.64E−9 cpsr 85 86 15.9E−9 dcm+ 81 82 dx dcm− 83 81 dx dc 5 53 dx de 54 5 dx dlp 90 91 dx dln 92 90 dx dp 4 3 dx ecmr 84 99 (2 99) 1 egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5 epsr 85 0 poly(1) (3,4) −60E−6 2.0E−6 ense 89 2 poly(1) (88,0) 120E−6 1 fb 7 99 poly(6) vb vc ve vlp vln vpsr 0 547.3E6 + −50E7 50E7 50E7 −50E7 547E6 ga 6 0 11 12 188.5E−6 gcm 0 6 10 99 335.2E−12 gpsr 85 86 (85,86) 100E−6 grc1 4 11 (4,11) 1.885E−4 grc2 4 12 (4,12) 1.885E−4 gre1 13 10 (13,10) 6.82E−4 gre2 14 10 (14,10) 6.82E−4 hlim 90 0 vlim 1k hcmr 80 1 poly(2) vcm+ vcm− 0 1E2 1E2 irp 3 4 185E−6 iee 3 10 dc 15.67E−6 iio 2 0 2E−9 i1 88 0 1E−21 q1 11 89 13 qx q2 12 80 14 qx R2 6 9 100.0E3 rcm 84 81 1K ree 10 99 14.76E6 rn1 87 0 2.55E8 rn2 87 88 11.67E3 ro1 8 5 62 ro2 7 99 63 vcm+ 82 99 13.3 vcm− 83 99 −14.6 vb 9 0 dc 0 vc 3 53 dc 1.300 ve 54 4 dc 1.500 vlim 7 8 dc 0 vlp 91 0 dc 3.600 vln 0 92 dc 3.600 vpsr 0 86 dc 0 .model dx d(is=800.0E−18) .model qx pnp(is=800.0E−18 bf=270) .ends Figure 74. Boyle Macromodel for the TLE2021 .SUBCKT TLE2022 1 2 3 4 5 * c1 11 12 6.814E−12 c2 6 7 20.00E−12 dc 5 53 dx de 54 5 dx dlp 90 91 dx dln 92 90 dx dp 4 3 dx egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5 fb 7 99 poly(5) vb vc ve vlp vln 0 + 45.47E6 −50E6 50E6 50E6 −50E6 ga 6 0 11 12 377.9E−6 gcm 0 6 10 99 7.84E−10 iee 3 10 DC 18.07E−6 hlim 90 0 vlim 1k q1 11 2 13 qx q2 12 1 14 qx r2 6 9 100.0E3 rc1 rc2 ge1 ge2 ree ro1 ro2 rp vb vc ve vlim vlp vln .model .model .ends 4 4 13 14 10 8 7 3 9 3 54 7 91 0 dx qx 11 2.842E3 12 2.842E3 10 (10,13) 31.299E−3 10 (10,14) 31.299E−3 99 11.07E6 5 250 99 250 4 137.2E3 0 dc 0 53 dc 1.300 4 dc 1.500 8 dc 0 0 dc 3 92 dc 3 d(is=800.0E−18) pnp(is=800.0E−18 bf=257.1) Figure 75. Boyle Macromodel for the TLE2022 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 55 PACKAGE OPTION ADDENDUM www.ti.com 12-Oct-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish 5962-9088101M2A ACTIVE LCCC FK 20 TBD Call TI 5962-9088101MPA ACTIVE CDIP JG 8 1 TBD A42 SNPB 5962-9088102M2A ACTIVE LCCC FK 20 1 TBD 5962-9088102MPA ACTIVE CDIP JG 8 1 TBD 5962-9088104Q2A ACTIVE LCCC FK 20 1 TBD 5962-9088104QPA ACTIVE CDIP JG 8 1 TBD 5962-9088105Q2A ACTIVE LCCC FK 20 1 TBD 5962-9088105QPA ACTIVE CDIP JG 8 1 TBD MSL Peak Temp (3) Call TI N / A for Pkg Type POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type 5962-9088106Q2A ACTIVE LCCC FK 20 1 TBD 5962-9088106QCA ACTIVE CDIP J 14 1 TBD POST-PLATE N / A for Pkg Type 5962-9088107Q2A ACTIVE LCCC FK 20 1 TBD 5962-9088107QPA ACTIVE CDIP JG 8 1 TBD 5962-9088108Q2A ACTIVE LCCC FK 20 1 TBD 5962-9088108QPA ACTIVE CDIP JG 8 1 TBD A42 SNPB TLE2021ACD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021ACDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021ACDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021ACDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021ACP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2021ACPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2021AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021AIP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2021AIPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2021AMFKB ACTIVE LCCC FK 20 1 TBD TLE2021AMJGB ACTIVE CDIP JG 8 1 TBD TLE2021BMFKB ACTIVE LCCC FK 20 1 TBD TLE2021BMJG ACTIVE CDIP JG 8 1 TBD TLE2021BMJGB ACTIVE CDIP JG 8 1 TLE2021CD ACTIVE SOIC D 8 75 TLE2021CDG4 ACTIVE SOIC D 8 75 TLE2021CDR ACTIVE SOIC D TLE2021CDRG4 ACTIVE SOIC D A42 SNPB N / A for Pkg Type POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type POST-PLATE N / A for Pkg Type N / A for Pkg Type POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type TBD A42 SNPB N / A for Pkg Type Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 12-Oct-2007 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TLE2021CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2021CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2021CPWLE OBSOLETE TSSOP PW 8 TBD Call TI TLE2021CPWR ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021CPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2021IPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2021MD ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM TLE2021MDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021MFKB OBSOLETE LCCC FK 20 TBD Call TI Lead/Ball Finish MSL Peak Temp (3) no Sb/Br) Call TI Call TI TLE2021MJG ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type TLE2021MJGB ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type TLE2022ACD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022ACDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022ACDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022ACDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022ACP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2022ACPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2022AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022AIP ACTIVE PDIP P 8 CU NIPDAU N / A for Pkg Type 50 Addendum-Page 2 Pb-Free (RoHS) PACKAGE OPTION ADDENDUM www.ti.com 12-Oct-2007 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TLE2022AIPE4 ACTIVE PDIP P 8 50 Lead/Ball Finish MSL Peak Temp (3) Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2022AMD ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM TLE2022AMDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022AMDR ACTIVE SOIC D 8 2500 TBD CU NIPDAU Level-1-220C-UNLIM TLE2022AMDRG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022AMFKB ACTIVE LCCC FK 20 1 TBD TLE2022AMJG OBSOLETE CDIP JG 8 TLE2022AMJGB ACTIVE CDIP JG 8 TLE2022BCDR OBSOLETE SOIC D 8 TLE2022BMFKB ACTIVE LCCC FK 20 TLE2022BMJG OBSOLETE CDIP JG 8 TLE2022BMJGB ACTIVE CDIP JG 8 TLE2022CD ACTIVE SOIC D TLE2022CDG4 ACTIVE SOIC TLE2022CDR ACTIVE TLE2022CDRG4 1 1 POST-PLATE N / A for Pkg Type TBD Call TI TBD A42 SNPB TBD Call TI TBD Call TI N / A for Pkg Type Call TI POST-PLATE N / A for Pkg Type TBD Call TI 1 TBD A42 SNPB Call TI 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2022CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2022CPSR OBSOLETE SO PS 8 TBD Call TI TLE2022ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2022IPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type N / A for Pkg Type Call TI TLE2022MD ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM TLE2022MDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022MDR ACTIVE SOIC D 8 2500 TBD CU NIPDAU Level-1-220C-UNLIM TLE2022MDRG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022MFKB ACTIVE LCCC FK 20 1 TBD TLE2022MJG ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type TLE2022MJGB ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type Addendum-Page 3 POST-PLATE N / A for Pkg Type PACKAGE OPTION ADDENDUM www.ti.com 12-Oct-2007 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TLE2024ACDW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024ACDWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024ACDWR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024ACDWRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024ACN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2024ACNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2024AIDW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024AIDWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024AIN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2024AINE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type Lead/Ball Finish MSL Peak Temp (3) TLE2024AMFK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type TLE2024AMFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type TLE2024AMJ ACTIVE CDIP J 14 1 TBD A42 SNPB N / A for Pkg Type 1 N / A for Pkg Type TLE2024AMJB ACTIVE CDIP J 14 TBD A42 SNPB TLE2024BCDW OBSOLETE SOIC DW 16 TBD Call TI Call TI TLE2024BCN OBSOLETE PDIP N 14 TBD Call TI Call TI TLE2024BIDW OBSOLETE SOIC DW 16 TBD Call TI Call TI TLE2024BIN OBSOLETE PDIP N 14 TBD Call TI Call TI TLE2024CDW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024CDWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024CDWR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024CDWRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024CN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2024CNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2024IDW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024IDWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024IN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2024INE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2024MDW ACTIVE SOIC DW 16 40 TBD CU NIPDAU Level-1-220C-UNLIM Addendum-Page 4 PACKAGE OPTION ADDENDUM www.ti.com 12-Oct-2007 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 5 PACKAGE MATERIALS INFORMATION www.ti.com 5-Nov-2007 TAPE AND REEL BOX INFORMATION Device Package Pins Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TLE2021ACDR D 8 SITE 60 330 12 6.4 5.2 2.1 8 12 Q1 TLE2021CDR D 8 SITE 60 330 12 6.4 5.2 2.1 8 12 Q1 TLE2021CPWR PW 8 SITE 41 330 12 7.0 3.6 1.6 8 12 Q1 TLE2021IDR D 8 SITE 60 330 12 6.4 5.2 2.1 8 12 Q1 TLE2022ACDR D 8 SITE 27 330 12 6.4 5.2 2.1 8 12 Q1 TLE2022ACDR D 8 SITE 60 330 12 6.4 5.2 2.1 8 12 Q1 TLE2022AIDR D 8 SITE 27 330 12 6.4 5.2 2.1 8 12 Q1 TLE2022AIDR D 8 SITE 60 330 12 6.4 5.2 2.1 8 12 Q1 TLE2022CDR D 8 SITE 27 330 12 6.4 5.2 2.1 8 12 Q1 TLE2022CDR D 8 SITE 60 330 12 6.4 5.2 2.1 8 12 Q1 TLE2022IDR D 8 SITE 27 330 12 6.4 5.2 2.1 8 12 Q1 TLE2022IDR D 8 SITE 60 330 12 6.4 5.2 2.1 8 12 Q1 TLE2024ACDWR DW 16 SITE 60 330 16 10.75 10.7 2.7 12 16 Q1 TLE2024CDWR DW 16 SITE 60 330 16 10.75 10.7 2.7 12 16 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 5-Nov-2007 Device Package Pins Site Length (mm) Width (mm) Height (mm) TLE2021ACDR D 8 SITE 60 346.0 346.0 29.0 TLE2021CDR D 8 SITE 60 346.0 346.0 29.0 TLE2021CPWR PW 8 SITE 41 346.0 346.0 29.0 TLE2021IDR D 8 SITE 60 346.0 346.0 29.0 TLE2022ACDR D 8 SITE 27 342.9 336.6 20.64 TLE2022ACDR D 8 SITE 60 346.0 346.0 29.0 TLE2022AIDR D 8 SITE 27 342.9 336.6 20.64 TLE2022AIDR D 8 SITE 60 346.0 346.0 29.0 TLE2022CDR D 8 SITE 27 342.9 336.6 20.64 TLE2022CDR D 8 SITE 60 346.0 346.0 29.0 TLE2022IDR D 8 SITE 27 342.9 336.6 20.64 TLE2022IDR D 8 SITE 60 346.0 346.0 29.0 TLE2024ACDWR DW 16 SITE 60 346.0 346.0 33.0 TLE2024CDWR DW 16 SITE 60 346.0 346.0 33.0 Pack Materials-Page 2 MECHANICAL DATA MCER001A – JANUARY 1995 – REVISED JANUARY 1997 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.400 (10,16) 0.355 (9,00) 8 5 0.280 (7,11) 0.245 (6,22) 1 0.063 (1,60) 0.015 (0,38) 4 0.065 (1,65) 0.045 (1,14) 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0.015 (0,38) 0°–15° 0.100 (2,54) 0.014 (0,36) 0.008 (0,20) 4040107/C 08/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification. Falls within MIL STD 1835 GDIP1-T8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MLCC006B – OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 0.938 (23,83) 0.962 (24,43) 0.850 (21,6) 0.858 (21,8) 84 1.141 (28,99) 1.165 (29,59) 1.047 (26,6) 1.063 (27,0) B SQ A SQ 25 5 26 27 28 1 2 3 4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MPDI001A – JANUARY 1995 – REVISED JUNE 1999 P (R-PDIP-T8) PLASTIC DUAL-IN-LINE 0.400 (10,60) 0.355 (9,02) 8 5 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.325 (8,26) 0.300 (7,62) 0.020 (0,51) MIN 0.015 (0,38) Gage Plane 0.200 (5,08) MAX Seating Plane 0.010 (0,25) NOM 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.430 (10,92) MAX 0.010 (0,25) M 4040082/D 05/98 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. 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