TLE7276 Low Drop Linear Voltage Regulator 5V Fixed Output Voltage Data Sheet Rev. 1.11, 2010-11-22 Automotive Power 5-V Low Drop Voltage Regulator TLE 7276 Features • • • • • • • Output voltage 5 V ±2% Ultra low current consumption: typ. 20 μA 300 mA current capability Inhibit input Very low-drop voltage Short-circuit-proof Suitable for use in automotive electronics Functional Description The TLE 7276 is a monolithic integrated low-drop voltage regulator for load currents up to 300 mA. An input voltage up to 42 V is regulated to VQ,nom = 5.0 V with a precision of ±2%. The sophisticated design allows to achieve stable operation even with ceramic output capacitors down to 470 nF. The device is designed for the harsh environment of automotive applications. Therefore it is protected against overload, short circuit and overtemperature conditions. Of course the TLE 7276 can be used also in all other applications, where a stabilized 5 V voltage is required. Due to its ultra low stand-by current consumption of typ. 20 μA the TLE 7276 is dedicated for use in applications permanently connected to VBAT. The regulator can be shut down via an Inhibit input. An integrated output sink current circuitry keeps the voltage at the Output pin Q below 5.5 V even when reverse currents are applied. Thus connected devices are protected from overvoltage damage. For applications requiring extremely low noise levels the Infineon voltage regulator family TLE 42XY and TLE 44XY is more suited than the TLE 7276. A mV-range output noise on the TLE 7276 caused by the charge pump operation is unavoidable due to the ultra low quiescent current concept. Type Ordering Code Package TLE 7276 D Q67006-A9733 P-TO252-5-1,P-TO252-5-11 TLE 7276 G Q67006-A9732 P-TO263-5-1 Data Sheet 2 Rev. 1.11, 2010-11-22 TLE 7276 I TLE 7276 1 5 Q Overtemperature Shutdown Bandgap Reference INH 2 1 Inhibit Charge Pump 3, Tab GND Figure 1 Data Sheet AEB03609.VSD Block Diagram 3 Rev. 1.11, 2010-11-22 TLE 7276 GND 1 I INH N.C. 5 1 5 I GND Q INH N.C. Q PG-TO252 -5-1 .vsd PG-TO263-5-1.vsd Figure 2 Pin Configuration P-TO252-5 (D-PAK), P-TO263-5 (D2-PAK)(top view) Table 1 Pin Definitions and Functions Pin No. Symbol Function 1 I Input; block to ground directly at the IC with a ceramic capacitor 2 INH Inhibit Input; low level disables the IC. Integrated pull-down resistor 3 GND Ground; internally connected to heat sink 4 N.C. Not connected 5 Q Output; block to ground with a ceramic capacitor, C ≥ 470 nF Data Sheet 4 Rev. 1.11, 2010-11-22 TLE 7276 Table 2 Absolute Maximum Ratings Parameter Symbol Limit Values Unit Test Condition 45 V – -1 – mA – VINH -0.3 45 V Observe current limit IINH,max1) IINH -1 1 mA – VQ VQ IQ -0.3 5.5 V – -0.3 6.2 V t < 10 s2) -1 – mA – Tj Tstg -40 150 °C – -50 150 °C – Min. Max. VI II -0.3 Voltage Current Input I Voltage Current Inhibit INH Output Q Voltage Voltage Current Temperature Junction temperature Storage temperature 1) External resistor required to keep current below absolute maximum rating when voltages ≥ 5.5 V are applied. 2) Exposure to these absolute maximum ratings for extended periods (t > 10 s) may affect device reliability. Note: Stresses above those listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 3 Operating Range Parameter Symbol Input voltage VI Tj Junction temperature Data Sheet Limit Values Unit Remarks Min. Max. 5.5 42 V – -40 150 °C – 5 Rev. 1.11, 2010-11-22 TLE 7276 Table 4 Thermal Resistance Parameter Junction case Junction ambient Rthj-c Rthj-a Rthj-a Limit Values Unit Remarks 8 K/W – 80 K/W TO2521) Min. Max. – – TO2632) Worst case, regarding peak temperature; zero airflow; mounted on a PCB FR4, 80 × 80 × 1.5 mm3, heat sink Junction ambient 1) Symbol – 55 K/W area 300 mm2 2) Worst case, regarding peak temperature; zero airflow; mounted on a PCB FR4, 80 area 300 mm2 × 80 × 1.5 mm3, heat sink Note: In the operating range, the functions given in the circuit description are fulfilled. Data Sheet 6 Rev. 1.11, 2010-11-22 TLE 7276 Table 5 Electrical Characteristics VI = 13.5 V; VINH = 5 V; -40 °C < Tj < 150 °C (unless otherwise specified) Parameter Symbol Limit Values Min. Typ. Max. Unit Measuring Condition Output Q Output voltage VQ 4.9 5.0 5.1 V 0.1 mA < IQ < 300 mA; 6 V < VI < 16 V Output voltage VQ 4.9 5.0 5.1 V 0.1 mA < IQ < 100 mA; 6 V < VI < 40 V Output current limitation IQ 320 – – mA 1) Output current limitation IQ – – 800 mA Iq – 20 30 μA Current consumption; Iq = II - IQ Iq – – 40 μA Quiescent current; inhibited Iq – 5 9 μA Drop voltage Vdr – 250 500 mV Load regulation ΔVQ, lo -40 15 40 mV Line regulation ΔVQ, li -20 5 20 mV Power supply ripple rejection PSRR – 60 – dB VQ = 0V IQ = 0.1 mA; Tj = 25 °C IQ = 0.1 mA; Tj ≤ 80 °C VINH = 0 V; Tj < 80 °C IQ = 200 mA; Vdr = VI - VQ1) IQ = 5 mA to 250 mA Vl = 10V to 32 V; IQ = 5 mA fr = 100 Hz; Vr = 0.5 Vpp Temperature output voltage drift dVQ/dT – 0.5 – mV/K – Output Capacitor CQ 470 – – nF ESR < 3 Ohm VINH ON VINH OFF IINH ON IINH OFF 3.1 – – V VQ ≥ 4.9 V – – 0.8 V VQ ≤ 0.3 V – 3 4 μA – 0.5 1 μA VINH = 5 V VINH = 0 V; Tj < 80 °C Current consumption; Iq = II - IQ Inhibit Input INH Turn-on Voltage Turn-off Voltage H-input current L-input current 1) Measured when the output voltage VQ has dropped 100 mV from the nominal value obtained at VI = 13.5 V. Data Sheet 7 Rev. 1.11, 2010-11-22 TLE 7276 Application Information VBat TLE 7276 1 I 100 nF 470 nF Overtemperature Shutdown Bandgap Reference e. g. Ignition VC C Q 5 2 INH + 4.7 µF 1 Inhibit Charge Pump GND 3, Tab Figure 3 AEA03608.VSD Application Diagram Input, Output An input capacitor is necessary for damping line influences. A resistor of approx. 1 Ω in series with CI, can damp the LC of the input inductivity and the input capacitor. In contrast to most low drop voltage regulators the TLE 7276 only needs moderate capacitance at the output to assure stability of the regulation loop. This offers more design flexibility to the circuit designer providing for cost efficient solutions. The TLE 7276 requires a ceramic output capacitor of at least 470 nF. In order to damp influences resulting from load current surges it is recommended to add an additional electrolytic capacitor of 4.7 μF to 47 μF at the output as shown in Figure 3. Data Sheet 8 Rev. 1.11, 2010-11-22 TLE 7276 Additionally a buffer capacitor CB of > 10μF should be used for the output to suppress influences from load surges to the voltage levels. This one can either be an aluminum electrolytic capacitor or a tantalum capacitor following the application requirements. A general recommendation is to keep the drop over the equivalent serial resistor (ESR) together with the discharge of the blocking capacitor below the allowed Headroom of the Application to be supplied (e.g. typ. dVQ = 350mV). Since the regulator output current roughly rises linearly with time the discharge of the capacitor can be calculated as follows: dVCB = dIQ*dt/CB The drop across the ESR calculates as: dVESR = dI*ESR To prevent a reset the following relationship must be fullfilled: dVC + dVESR < VRH = 350mV Example: Assuming a load current change of dIQ = 100mA, a blocking capacitor of CB = 22µF and a typical regulator reaction time under normal operating conditions of dt ~ 25µs and for special dynamic load conditions, such as load step from very low base load, a reaction time of dt ~ 75µs. dVC = dIQ*dt/CB = 100mA * 25µs/22µF = 113mV So for the ESR we can allow dVESR = VRH2 - dVC = 350mV - 113mV = 236mV The permissible ESR becomes: ESR = dVESR / dIQ = 236mV/100mA = 2.36Ohm During design-in of the TLE7469 product family, special care needs to be taken with regards to the regulators reaction time to sudden load current changes starting from very low pre-load as well as cyclic load changes. The application note “TLE7x Voltage Regulators - Application Note about Transient Response at ultra low quiescent current Voltage Regulators” (see 3_cip05405.pdf) gives important hints for successful design-in of the Voltage Regulators of the TLE7x family. Data Sheet 9 Rev. 1.11, 2010-11-22 TLE 7276 Typical Performance Characteristics Current Consumption Iq versus Junction Temperature Tj Current Consumption Iq versus Input Voltage VI 1_Iq-Tj.vsd 3_IQ-VI.VSD Iq [µA] Tj = 25°C Iq [µA] VI = 13.5V 100 40 IQ = 100 µA IQ = 50mA 10 30 IQ = 10mA IQ = 0.2mA 20 1 10 0.01 -40 -20 0 0 20 40 60 80 100 120 140 10 20 30 Current Consumption Iq versus Output Current IQ Output Voltage VQ versus Junction Temperature Tj 5A_VQ-TJ.VSD 2_IQ-IQ.VSD 30 Iq [µA] 40 VI [V] Tj [°C] VI = 13.5 V VQ [V] VI = 13.5 V Tj = 25 °C Tj = -40 °C 20 5.05 5.00 15 4.95 10 4.90 5 0 Data Sheet IQ =100µA...100mA 20 40 60 100 -40 -20 IQ [mA] 0 20 40 60 80 100 120 140 Tj [°C] 10 Rev. 1.11, 2010-11-22 TLE 7276 Dropout Voltage Vdr versus Output Current IQ Maximum Output Current IQ versus Junction Temperature Tj 6_VDR-IQ.VSD 600 8_IQMAX-TJ.VSD 620 Vdr [mV] VI = 13.5 V IQ [mA] Tj = 150 °C 400 580 Tj = 25 °C 300 200 560 540 Tj = -40 °C 520 100 0 100 200 500 -40 -20 300 0 20 40 60 80 100 120 140 Tj [°C] IQ [mA] Dropout Voltage Vdr versus Junction Temperature Tj Maximum Output Current IQ versus Input Voltage VI 7_VDR-TJ.VSD 600 9_SOA.VSD 600 Tj = 125 °C IQ [mA] Vdr [mV] IQlim Tj = 25 °C IQ = 250 mA 400 300 400 300 IQ = 150mA 200 200 Pvmax = 1,18W for TO252 @ 300mm2 cooling area 100 100 IQ = 10 mA -40 -20 0 20 40 60 80 100 120 140 0 Tj [°C] Data Sheet 10 20 30 40 VI [V] 11 Rev. 1.11, 2010-11-22 TLE 7276 Region of Stability Output Voltage VQ Start-up behaviour 14_VItime_startup.vsd 12_ESR-IQ.VSD 100 CQ = 10nF ...10 µF Tj = 25 °C ESRCQ [Ω] VQ [V] INH = ON 10 5.05 1 IQ = 5mA 5.00 Stable Region 4.90 0.1 4.80 0.01 0 50 100 200 150 2 1 3 t [ms] Power Supply Ripple Rejection PSRR versus Frequency f Load Regulation dVQ versus Output Current Change dIQ 13_PSRR.VSD 80 5 4 IQ [mA] 18a_dVQ-dIQ_Vi6V.vsd 0 VI = 6V ΔVQ PSRR [dB] [mV] 60 IQ = 30 mA IQ = 0.1 mA -10 IQ = 100 mA 50 -15 Tj = 25 °C -20 40 30 Tj = -40 °C VRIPPLE = 1 V VIN = 13.5 V CQ = 10 µF Tantalum Tj = 25 °C 10 100 1k 10k -30 100k 0 50 100 150 250 IQ [mA] f [Hz] Data Sheet Tj = 150 °C -25 12 Rev. 1.11, 2010-11-22 TLE 7276 Load Regulation dVQ versus Output Current Change dIQ Line Regulation dVQ versus Input Voltage ChangedVI 18b_dVQ-dIQ_Vi135V.vsd 0 VI = 13.5V ΔVQ 19_dVQ-dVI__150C.vsd 0 ΔVQ [mV] IQ = 1mA [mV] -10 IQ = 10mA Tj =150 °C IQ = 100mA -2 -15 -3 Tj = -40 °C Tj = 25 °C -20 -4 IQ = 200mA -25 -5 Tj = 150 °C -30 0 50 100 150 -6 250 0 5 10 15 20 25 30 35 40 45 IQ [mA] VI [V] Load Regulation dVQ versus Output Current Change dIQ Line Regulation dVQ versus Input Voltage ChangedVI 18c_dVQ-dIQ_Vi28V.vsd 0 VI = 28 ΔVQ 19_dVQ-dVI_25C.vsd 0 Tj = 25 °C ΔVQ [mV] [mV] IQ = 1mA -2 -10 IQ = 10mA IQ = 200mA IQ = 100mA -3 -15 Tj = -40 °C -20 -4 Tj = 25 °C -25 -5 Tj = 150 °C -30 0 50 100 150 -6 250 IQ [mA] Data Sheet 0 5 10 15 20 25 30 35 40 45 VI [V] 13 Rev. 1.11, 2010-11-22 TLE 7276 Line Regulation dVQ versus Input Voltage ChangedVI Load Transient Response Peak Voltage dVQ 19_dVQ-dVI_-40C.vsd 0 Tj =40 °C ΔVQ 20_Load Trancient vs time 125.vsd [mV] IQ1:100mA IQ = 1mA -2 Tj=125°C Vi=13.5V IQ = 10mA IQ = 100mA -3 IQ = 200mA -4 VQ -5 -6 0 5 T=40µs/DIV 10 15 20 25 30 35 40 45 VQ=100mV/DIV VI [V] Load Transient Response Peak Voltage dVQ Line Transient Response Peak Voltage dVQ 20_Load Trancient vs time 25.vsd IQ1:100mA 21_Line Trancient vs time 25.vsd Tj=25°C Vi=13.5V dVI 2V Tj=25°C Vi=13.5V VQ VQ T=40µs/DIV Data Sheet VQ=100mV/DIV T=400µs/DIV 14 VQ=50mV/DIV Rev. 1.11, 2010-11-22 TLE 7276 Line Transient Response Peak Voltage dVQ Inhibit Input Current IINH versus Input Voltage VI, INH=Off 25_IINH vs VIN INH_off.vsd IINH 21_Line Trancient vs time 125.vsd [µA] 1.0 Tj=125°C Vi=13.5V dVI 2V INH = OFF Tj = 150°C Tj = 25°C 0.8 Tj = -40°C 0.6 VQ 0.4 0.2 T=400µs/DIV VQ=50mV/DIV 10 20 30 40 VIN [V] Inhibit Input Current IINH versus Inhibit Input Voltage VINH Thermal Resistance Junction-Ambient RTHJA versus Power Dissipation PV 24_IINH vs VINH.vsd IINH [µA] 50 32_RTH VS PV TO252.VSD 75 A = 300mm2 RTH-JA Cooling Area single sided PCB [K/W] Tj = 150°C Tj = 25°C 40 TO252-3 65 Tj = -40°C 30 60 20 55 10 50 TO252-5 10 20 30 40 3 VINH [V] Data Sheet 6 9 12 PV [W] 15 Rev. 1.11, 2010-11-22 TLE 7276 Package Outlines 2.3 +0.05 -0.10 A 1 ±0.1 0...0.15 0.5 +0.08 -0.04 5x0.6 ±0.1 1.14 4.56 0.9 +0.08 -0.04 0.51 min 0.15 max per side B 5.4 ±0.1 0.8 ±0.15 (4.17) 9.9 ±0.5 6.22 -0.2 1 ±0.1 6.5 +0.15 -0.10 0.1 0.25 M A B GPT09161 All metal surfaces tin plated, except area of cut. Figure 4 Data Sheet P-TO252-5-1 (Plastic Transistor Single Outline) 16 Rev. 1.11, 2010-11-22 TLE 7276 6.5 +0.15 -0.05 A 1) 2.3 +0.05 -0.10 0.5 +0.08 -0.04 0.9 +0.20 -0.01 0...0.15 0.51 MIN. 0.15 MAX. per side B (5) 0.8 ±0.15 (4.24) 1 ±0.1 9.98 ±0.5 6.22 -0.2 5.7 MAX. 0.5 +0.08 -0.04 5 x 0.6 ±0.1 1.14 4.56 0.1 B 0.25 M A B 1) Includes mold flashes on each side. All metal surfaces tin plated, except area of cut. Figure 5 P-TO252-5-11 (Plastic Transistor Single Outline) 2.2 10.6 6.4 5.8 0.8 5.36 Figure 6 Data Sheet Foot Print for P-TO-252-5-1 and P-TO-252-5-11 (Plastic Transistor Single Outline) 17 Rev. 1.11, 2010-11-22 TLE 7276 4.4 10 ±0.2 1.27 ±0.1 A 8.5 1) B 0.05 2.4 0.1 2.7 ±0.3 4.7 ±0.5 7.55 1) 9.25 ±0.2 (15) 1±0.3 0...0.3 0...0.15 5 x 0.8 ±0.1 0.5 ±0.1 4 x 1.7 0.25 M A B 8˚ MAX. 1) Typical Metal surface min. X = 7.25, Y = 6.9 All metal surfaces tin plated, except area of cut. Figure 7 0.1 B GPT09113 P-TO263-5-1 (Plastic Transistor Single Outline) 4.6 16.15 9.4 10.8 0.6 1.1 7.9 Figure 8 Foot Print for P-TO263-5-1 (Plastic Transistor Single Outline) You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Data Sheet 18 Dimensions in mm Rev. 1.11, 2010-11-22 TLE 7276 Remarks TLE 7276 D 5-V Low Drop Voltage Regulator Revision History: 2010-11-22 Previous Version: Rev. 1.11 1.1 Page Subjects (major changes since last revision) 4 Pin configuration: Typo corrected (No change of product, process or test) all New Infineon-Layout and Cover added Data Sheet 19 Rev. 1.11, 2010-11-22 Edition 2010-11-22 Published by Infineon Technologies AG 81726 Munich, Germany © 2010 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. 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