TI TLV3501A-Q1

TLV3501-Q1
www.ti.com
SBOS533A – SEPTEMBER 2010 – REVISED SEPTEMBER 2010
4.5-ns Rail-to-Rail, High-Speed Comparator
in Microsize Packages
Check for Samples: TLV3501-Q1
FEATURES
1
•
•
•
•
•
•
•
•
Qualified for Automotive Applications
High Speed: 4.5 ns
Rail-To-Rail I/O
Supply Voltage: +2.7 V to +5.5 V
Push-Pull CMOS Output Stage
Shutdown (TLV3501 Only)
Micro Package:
SOT23-6
Low Supply Current: 3.2 mA
DESCRIPTION
The TLV3501 family of push-pull output comparators
feature a fast 4.5-ns propagation delay and operation
from +2.7 V to +5.5 V. Beyond-the-rails input
common-mode range makes it an ideal choice for
low-voltage applications. The rail-to-rail output directly
drives either CMOS or TTL logic.
Microsize packages provide options for portable and
space-restricted applications. The TLV3501-Q1 is
available in a SOT23-6 package.
space
APPLICATIONS
space
Automatic Test Equipment
Wireless Base Stations
Threshold Detector
Zero-Crossing Detector
Window Comparator
PROPAGATION DELAY vs OVERDRIVE VOLTAGE
9
VCM = 1V
VS = 5V
CLOAD = 17pF
8
TLV3501-Q1 RELATED PRODUCTS
FEATURES
PRODUCT
Precision, Ultra-Fast,
Low-Power Comparator
TLC3016
Differential Output
Comparator
TL712
High-Speed Op Amp, 16-Bit
Accurate, 150 MHz
OPA300
High-Speed Op Amp,
Rail-to-Rail, 38 MHz
OPA350
High-Speed Op Amp with
Shutdown, 250 MHz
OPA357
Propagation Delay (ns)
•
•
•
•
•
Rise
7
6
Fall
5
4
3
0
20
40
60
80
100
Overdrive Voltage (mV)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated
TLV3501-Q1
SBOS533A – SEPTEMBER 2010 – REVISED SEPTEMBER 2010
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION (1)
(1)
(2)
PRODUCT
PACKAGE-LEAD
PACKAGE DESIGNATOR (2)
PACKAGE MARKING
TLV3501AQDBVRQ1
SOT23-6
DBV
VCBQ
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the
device product folder at www.ti.com.
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
ABSOLUTE MAXIMUM RATINGS (1)
Over operating free-air temperature range (unless otherwise noted).
Supply voltage
(2)
TLV3501-Q1
UNIT
5.5
V
(V−) − 0.3 to (V+) + 0.3
V
Signal input terminal current (2)
10
mA
Output short-circuit current (3)
74
mA
Signal input terminal voltage
Thermal impedance, junction to free air
200
°C/W
Operating temperature
−40 to +125
°C
Storage temperature
−65 to +150
°C
Junction temperature
150
°C
(1)
(2)
(3)
2
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not supported.
Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3V beyond the supply rails should
be current limited to 10mA or less.
Short circuit to ground, one comparator per package
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SBOS533A – SEPTEMBER 2010 – REVISED SEPTEMBER 2010
ELECTRICAL CHARACTERISTICS
TA = +25°C and VS = +2.7 V to +5.5 V (unless otherwise noted).
Boldface limits apply over the specified temperature range, TA = −40°C to +125°C.
TLV3501-Q1
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
OFFSET VOLTAGE
Input offset voltage (1)
VOS
VCM = 0 V, IO = 0 mA
±1
vs Temperature
dVOS/dT
TA = −40°C to +125°C
±5
vs Power supply
PSRR
VS = 2.7 V to 5.5 V
100
Input hysteresis
±6.5
mV
mV/°C
400
mV/V
6
mV
INPUT BIAS CURRENT
Input bias current (2)
Input offset current (2) (3)
IB
VCM = VCC/2, ΔVIN= ±5.5 V
±2
±10
pA
IOS
VCM = VCC/2ΔVIN= ±5.5 V
±2
±10
pA
(V+) +
0.2 V
V
INPUT VOLTAGE RANGE
Common-mode voltage range
Common-mode rejection
(V–) −
0.2 V
VCM
CMRR
VCM = −0.2 V to (V+) + 0.2V
57
VCM = −0.2 V to (V+) + 0.2V
55
70
dB
dB
INPUT IMPEDANCE
1013 || 2
Common-mode
13
Differential
10
Ω || pF
Ω || pF
|| 4
SWITCHING CHARACTERISTICS
Propagation delay time (2) (4)
T(pd) ΔVIN = 100 mV, Overdrive = 20 mV
4.5
ΔVIN = 100 mV, Overdrive = 20
mV
ΔVIN = 100 mV, Overdrive = 5 mV
7.5
ΔVIN = 100 mV, Overdrive = 20
mV
Propagation delay skew
(5)
Maximum toggle frequency
Δt(SKEW) ΔVIN = 100 mV, Overdrive = 20 mV
fMAX
Overdrive = 50 mV, VS = 5 V
6.4
ns
7
ns
10
ns
12
ns
0.5
ns
80
MHz
Rise time (6)
tR
1.5
ns
Fall time (6)
tF
1.5
ns
OUTPUT
Voltage output swing from rail
VOH, VOL
IOUT = ±1 mA
30
50
mV
SHUTDOWN
tOFF
30
ns
tON
100
ns
(V+) −
1.7V
VH (comparator is enabled) (7)
V
(V+) −
0.9V
VL (comparator is disabled) (7)
V
Input bias current of Shutdown pin
2
pA
IQSD (quiescent current in shutdown)
2
mA
(1)
(2)
(3)
(4)
(5)
(6)
(7)
VOS is defined as the average of the positive and the negative switching thresholds.
Not production tested.
The difference between IB+ and IB−.
Propagation delay cannot be accurately measured with low overdrive on automatic test equipment. This parameter is ensured by
characterization at 100-mV overdrive.
The difference between the propagation delay going high and the propagation delay going low.
Measured between 10% of VS and 90% of VS.
When the shutdown pin is within 0.9 V of the most positive supply, the part is disabled. When it is more than 1.7 V below the most
positive supply, the part is enabled.
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ELECTRICAL CHARACTERISTICS (continued)
TA = +25°C and VS = +2.7 V to +5.5 V (unless otherwise noted).
Boldface limits apply over the specified temperature range, TA = −40°C to +125°C.
TLV3501-Q1
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
POWER SUPPLY
Specified voltage
VS
+2.7
Operating voltage range
Quiescent current
+5.5
2.2 to 5.5
IQ
VS = 5 V, VO = High
3.2
V
V
5
mA
TEMPERATURE RANGE
Specified range
–40
+125
°C
Operating range
–40
+125
°C
Storage range
–65
+150
°C
Thermal resistance
qJA
SOT23-6
200
°C/W
PIN CONFIGURATIONS
SOT23-6(1)
DBV PACKAGE
(TOP VIEW)
4
NXA
(1)
6
SHDN
2
5
OUT
3
4
V+
-IN
1
V+IN
Pin 1 is determined by orienting the package marking as indicated on the diagram.
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SBOS533A – SEPTEMBER 2010 – REVISED SEPTEMBER 2010
TYPICAL CHARACTERISTICS
At TA = +25°C, VS = 5 V, and Input Overdrive = 100 mV (unless otherwise noted).
OUTPUT RESPONSE FOR VARIOUS
OVERDRIVE VOLTAGES (Falling)
VIN (V)
VIN (V)
OUTPUT RESPONSE FOR VARIOUS
OVERDRIVE VOLTAGES (Rising)
0
Input
Input
0
5
VOD = 50 mV
5
4
VOD = 50 mV
4
VOUT (V)
VOUT (V)
VOD = 100 mV
3
VOD = 20 mV
2
VOD = 5 mV
1
VOD = 20 mV
VOD = 100 mV
3
VOD = 5 mV
2
1
0
0
-1
-1
0
-10
10
20
30
40
0
-10
10
20
30
40
Time (ns)
Time (ns)
Figure 1.
Figure 2.
PROPAGATION DELAY vs TEMPERATURE
(VOD = 20 mV)
PROPAGATION DELAY vs TEMPERATURE
(VOD = 50 mV)
5.0
5.0
Propagation Delay (ns)
Propagation Delay (ns)
Fall
4.5
Rise
4.0
3.5
4.5
4.0
Fall
3.5
Rise
0
25
50
75
100
3.0
-40 -25
125
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
Figure 3.
Figure 4.
PROPAGATION DELAY vs CAPACITIVE LOAD
(VOD = 20 mV)
PROPAGATION DELAY vs CAPACITIVE LOAD
(VOD = 50 mV)
9
9
8
8
Propagation Delay (ns)
Propagation Delay (ns)
3.0
-40 -25
7
6
Fall
5
Rise
7
6
5
Fall
4
4
3
3
Rise
0
20
40
60
80
100
0
20
40
60
Capacitive Load (pF)
Capacitive Load (pF)
Figure 5.
Figure 6.
80
100
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SBOS533A – SEPTEMBER 2010 – REVISED SEPTEMBER 2010
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = 5 V, and Input Overdrive = 100 mV (unless otherwise noted).
PROPAGATION DELAY vs SUPPLY VOLTAGE
(VCM = 1 V, VOD = 20 mV)
WAKE-UP DELAY vs TEMPERATURE
9
110
Wake-Up Delay (ns)
Propagation Delay (ns)
8
7
6
5
90
70
Fall
4
Rise
3
3
4
5
50
75
100
125
Figure 7.
Figure 8.
RESPONSE TO 50-MHz SINE WAVE
(VDD = 5 V, VIN = 20 mVPP)
RESPONSE TO 100-MHz SINE WAVE
(±2.5-V Dual Supply into 50-Ω Oscilloscope Input)
10
0
500
0
5
-500
4
2
3
VOUT (V)
1
2
1
0
0
-1
-2
0
20
40
60
80
100
0
2
4
6
8
10
12
Time (ns)
Time (ns)
Figure 9.
Figure 10.
QUIESCENT CURRENT vs SUPPLY VOLTAGE
14
16
18
20
QUIESCENT CURRENT vs TEMPERATURE
4.0
4.0
3.8
3.8
3.6
3.6
Quiescent Current (mA)
Quiescent Current (mA)
25
Temperature (°C)
-1
3.4
3.2
3.0
2.8
2.6
2.4
2.2
3.4
3.2
3.0
2.8
2.6
2.4
2.2
2.0
2.0
2
3
4
5
6
-40 -25
Supply Voltage (V)
0
25
50
75
100
125
Temperature (°C)
Figure 11.
6
0
Supply Voltage (V)
-10
VOUT (V)
50
-40 -25
6
VIN (mV)
VIN (mV)
2
Figure 12.
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SBOS533A – SEPTEMBER 2010 – REVISED SEPTEMBER 2010
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = 5 V, and Input Overdrive = 100 mV (unless otherwise noted).
QUIESCENT CURRENT vs SHUTDOWN VOLTAGE
QUIESCENT CURRENT vs FREQUENCY
3.5
25
CLOAD = 50 pF
Quiescent Current (mA)
Quiescent Current (mA)
3.0
2.5
2.0
5V
(from off to on)
2.7 V
(from off to on)
1.5
5V
(from on to off)
1.0
2.7 V
(from on to off)
0.5
20
CLOAD = 20 pF
15
10
CLOAD = 10 pF
5
CLOAD = 0.5 pF
0
0
0
1
2
3
4
5
0
20
40
60
Shutdown Voltage (V)
Frequency (MHz)
Figure 13.
Figure 14.
80
100
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TLV3501-Q1
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APPLICATION INFORMATION
The TLV3501-Q1 features high-speed response and includes 6 mV of internal hysteresis for improved noise
immunity with an input common-mode range that extends 0.2 V beyond the power-supply rails.
Shutdown
A shutdown pin allows the device to go into idle when it is not in use. When the shutdown pin is high, the device
draws about 2 mA and the output goes to high impedance. When the shutdown pin is low, the TLV3501-Q1 is
active. When the TLV3501-Q1 shutdown feature is not used, connect the shutdown pin to the most negative
supply, as shown in Figure 15. It takes about 100 ns to come out of shutdown mode.
VS
0.1 mF
2.2 mF
VIN
VOUT
TLV3501-Q1
VREF
Figure 15. Basic Connections for the TLV3501-Q1
Operating Voltage
TLV3501-Q1 comparators are specified for use on a single supply from +2.7 V to +5.5 V (or a dual supply from
±1.35 V to ±2.75 V) over a temperature range of −40°C to +125°C. The device continues to function below this
range, but performance is not specified.
Adding External Hysteresis
The TLV3501-Q1 has a robust performance when used with a good layout. However, comparator inputs have
little noise immunity within the range of specified offset voltage (±5 mV). For slow moving or noisy input signals,
the comparator output may display multiple switching as input signals move through the switching threshold. In
such applications, the 6 mV of internal hysteresis of the TLV3501-Q1 might not be sufficient. In cases where
greater noise immunity is desired, external hysteresis may be added by connecting a small amount of feedback
to the positive. Figure 16 shows a typical topology used to introduce 25 mV of additional hysteresis, for a total of
31-mV hysteresis when operating from a single 5-V supply. Total hysteresis is approximated by Equation 1:
VHYST =
(V + ) ´ R1
+ 6mV
R1 + R 2
(1)
VHYST sets the value of the transition voltage required to switch the comparator output by enlarging the threshold
region, thereby reducing sensitivity to noise.
VS = 5 V
0.1 mF
2.2 mF
VIN
TLV3501-Q1
R1 = 51 W
VOUT
R2 = 10 kW
VREF
Figure 16. Adding Hysteresis to the TLV3501-Q1
8
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Input Over-Voltage Protection
Device inputs are protected by electrostatic discharge (ESD) diodes that conduct if the input voltages exceed the
power supplies by more than approximately 300 mV. Momentary voltages greater than 300 mV beyond the
power supply can be tolerated if the input current is limited to 10 mA. This limiting is easily accomplished with a
small input resistor in series with the comparator, as shown in Figure 17.
VS
0.1 mF
2.2 mF
VIN
VOUT
TLV3501-Q1
VREF
Figure 17. Input Current Protection for Voltages Exceeding the Supply Voltage
Relaxation Oscillator
The TLV3501-Q1 can easily be configured as a simple and inexpensive relaxation oscillator. In Figure 18, the R2
network sets the trip threshold at 1/3 and 2/3 of the supply. Because this is a high-speed circuit, the resistor
values are rather low to minimize the effect of parasitic capacitance. The positive input alternates between 1/3 of
V+ and 2/3 of V+ depending on whether the output is low or high. The time to charge (or discharge) is 0.69R1C.
Therefore, the period is 1.38R1C. For 62 pF and 1 kΩ as shown in Figure 18, the output is calculated to be 10.9
MHz. An implementation of this circuit oscillated at 9.6 MHz. Parasitic capacitance and component tolerances
explain the difference between theory and actual performance.
VC
2/3 (V+)
t
1/3 (V+)
VS =
5V
C
62 pF
V+
1.38R1C
R1
1 kW
VOUT
R2
5 kW
R2
5 kW
t
f = 10MHz
V+
R2
5 kW
Figure 18. Relaxation Oscillator
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High-Speed Window Comparator
A window comparator circuit is used to determine when a signal is between two voltages. The TLV3501-Q1 can
readily be used to create a high-speed window comparator. VHI is the upper voltage threshold, and VLO is the
lower voltage threshold. When VIN is between these two thresholds, the output in Figure 19 is high. Figure 20
shows a simple means of obtaining an active low output. Note that the reference levels are connected differently
between Figure 19 and Figure 20. The operating voltage range of either circuit is 2.7 V to 5.5 V.
space
VLO
VHI
TLV3501-Q1a
TLV3501-Q1a
VIN
VIN
VOUT
VOUT
SN74AHC00
SN74LVC1G02
TLV3501-Q1b
TLV3501-Q1b
VHI
VLO
V
V
VOUT
VOUT
VIN
VIN
VHI
VHI
VLO
VLO
Time
Time
Figure 19. Window Comparator: Active High
10
Figure 20. Window Comparator: Active Low
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SBOS533A – SEPTEMBER 2010 – REVISED SEPTEMBER 2010
PCB Layout
For any high-speed comparator or amplifier, proper design and printed circuit board (PCB) layout are necessary
for optimal performance. Excess stray capacitance on the active input, or improper grounding, can limit the
maximum performance of high-speed circuitry.
Minimizing resistance from the signal source to the comparator input is necessary in order to minimize the
propagation delay of the complete circuit. The source resistance along with input and stray capacitance creates
an RC filter that delays voltage transitions at the input, and reduces the amplitude of high-frequency signals. The
input capacitance of the TLV350x along with stray capacitance from an input pin to ground results in several
picofarads of capacitance.
The location and type of capacitors used for power-supply bypassing are critical to high-speed comparators. The
suggested 2.2-mF tantalum capacitor do not need to be as close to the device as the 0.1-mF capacitor, and may
be shared with other devices. The 2.2-mF capacitor buffers the power-supply line against ripple, and the 0.1-mF
capacitor provides a charge for the comparator during high-frequency switching.
In a high-speed circuit, fast rising and falling switching transients create voltage differences across lines that
would be at the same potential at DC. To reduce this effect, a ground plane is often used to reduce difference in
voltage potential within the circuit board. A ground plane has the advantage of minimizing the effect of stray
capacitances on the circuit board by providing a more desirable path for the current to flow. With a signal trace
over a ground plane, at high-frequency the return current (in the ground plane) tends to flow right under the
signal trace. Breaks in the ground plane (as simple as through-hole leads and vias) increase the inductance of
the plane, making it less effective at higher frequencies. Breaks in the ground plane for necessary vias should be
spaced randomly.
Figure 21 shows an evaluation layout for the TLV3501-Q1 SOT23-6 package. Both are shown with SMA
connectors bringing signals on and off the board. RT1 and RT2 are termination resistors for +VIN and −VIN,
respectively. C1 and C2 are power-supply bypass capacitors. Place the 0.1-mF capacitor closest to the
comparator. The ground plane is not shown, but the pads that the resistors and capacitors connect to are shown.
Figure 22 shows a schematic of this circuit.
-VIN
+VS
SD
-VIN
C1
100 nF
RT2
50 W
VOUT
RT2
TLV3501-Q1
C2
2.2 mF
VOUT
+VIN
RT1
RT1
50 W
DUT
C1 C2
GND
+VS
Shutdown
+VIN
Figure 22. Schematic for Figure 21
Figure 21. TLV3501DBV (SOT23) Sample Layout
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REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (September, 2010) to Revision A
•
12
Page
Added new feature bullet regarding automotive application qualification ............................................................................. 1
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PACKAGE OPTION ADDENDUM
www.ti.com
9-Sep-2011
PACKAGING INFORMATION
Orderable Device
TLV3501AQDBVRQ1
Status
(1)
ACTIVE
Package Type Package
Drawing
SOT-23
DBV
Pins
Package Qty
6
3000
Eco Plan
(2)
Green (RoHS
& no Sb/Br)
Lead/
Ball Finish
MSL Peak Temp
(3)
Samples
(Requires Login)
CU NIPDAU Level-2-260C-1 YEAR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
1-Dec-2011
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
TLV3501AQDBVRQ1
Package Package Pins
Type Drawing
SPQ
SOT-23
3000
DBV
6
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
180.0
8.4
Pack Materials-Page 1
3.2
B0
(mm)
K0
(mm)
P1
(mm)
3.1
1.39
4.0
W
Pin1
(mm) Quadrant
8.0
Q3
PACKAGE MATERIALS INFORMATION
www.ti.com
1-Dec-2011
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TLV3501AQDBVRQ1
SOT-23
DBV
6
3000
210.0
185.0
35.0
Pack Materials-Page 2
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