OPA2333 HT

OPA2333-HT
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SBOS483G – JULY 2009 – REVISED SEPTEMBER 2012
1.8-V MICROPOWER CMOS OPERATIONAL AMPLIFIER
ZERO-DRIFT SERIES
Check for Samples: OPA2333-HT
FEATURES
1
•
•
•
•
•
•
D, JD OR HKJ PACKAGE
(TOP VIEW)
Low Offset Voltage: 26 μV (Max)
0.01-Hz to 10-Hz Noise: 1.5 μVPP
Quiescent Current: 50 μA
Single-Supply Operation
Supply Voltage: 1.8 V to 5.5 V
Rail-to-Rail Input/Output
OUT A
-IN A
+IN A
V-
Down-Hole Drilling
High Temperature Environments
V+
SUPPORTS EXTREME TEMPERATURE
APPLICATIONS
•
•
•
•
•
•
•
•
(1)
8
2
7
3
6
4
5
V+
OUT B
-IN B
+IN B
HKQ PACKAGE
(TOP VIEW)
APPLICATIONS
•
•
1
1
OUT A
OUT B
-IN A
-IN B
+IN A
+IN B
Controlled Baseline
One Assembly/Test Site
One Fabrication Site
Available in Extreme (–55°C/210°C)
Temperature Range (1)
Extended Product Life Cycle
Extended Product-Change Notification
Product Traceability
Texas Instruments' high temperature products
utilize highly optimized silicon (die) solutions
with design and process enhancements to
maximize performance over extended
temperatures.
8
5
4
V-
HKQ as formed or HKJ mounted dead bug
Custom temperature ranges available
DESCRIPTION/ORDERING INFORMATION
(2)
The OPA2333 series of CMOS operational amplifiers uses a proprietary auto-calibration technique to
simultaneously provide very low offset voltage and near-zero drift over time and temperature. These miniature,
high-precision, low-quiescent-current amplifiers offer high-impedance inputs that have a common-mode range
100 mV beyond the rails, and rail-to-rail output that swings within 150 mV of the rails. Single or dual supplies as
low as 1.8 V (±0.9 V) and up to 5.5 V (±2.75 V) may be used. They are optimized for low-voltage single-supply
operation.
The OPA2333 family offers excellent common-mode rejection ratio (CMRR) without the crossover associated
with traditional complementary input stages. This design results in superior performance for driving analog-todigital converters (ADCs) without degradation of differential linearity.
(2)
1
Refer to Electrical Characteristics for performance degradation over temperature.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009–2012, Texas Instruments Incorporated
OPA2333-HT
SBOS483G – JULY 2009 – REVISED SEPTEMBER 2012
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Table 1. ORDERING INFORMATION (1)
TA
PACKAGE
ORDERABLE PART NUMBER
KGD
–55°C to 210°C
–55°C to 175°C
(1)
TOP-SIDE MARKING
OPA2333SKGD1
NA
OPA2333SKGD2
JD
OPA2333SJD
OPA2333SJD
HKJ
OPA2333SHKJ
OPA2333SHKJ
HKQ
OPA2333SHKQ
OPA2333SHKQ
D
OPA2333HD
O2333H
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
BARE DIE INFORMATION
DIE THICKNESS
BACKSIDE FINISH
BACKSIDE
POTENTIAL
BOND PAD
METALLIZATION COMPOSITION
15 mils.
Silicon with backgrind
V-
Al-Si-Cu (0.5%)
Table 2. BOND PAD COORDINATES
2
DESCRIPTION
PAD NUMBER
a
b
c
d
OUT A
1
21.20
1288.50
97.20
1364.50
–IN A
2
21.20
923.65
97.20
999.65
+IN A
3
21.20
533.05
97.20
609.05
V–
4
31.30
172.20
107.30
248.20
+IN B
5
864.80
162.25
940.80
238.25
–IN B
6
864.80
552.65
940.80
628.65
OUT B
7
864.80
897.10
940.80
973.10
V+
8
854.70
1280.45
930.70
1356.45
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|
|
|
962 mm
OUT A
V+
-IN A
-IN B
+IN A
V-
1490 mm
|
+IN B
|
|
38 mm
OUT B
38 mm
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THERMAL CHARACTERISTICS FOR JD PACKAGE
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
High-K board
MIN
TYP
(2)
, no airflow
MAX
UNIT
64.9
θJA
Junction-to-ambient thermal
resistance (1)
θJB
Junction-to-board thermal resistance High-K board without underfill
27.9
°C/W
θJC
Junction-to-case thermal resistance
6.49
°C/W
(1)
(2)
No airflow
°C/W
83.4
The intent of θJA specification is solely for a thermal performance comparison of one package to another in a standardized environment.
This methodology is not meant to and will not predict the performance of a package in an application-specific environment.
JED51-7, high effective thermal conductivity test board for leaded surface mount packages
THERMAL CHARACTERISTICS FOR HKJ OR HKQ PACKAGE
over operating free-air temperature range (unless otherwise noted)
PARAMETER
θJC
Junction-to-case thermal resistance
MIN
TYP
to ceramic side of case
MAX
5.7
to top of case lid (metal side of case)
13.7
UNIT
°C/W
THERMAL CHARACTERISTICS FOR D PACKAGE
over operating free-air temperature range (unless otherwise noted)
PARAMETER
θJC
MIN
TYP
Junction-to-case thermal resistance (to bottom of case)
MAX
UNIT
39.4
°C/W
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN
Supply voltage
Signal input terminals, voltage (2)
Output short circuit
(3)
Operating temperature range
Junction temperature
ESD rating
(1)
(2)
(3)
4
–0.3
MAX
UNIT
7
V
(V+) + 0.3
V
Continuous
JD, HKJ, HKQ packages
–55
210
D package
–55
175
JD, HKJ, HKQ packages
210
D package
175
Human-Body Model (HBM)
4000
Charged-Device Model (CDM)
1000
°C
°C
V
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Input terminals are diode clamped to the power-supply rails. Input signals that can swing more than 0.3 V beyond the supply rails should
be current limited to 10 mA or less.
Short circuit to ground, one amplifier per package.
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Electrical Characteristics: VS = 1.8 V to 5.5 V
Boldface limits apply over the specified temperature range, TA = –55°C to 210°C. At TA = 25°C, RL = 10 kΩ connected to
VS/2, VCM = VS/2, and VOUT = VS/2 (unless otherwise noted).
TA = 175°C (1)
TA = –55°C to 125°C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
2
10
MIN
TYP
TA = 210°C
MAX
MIN
TYP
(2)
MAX
UNIT
OFFSET
VOLTAGE
Input offset
voltage
VOS
VS = 5 V
over
temperature
vs
temperature
vs power
supply
μV
22
dVOS/dT
PSRR
26
0.02
VS = 1.8 V to 5.5 V
1
Long-term
stability (3)
See
Channel
separation, dc
26
0.05
6
1.2
μV/°C
0.05
8
μV
1.7
11
μV/V
(3)
μV/V
0.1
INPUT BIAS
CURRENT
Input bias current
IB
±70
over
Temperature
Input offset
current
±200
pA
±150
IOS
±140
±400
±1250
±5300
pA
±700
±1060
0
pA
NOISE
Input voltage
noise,
f = 0.01 Hz to
1 Hz
0.3
1.0
1.0
μVPP
Input voltage
noise,
f = 0.1 Hz to
10 Hz
1.1
1.5
1.5
μVPP
Input current
noise, f = 10 Hz
in
100
fA/√Hz
INPUT
VOLTAGE
RANGE (4)
Common mode
voltage range
Common-Mode
Rejection Ratio
(V–) –
0.1
VCM
CMRR
(V–) – 0.1 V < VCM < (V+) + 0.1 V
102
(V+) + (V–) –
0.1
0.25
130
(V+) + (V–) –
0.25
0.25
101
(V+) +
0.25
V
91
dB
INPUT
CAPACITANCE
Differential
2
4.25
4.25
pF
Common mode
4
12.25
12.25
pF
93
dB
OPEN-LOOP
GAIN
Open-loop
voltage gain
AOL
(V–) + 100 mV < VO < (V+) – 100 mV,
RL = 10 kΩ
104
130
93
110
85
FREQUENCY
RESPONSE
Gain-bandwidth
product
Slew rate
(1)
(2)
(3)
(4)
GBW
SR
CL = 100 pF
350
350
350
kHz
G=1
0.16
0.25
0.25
V/μs
Minimum and maximum parameters are characterized for operation at TA = 175°C, but may not be production tested at that
temperature. Production test limits with statistical guardbands are used to ensure high temperature performance.
Minimum and maximum parameters are characterized for operation at TA = 210°C, but may not be production tested at that
temperature. Production test limits with statistical guardbands are used to ensure high temperature performance.
300-hour life test at 150°C demonstrated randomly distributed variation of approximately 1 μV.
The OPA2333-HT is not intended to be used as a comparator due to its limited differential input range capability.
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Electrical Characteristics: VS = 1.8 V to 5.5 V (continued)
Boldface limits apply over the specified temperature range, TA = –55°C to 210°C. At TA = 25°C, RL = 10 kΩ connected to
VS/2, VCM = VS/2, and VOUT = VS/2 (unless otherwise noted).
TA = 175°C (1)
TA = –55°C to 125°C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
30
50
MIN
TYP
TA = 210°C
MAX
MIN
TYP
(2)
MAX
UNIT
OUTPUT
Voltage output
swing from rail
RL = 10 kΩ
over
temperature
RL = 10 kΩ
Short-circuit
current
Capacitive load
drive
mV
85
ISC
110
150
mV
±5
mA
2
kΩ
CL
(5)
Open-loop
output
impedance
f = 350 kHz, IO = 0
POWER
SUPPLY
Specified voltage
range
VS
Quiescent current
per amplifier
IQ
1.8
IO = 0
5.5
17
over
temperature
Turn-on time
5.5
1.8
5.5
V
μA
25
30
VS = 5 V
1.8
35
40
50
80
μA
μs
100
TEMPERATURE
RANGE
Specified range
-55 to 210
-55 to 175
-55 to 210
°C
Operating range
-55 to 210
-55 to 175
-55 to 210
°C
(5)
6
See Typical Characteristics.
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Estimated Life (Hours)
1000000
100000
Electromigration Fail Mode
10000
1000
110
Wirebond Fail Mode
120
130
140
150
160
170
180
190
200
210
Continuous TJ (°C)
(1)
See datasheet for absolute maximum and minimum recommended operating conditions.
(2)
Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect
life).
(3)
The predicted operating lifetime vs. junction temperature is based on reliability modeling using electromigration as the
dominant failure mechanism affecting device wearout for the specific device process and design characteristics.
(4)
Wirebond fail mode applicable for D package only.
Figure 1. OPA2333SKGD1/OPA2333HD Operating Life Derating Chart
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TYPICAL CHARACTERISTICS
At TA = 25°C, VS = 5 V, and CL = 0 pF (unless otherwise noted).
OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION
−10
−9
−8
−7
−6
−5
−4
−3
−2
−1
0
1
2
3
4
5
6
7
8
9
10
0
0.0025
0.0050
0.0075
0.0100
0.0125
0.0150
0.0175
0.0200
0.0225
0.0250
0.0275
0.0300
0.0325
0.0350
0.0375
0.0400
0.0425
0.0450
0.0475
0.0500
Population
Population
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
Offset Voltage (µV)
Offset Voltage Drift (µV/_ C)
COMMON−MODE REJECTION RATIO vs FREQUENCY
250
140
100
200
120
80
150
100
60
100
40
50
20
0
40
−50
20
−100
0
0
−20
10
100
1k
10k
100k
CMRR (dB)
120
Phase (_ )
AOL (dB)
OPEN−LOOP GAIN vs FREQUENCY
80
60
1M
1
10
100
Frequency (Hz)
1k
10k
100k
Frequency (Hz)
POWER−SUPPLY REJECTION RANGE vs FREQUENCY
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
120
3
VS = ±2.75V
VS = ±0.9V
+PSRR
100
2
Output Swing (V)
PSRR (dB)
−PSRR
80
60
40
−40_C
1
0
0
−3
100
1k
10k
100k
1M
+25_C
+125_C
+25_C
−40_ C
0
1
Frequency (Hz)
8
−40_ C
−1
−2
10
+25_C
+125_C
20
1
1M
2
3
4
5
6
7
8
9
10
Output Current (mA)
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TYPICAL CHARACTERISTICS (continued)
INPUT BIAS CURRENT vs COMMON−MODE VOLTAGE
INPUT BIAS CURRENT vs TEMPERATURE
100
200
80
60
VS = 5V
−IB
50
IB (pA)
20
0
−20
0
+IB
−50
−40
VS = 5.5V
VS = 1.8V
−IB
100
40
IB (pA)
150
−IB
−100
−60
+IB
−80
−200
−100
1
0
+I B
−150
2
3
4
5
−25
−50
0
25
50
75
100
125
Temperature (_ C)
Common−Mode Voltage (V)
LARGE−SIGNAL STEP RESPONSE
QUIESCENT CURRENT vs TEMPERATURE
G=1
RL = 10kΩ
Output Voltage (1V/div)
IQ (mA)
60
40
20
0
-55
-25
0
25
50
75
100
125
150
175
200
210
Time (50µs/div)
Temperature (°C)
SMALL−SIGNAL STEP RESPONSE
POSITIVE OVER- VOLTAGE RECOVERY
Output Voltage (50mV/div)
2V/div
G = +1
RL = 10kΩ
0
Input
Output
1 0k Ω
1V/div
+2 .5V
1 kΩ
0
OPA2333
−2.5V
Time (5µs/div)
Time (50µs/div)
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TYPICAL CHARACTERISTICS (continued)
SETTLING TIME vs CLOSED−LOOP GAIN
NEGATIVE OVER- VOLTAGE RECOVERY
600
4V Step
500
Settling Time (µs)
1V/div
2V/div
Input
0
0
10k Ω
+ 2.5V
1kΩ
400
300
200
0.001%
Output
O PA2333
100
0.01%
− 2.5V
0
10
1
Time (50µs/div)
100
Gain (dB)
SMALL−SIGNAL OVERSHOOT vs LOAD CAPACITANCE
0.1Hz TO 10Hz NOISE
40
35
25
500nV/div
Overshoot (%)
30
20
15
10
5
0
10
100
1000
1s/div
Load Capacitance (pF)
CURRENT AND VOLTAGE NOISE SPECTRAL DENSITY
vs FREQUENCY
Voltage Noise (nV//Hz)
Continues with no 1/f (flicker) noise.
Current Noise
100
100
Voltage Noise
Current Noise (fA//Hz)
1000
1000
10
10
1
10
100
1k
10k
Frequency (Hz)
10
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APPLICATION INFORMATION
(1)
The OPA2333 is unity-gain stable and free from unexpected output phase reversal. It uses a proprietary autocalibration technique to provide low offset voltage and very low drift over time and temperature. For lowest offset
voltage and precision performance, circuit layout and mechanical conditions should be optimized. Avoid
temperature gradients that create thermoelectric (Seebeck) effects in the thermocouple junctions formed from
connecting dissimilar conductors. These thermally-generated potentials can be made to cancel by ensuring they
are equal on both input terminals. Other layout and design considerations include:
• Use low thermoelectric-coefficient conditions (avoid dissimilar metals)
• Thermally isolate components from power supplies or other heat sources
• Shield op amp and input circuitry from air currents, such as cooling fans
Following these guidelines will reduce the likelihood of junctions being at different temperatures, which can cause
thermoelectric voltages of 0.1 μV/°C or higher, depending on materials used.
Operating Voltage
The OPA2333 op amp operates over a power-supply range of 1.8 V to 5.5 V (±0.9 V to
±2.75 V). Supply voltages higher than 7 V (absolute maximum) can permanently damage the device. Parameters
that vary over supply voltage or temperature are shown in the Typical Characteristics section of this data sheet.
Input Voltage
The OPA2333 input common-mode voltage range extends 0.1 V beyond the supply rails. The OPA2333 is
designed to cover the full range without the troublesome transition region found in some other rail-to-rail
amplifiers.
Normally, input bias current is about 70 pA; however, input voltages exceeding the power supplies can cause
excessive current to flow into or out of the input pins. Momentary voltages greater than the power supply can be
tolerated if the input current is limited to 10 mA. This limitation is easily accomplished with an input resistor(see
Figure 2).
Current- limiting resistor
required if input voltage
exceeds supply rails by
≥ 0.5V.
IOVERLOAD
10mA max
+5V
OPA2333
VOUT
VIN
5kΩ
Figure 2. Input Current Protection
Internal Offset Correction
The OPA2333 op amp uses an auto-calibration technique with a time-continuous 350-kHz op amp in the signal
path. This amplifier is zero corrected every 8 μs using a proprietary technique. Upon power up, the amplifier
requires approximately 100 μs to achieve specified VOS accuracy. This design has no aliasing or flicker noise.
(1)
At TA = 25°C (unless otherwise noted).
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Achieving Output Swing to the Op Amp Negative Rail
Some applications require output voltage swings from 0 V to a positive full-scale voltage (such as 2.5 V) with
excellent accuracy. With most single-supply op amps, problems arise when the output signal approaches 0 V,
near the lower output swing limit of a single-supply op amp. A good single-supply op amp may swing close to
single-supply ground, but will not reach ground. The output of the OPA2333 can be made to swing to ground, or
slightly below, on a single-supply power source. To do so requires the use of another resistor and an additional,
more negative, power supply than the op amp negative supply. A pulldown resistor may be connected between
the output and the additional negative supply to pull the output down below the value that the output would
otherwise achieve (see Figure 3).
V+ = +5V
OPA2333
VOUT
VIN
RP = 20kΩ
Op Amp V− = Gnd
−5V
Additional
Negative
Supply
Figure 3. VOUT Range to Ground
The OPA2333 has an output stage that allows the output voltage to be pulled to its negative supply rail, or
slightly below, using the technique previously described. This technique only works with some types of output
stages. The OPA2333 has been characterized to perform with this technique; however, the recommended
resistor value is approximately 20 kΩ. Note that this configuration will increase the current consumption by
several hundreds of microamps. Accuracy is excellent down to 0 V and as low as
–2 mV. Limiting and nonlinearity occurs below –2 mV, but excellent accuracy returns as the output is again
driven above –2 mV. Lowering the resistance of the pulldown resistor allows the op amp to swing even further
below the negative rail. Resistances as low as 10 kΩ can be used to achieve excellent accuracy down to
–10 mV.
General Layout Guidelines
Attention to good layout practices is always recommended. Keep traces short and, when possible, use a printed
circuit board (PCB) ground plane with surface-mount components placed as close to the device pins as possible.
Place a 0.1-μF capacitor closely across the supply pins. These guidelines should be applied throughout the
analog circuit to improve performance and provide benefits, such as reducing the electromagnetic interference
(EMI) susceptibility.
Operational amplifiers vary in their susceptibility to radio frequency interference (RFI). RFI can generally be
identified as a variation in offset voltage or dc signal levels with changes in the interfering RF signal. The
OPA2333 has been specifically designed to minimize susceptibility to RFI and demonstrates remarkably low
sensitivity compared to previous-generation devices. Strong RF fields may still cause varying offset levels.
12
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R E F 3140
+5V
4.096V
+
0.1mF
R9
150kΩ
R1
6.04kΩ
R5
31.6kΩ
D1
+5V
0.1m F
−
+ +
R2
549Ω
O PA2333
R6
200Ω
K−Type
Thermocouple
40.7mV/°C
A.
+
−
R2
2.94kΩ
R4
6.04kΩ
R3
60.4Ω
VO
Zero Adj.
REF3140 has not been characterized or tested at 210°C.
Figure 4. Temperature Measurement
Figure 5 shows the basic configuration for a bridge amplifier.
VEX
R1
+5V
R R
R R
OPA2333
VOUT
R1
VREF
Figure 5. Single Op-Amp Bridge Amplifier
A low-side current shunt monitor is shown in Figure 6. RN are operational resistors used to isolate the ADS1100
from the noise of the digital I2C bus. Since the ADS1100 is a 16-bit converter, a precise reference is essential for
maximum accuracy. If absolute accuracy is not required, and the 5-V power supply is sufficiently stable, the
REF3130 may be omitted.
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3V
+5V
REF3130
Load
R2
49.9kΩ
R1
4.99kΩ
R6
71.5kΩ
V
I LOAD
RSHUNT
1Ω
RN
56Ω
OPA2333
R3
4.99kΩ
R4
48.7kΩ
ADS1100
R7
1.18kΩ
Stray Ground- Loop Resistance
RN
56Ω
I 2C
(PGA Gain = 4)
FS = 3.0V
NOTE: 1% resistors provide adequate common- mode rejection at small ground- loop errors.
A.
REF3130 and ADS1100 have not been characterized or tested at 210°C.
Figure 6. Low-Side Current Monitor
RG
R S HUNT
zener(1)
R 1(2)
10kΩ
V+
MOS F E T rated to
stand−off supply voltage.
OPA2333
+5V
V+
Two zener
biasing methods
are shown. (3)
Load
Output
R B IAS
RL
NOTE S : (1) zener rated for op amp supply capability (that is, 5.1V for OPA2333).
(2) C urrent−limiting resistor.
(3) C hoose zener biasing resistor or dual NMOS F E TS
Figure 7. High-Side Current Monitor
14
Submit Documentation Feedback
Copyright © 2009–2012, Texas Instruments Incorporated
Product Folder Links: OPA2333-HT
OPA2333-HT
www.ti.com
SBOS483G – JULY 2009 – REVISED SEPTEMBER 2012
100 kΩ
60 kΩ
1 MΩ
3V
NTC
Thermistor OPA2333
1 MΩ
Figure 8. Thermistor Measurement
V1
−In
INA152
OPA2333
R2
R1
2
5
6
R2
VO
1
3
OPA2333
V2
+In
A.
VO = (1 + 2R2/R1) (V2 − V1)
INA152 has not been characterized or tested at 210°C.
Figure 9. Precision Instrumentation Amplifier
Submit Documentation Feedback
Copyright © 2009–2012, Texas Instruments Incorporated
Product Folder Links: OPA2333-HT
15
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
OPA2333HD
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-4-260C-72 HR
-55 to 175
O2333H
OPA2333SHKJ
ACTIVE
CFP
HKJ
8
1
TBD
Call TI
N / A for Pkg Type
-55 to 210
OPA2333S
HKJ
OPA2333SHKQ
ACTIVE
CFP
HKQ
8
1
TBD
AU
N / A for Pkg Type
-55 to 210
OPA2333S
HKQ
OPA2333SJD
ACTIVE
CDIP SB
JD
8
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 210
OPA2333SJD
OPA2333SKGD1
ACTIVE
XCEPT
KGD
0
100
TBD
Call TI
Call TI
-55 to 210
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF OPA2333-HT :
• Catalog: OPA2333
• Automotive: OPA2333-Q1
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 2
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