TI TPA2000D4DAPR

SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
D Ideal for Notebook PCs and USB-Powered
D
D
D
D
D
D
D
D
DAP PACKAGE
(TOP VIEW)
Speakers
2 W Into 4 Ω From 5-V Supply
Integrated Class-AB Headphone Amplifier
Second-Generation Modulation Technique
− Filterless Operation
− Improved Efficiency
Low Supply Current . . . 9 mA typ at 5 V
Shutdown Control . . . < 0.05 µA Typ
Shutdown Pin Is TTL Compatible
−40°C to 85°C Operating Temperature
Range
Space-Saving, Thermally-Enhanced
PowerPAD Packaging
LINN
LINP
HPLIN
GAIN0
GAIN1
PVDDL
LOUTP
PGNDL
PGNDL
LOUTN
PVDDL
HPLGAIN
HPLOUT
MODE
HPRGAIN
HPROUT
description
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
RINN
RINP
HPRIN
BYPASS
SHUTDOWN
PVDDR
ROUTP
PGNDR
PGNDR
ROUTN
PVDDR
NC
VDD
COSC
ROSC
AGND
NC − No internal connection
The TPA2000D4 is a 2-W stereo bridge-tied-load
(BTL) class-D amplifier designed to drive
speakers with as low as 4-Ω impedance. The amplifier uses TI’s second-generation modulation technique,
which results in improved efficiency and SNR, and also allows the device to be connected directly to the speaker
without the use of the LC output filter commonly associated with class-D amplifiers (this will result in an EMI
which must be shielded at the system level). These features make the device ideal for use in notebook PCs
where high-efficiency is needed to extend battery run-time. For speakers powered off the USB bus, the
high-efficiency allows for higher output power levels without tripping the USB’s overcurrent circuitry.
The gain of the amplifier is controlled by two input terminals, GAIN1, and GAIN0. This allows the amplifier to
be configured for a gain of 6, 12, 18, and 23.5 dB. The differential input terminals are high-impedance CMOS
inputs, and can be used as summing nodes.
The headphone amplifier is a stereo single-ended (SE) class-AB amplifier which requires two external resistors
per channel to set the gain. The MODE pin selects which amplifier is active; the unused amplifier is placed in
shutdown to reduce supply current.
Both the class-D BTL amplifier, and the class-AB SE amplifier include depop circuitry to reduce the amount of
turnon pop at power up, when cycling SHUTDOWN, and when switching modes of operation.
The TPA2000D4 is available in the 32-pin thermally-enhanced TSSOP package (DAP) which allows stereo 2-W
continuous output power levels in 4-Ω loads when placed on a board with proper thermal board design. The
TPA2000D4 operates over an ambient temperature range of −40°C to 85°C.
These packages deliver levels of thermal performance that were previously only achievable in TO-220-type
packages. Thermal impedances of less than 35°C/W are readily realized in multilayer PCB applications when
using the DAP package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
Copyright  2000−2005, Texas Instruments Incorporated
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1
SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
AVAILABLE OPTIONS
PACKAGED DEVICE
TSSOP (DAP)†
TA
−40°C to 85°C
TPA2000D4DAP
† The DAP package is available taped and reeled. To
order a taped and reeled part, add the suffix R to the
part number (e.g., TPA2000D4DAPR).
functional schematic
VDD
AGND
PVDDR
VDD
Gain
Adjust
RINN
Rs2
100 Ω
+
_
_
Deglitch
Logic
Gate
Drive
ROUTN
+
_
PGNDR
+
_
cmv
+
Gain
Adjust
RINP
PVDDR
_
Rs1
+
_
100 Ω
+
Deglitch
Logic
Gate
Drive
ROUTP
SD−z
MODE
GAIN1
GAIN0
PGNDR
Input
Buffers
Gain
2
Biases
and
References
Startup
Protection
Logic
Ramp
Generator
Thermal
COSC
ROSC
Gain
Adjust
Rs1
100 Ω
+
_
_
Deglitch
Logic
Gate
Drive
Gain
Adjust
LOUTP
+
+ _
cmv
_ +
LINN
VDD ok
PVDDL
BYPASS
LINP
OC
Detect
OC
Detect
PGNDL
PVDDL
Rs2
+
_
_
100 Ω
+
_
HPLIN
BYPASS
+
Deglitch
Logic
Gate
Drive
LOUTN
PGNDR
HPROUT
HPLGAIN
_
HPRIN
BYPASS
+
HPRGAIN
2
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HPLOUT
SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
Terminal Functions
TERMINAL
NAME
NO.
I/O
DESCRIPTION
AGND
17
I
Analog ground
BYPASS
29
I
Connect capacitor to ground for BYPASS voltage filtering
COSC
19
I
Connect capacitor to ground to set oscillation frequency
GAIN0
4
I
Bit 0 of gain control
GAIN1
5
I
Bit 1 of gain control
HPLGAIN
12
I
Place RF between pins 12 and 13
HPRGAIN
15
I
Place RF between pins 14 and 15
HPLIN
3
I
Left HP single-ended (SE) input
HPLOUT
13
O
Left headphone output
HPRIN
30
I
Right HP SE input
HPROUT
16
O
Right headphone output
LINN
1
I
Left class-D negative differential input
LINP
2
I
Left class-D positive differential input
LOUTP
7
O
Left positive bridge-tied load (BTL) output
LOUTN
10
O
Left negative BTL output
MODE
14
I
Mode = 1, then HP, Mode = 0, then BTL
NC
21
—
PGNDL
8, 9
I
Left class-D high-current ground
PGNDR
24, 25
I
Right class-D high-current ground
PVDDL
6, 11
I
Left class-D high-current power supply
PVDDR
22, 27
I
Right class-D high power supply
ROSC
18
I
Connect resistor to ground to set oscillation frequency
RINP
31
I
Right class-D positive differential signal
RINN
32
I
Right class-D negative differential signal
ROUTN
23
O
Right negative BTL output
ROUTP
26
O
Right positive BTL output
SHUTDOWN
28
I
Shutdown terminal (negative logic)
VDD
20
I
Power supply
No connection
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Supply voltage, VDD, PVDDL,R . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 5.5 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VDD+0.3 V
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C
Operating junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
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3
SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
DAP
5.3 W
42.5 mW/°C
3.4 W
2.8 W
recommended operating conditions
MIN
Supply voltage, VDD, PVDD, VCC
GAIN0, GAIN1, SHUTDOWN
High-level input voltage, VIH
NOM
MAX
3.7
5.5
2
MODE
V
V
0.8 VDD
V
GAIN0, GAIN1, SHUTDOWN
Low-level input voltage, VIL
UNIT
0.8
MODE
0.4 VDD
V
V
Oscillator resistance, ROSC
120
kΩ
Oscillator capacitance, COSC
220
pF
PWM Frequency
200
300
kHz
Operating free-air temperature, TA
−40
85
°C
electrical characteristics over recommended operating free-air temperature range, TA = 25°C,
VDD = PVDD = 5 V (unless otherwise noted)
PARAMETER
|VOS|
Output offset voltage (measured differentially)
PSRR
Power supply rejection ratio
| IIH |
High-level input current
| IIL |
Low-level input current
IDD
Supply current
IDD(SD)
TEST CONDITIONS
VI = 0 V, AV = −2 V/V
PVDD = 4.5 V to 5.5 V
MIN
Class D
Headphone
MODE = 5 V
MAX
15
Class-D
−70
PVDD = 4.5 V to 5.5 V
Headphone
PVDD = 5.5 V,
VI = PVDD
PVDD = 5.5 V,
MODE = 0 V
TYP
Shutdown mode
mV
dB
−75
VI = 0 V
UNIT
1
µA
1
µA
9
12
7
11
0.05
1
mA
µA
A
operating characteristics, class-D amplifier, TA = 25°C, VDD = PVDD = 5 V, RL = 4 Ω, Gain = all gains
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
PO
THD+N
Output power
THD = 0.1%,
Total harmonic distortion plus noise
BOM
kSVR
Maximum output power bandwidth
PO = 1 W,f = 20 Hz to 20 kHz
THD = 1%
Supply ripple rejection ratio
f = 1 kHz,
SNR
Signal-to-noise ratio
Vn
ZI
Noise output voltage
4
f = 1 kHz
CBYPASS = 1 µF
CBYPASS = 1 µF,
Input impedance
f = 20 Hz to 20 kHz
MIN
TYP
2
UNIT
W
< 0.4%
20
kHz
−71
dB
85
dB
20
µVRMS
kΩ
>15
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MAX
SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
operating characteristics, class-D amplifier, TA = 25°C, VDD = PVDD = 5 V, RL = 8 Ω, Gain = all gains
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
PO
THD+N
Output power
THD = 0.1%,
f = 1 kHz
Total harmonic distortion plus noise
Maximum output power bandwidth
PO = 0.5 W,
THD = 1%
f = 20 Hz to 20 kHz
BOM
kSVR
Supply ripple rejection ratio
f = 1 kHz,
CBYPASS = 1 µF
SNR
Signal-to-noise ratio
Vn
ZI
Noise output voltage
CBYPASS = 1 µF,
TYP
MAX
1.5
UNIT
W
<0.2%
f = 20 Hz to 20 kHz
Input impedance
20
kHz
−71
dB
85
dB
20
µVRMS
kΩ
>15
operating characteristics, headphone amplifier, TA = 25°C, VDD = PVDD = 5 V, RL = 32 Ω, Gain = 1 V/V
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
PO
THD+N
Output power
THD = 0.1%,
f = 1 kHz
Total harmonic distortion plus noise
f = 20 Hz to 20 kHz
BOM
kSVR
Maximum output power bandwidth
PO = 75 mW,
THD = 1%
Supply ripple rejection ratio
f = 1 kHz,
CBYPASS = 1 µF
SNR
Signal-to-noise ratio
Vn
Noise output voltage
CBYPASS = 1 µF,
TYP
90
f = 20 Hz to 20 kHz
MAX
UNIT
mW
<0.2%
20
kHz
−42
dB
80
dB
20
µVRMS
Table 1. Gain Settings
AMPLIFIER GAIN
(dB)
INPUT IMPEDANCE
(kΩ)
TYP
TYP
6
104
1
12
74
0
18
44
1
23.5
24
GAIN1
GAIN0
0
0
0
1
1
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5
SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Efficiency
vs Output power
2, 3
FFT at 1.5-W Output Power
vs Frequency
Supply current
vs Free-air temperature
Total harmonic distortion + noise
vs Frequency
6, 7
Total harmonic distortion + noise
vs Output power
8, 9
Class-D gain and phase
vs Frequency
10
Class-D crosstalk
vs Frequency
11
Power dissipation
vs Output power
12
FFT at 1.5-W output power
vs Frequency
13
Supply voltage rejection ratio
vs Frequency
14
Headphone total harmonic distortion + noise
vs Frequency
15, 16, 22
Headphone total harmonic distortion + noise
vs Output power
17
Headphone closed-loop gain and phase
vs Frequency
18
Headphone open-loop gain and phase
vs Frequency
19
Headphone crosstalk
vs Frequency
20, 24
Headphone supply voltage rejection ratio
vs Frequency
21
Headphone total harmonic distortion + noise
vs Output voltage
23
Headphone supply current
vs Output voltage
25
Headphone supply current
vs Output power
26
4
5
test set-up for graphs
The THD+N measurements shown do not use an LC output filter, but use a low pass filter with a cut-off frequency
of 20 kHz so the switching frequency does not dominate the measurement. This is done to ensure that the
THD+N measured is just the audible THD+N. The THD+N measurements are shown at the highest gain for
worst case.
The LC output filter used in the efficiency curves (Figure 2 and Figure 3) is shown in Figure 1.
L1 = L2 = 22 µH (DCR = 110 mΩ,
Part Number = SCD0703T−220 M−S,
Manufacturer = GCI)
C1 = C2 = 1 µF
The ferrite filter used in the efficiency curves (Figure 2 and Figure 3) is shown in Figure 1, where L is a ferrite
bead.
L1 = L2 = ferrite bead (part number = 2512067007Y3, manufacturer = Fair-Rite) C1 = C2 = 1 nF
L1
OUT+
C1
OUT−
L2
C2
Figure 1. Class-D Output Filter
6
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SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
TYPICAL CHARACTERISTICS
EFFICIENCY
vs
OUTPUT POWER
EFFICIENCY
vs
OUTPUT POWER
90
80
Ferrite Bead Filter
LC Filter
80
70
No Filter
LC Filter
60
Efficiency − %
60
50
40
Class-AB
30
Notebook Speaker
50
40
30
Class−AB
20
20
RL = 8 Ω, Multimedia Speaker
VDD = 5 V
10
0
0.2
0.4
0.6
0.8
PO − Output Power − W
1
RL = 3 Ω, Notebook PC Speaker
VDD = 5 V
10
0
0
1.2
0
0.5
1
1.5
PO − Output Power − W
Figure 2
2
Figure 3
FFT AT 1.5-W OUTPUT POWER
vs
FREQUENCY
+0
VDD = 5 V,
fIN = fO = 1 kHz,
PO = 1.5 W,
Bandwidth = 20 Hz to 22 kHz,
16386 Frequency Bins
−20
Output Power − dB
Efficiency − %
Ferrite Bead Filter
70
−40
−60
−80
−100
−120
−140
0
2k
4k
6k
8k
10k
12k
14k
16k
18k
20k
22k
24k
f − Frequency − Hz
Figure 4
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7
SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
THD+N − Total Harmonic Distortion + Noise − %
12
HP
10
I DD − Supply Current − mA
Class−D
8
6
4
2
0
−50
0
50
100
150
TA − Free-Air Temperature − °C
10
VDD = 5 V,
RL = 8 Ω,
All Gains
5
2
1
PO = 0.05 W
0.5
PO = 0.25 W
0.2
0.1
PO = 0.5 W
0.05
0.02
0.01
200
20
50
100 200
Figure 5
VDD = 5 V,
RL = 4 Ω,
All Gains
THD+N − Total Harmonic Distortion + Noise − %
THD+N − Total Harmonic Distortion + Noise − %
TOTAL HARMONIC DISTORTION + NOISE
vs
OUTPUT POWER
10
2
1
PO = 0.1 W
0.5
0.2
0.1
PO = 2 W
0.05
PO = 1.5 W
0.02
0.01
20
50
100 200
500 1 k 2 k
f − Frequency − Hz
5 k 10 k 20 k
Figure 7
8
5 k 10 k 20 k
Figure 6
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
5
500 1 k 2 k
f − Frequency − Hz
10
5
VDD = 5 V,
RL = 8 Ω,
All Gains
2
1
0.5
f = 20 Hz
0.1
0.05
0.02
0.01
10 m
f = 20 kHz
20 m
50 m 100 m 200 m 500 m
PO − Output Power − W
Figure 8
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f = 1 kHz
0.2
1
2
SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
TYPICAL CHARACTERISTICS
CLASS-D GAIN AND PHASE
vs
FREQUENCY
100
25
10
VDD = 5 V,
RL = 4 Ω,
All Gains
5
24
23
60
22
40
f = 20 Hz
0.5
f = 1 kHz
0.2
0.1
20
21
Phase
20
0
19
−20
18
−40
0.05
VDD = 5 V,
PO = 1 W,
RL = 4 Ω,
All Gains
17
f = 20 kHz
0.02
16
0.01
10 m 20 m
−60
−80
15
50 m 100 m 200 m 500 m
PO − Output Power − W
1
2
20
3
Phase − Degerees
1
50 100 200
500 1 k 2 k
−100
5 k 10 k 20 k 40 k
f − Frequency − Hz
Figure 9
Figure 10
CLASS-D CROSSTALK
vs
FREQUENCY
POWER DISSIPATION
vs
OUTPUT POWER
0.6
−10
VDD = 5 V,
RL = 8 Ω Speaker
VDD = 5 V,
PO = 1 W
RL = 4 Ω,
All Gains
−30
0.5
Power Dissipation − W
−20
Class−D Crosstalk − dB
80
Gain
2
Class−D Gain − dBV
THD+N − Total Harmonic Distortion + Noise − %
TOTAL HARMONIC DISTORTION + NOISE
vs
OUTPUT POWER
−40
−50
−60
−70
L to R
−80
R to L
0.4
0.3
0.2
0.1
−90
−100
0
20
50
100 200
500 1 k
2k
5 k 10 k 20 k
f − Frequency − Hz
Figure 11
0
0.2
0.4
0.6
0.8
PO − Output Power − W
1
1.2
Figure 12
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9
SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
TYPICAL CHARACTERISTICS
FFT AT 1.5-W OUTPUT POWER
vs
FREQUENCY
0
VDD = 5 V,
f = 1 kHz,
PO = 1.5 W,
RL = 4 Ω
Gain − dBv
−20
−40
−60
−80
−100
−120
−140
0
2k
4k
6k
8k
10 k 12 k
14 k
f − Frequency − Hz
16 k
18 k
20 k
22 k
24 k
Figure 13
k SVR− Supply Voltage Rejection Ratio − dB
−40
−45
VDD = 5 V,
RL = 4 Ω
−50
−55
−60
−65
−70
−75
−80
20
100
1k
f − Frequency − Hz
10 k 20 k
THD+N − Total Harmonic Distortion Distortion + Noise − %
HEADPHONE
SUPPLY VOLTAGE REJECTION RATIO
vs
FREQUENCY
10
5
2
VDD = 5 V,
RL = 32 Ω,
AV = 0 dB
1
0.5
0.2
PO = 50 mW
0.1
PO = 7.5 mW
0.05
0.02
0.01
0.005
PO = 25 mW
0.002
0.001
20
50
100 200
500 1 k 2 k
f − Frequency − Hz
Figure 14
10
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
Figure 15
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5 k 10 k 20 k
SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
HEADPHONE
HEADPHONE
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
TOTAL HARMONIC DISTORTION + NOISE
vs
OUTPUT POWER
THD+N − Total Harmonic Distrotion + Noise − %
10
5 VDD = 5 V,
RL = 32 Ω,
2 PO = 75 mW
AV = 20 dB
1
0.5
AV = 6 dB
0.1
0.05
0.02
AV = 0 dB
0.01
0.005
0.002
0.001
20
50
100 200
500 1 k 2 k
f − Frequency − Hz
10
5
2
VDD = 5 V,
RL = 32 Ω,
AV = 0 dB
1
0.5
0.2
0.1
f = 100 Hz
0.05
f = 20 kHz
f = 1 kHz
0.02
0.01
0.005
0.002
0.001
100 µ 200 µ 500 µ 1 m 2 m 5 m 10 m 20 m
PO − Output Power − W
5 k 10 k 20 k
Figure 16
50 m 100 m
Figure 17
HEADPHONE
CLOSED-LOOP GAIN AND PHASE
vs
FREQUENCY
0
2
Gain
0
−50
−2
−100
−150
−4
Phase
−200
−6
VDD = 5 V,
PO = 75 mW,
RL = 32 Ω,
AV = 0 dB
−8
−10
100
1k
10 k
100 k
f − Frequency − Hz
1M
Closed-Loop Phase − Degrees
0.2
Closed-Loop Gain − dB
THD+N − Total Harmonic Distortion Distortion + Noise − %
TYPICAL CHARACTERISTICS
−250
−300
10 M
Figure 18
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11
SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
TYPICAL CHARACTERISTICS
HEADPHONE
OPEN-LOOP GAIN AND PHASE
vs
FREQUENCY
120
0
VDD = 5 V,
No Load
100
Open-Loop Gain − dB
Phase
60
−100
40
−150
Gain
20
0
−200
−20
−250
−40
−60
1
10
100
1k
10 k
100 k
1M
−300
10 M
f − Frequency − Hz
Figure 19
HEADPHONE
CROSSTALK
vs
FREQUENCY
0
VDD = 5 V,
PO = 75 mW,
RL = 32 Ω,
AV = 0 dB
−10
−20
Crosstalk − dBV
−30
−40
−50
−60
−70
−80
−90
−100
20
50
100 200
500 1 k 2 k
f − Frequency − Hz
Figure 20
12
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5 k 10 k 20 k
Open-Loop Phase − Degrees
−50
80
SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
TYPICAL CHARACTERISTICS
HEADPHONE
SUPPLY VOLTAGE REJECTION RATIO
vs
FREQUENCY
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
k SVR− Supply Voltage Rejection Ratio − dB
30
VDD = 5 V,
AV = 0 dB,
VO = 1 VRMS,
RL = 10 kΩ
20
10
0
−10
CB = 0.1 µF
−20
CB = 1 µF
−30
−40
−50
CB = 2.5 V
−60
−70
−80
20
50
100 200 500 1 k 2 k
f − Frequency − Hz
5 k 10 k 20 k
THD+N − Total Harmonic Distortion Distortion + Noise − %
HEADPHONE
10
VDD = 5 V,
RL = 10 kΩ,
VO = 1 VRMS
5
1
0.5
0.2
0.1
0.05
AV = 20 dB
0.02
AV = 6 dB
0.01
0.005
0.002
AV = 0 dB
0.001
0.0005
20
50
HEADPHONE
HEADPHONE
TOTAL HARMONIC DISTORTION + NOISE
vs
OUTPUT VOLTAGE
CROSSTALK
vs
FREQUENCY
−20
10
5
5 k 10 k 20 k
Figure 22
VDD = 5 V,
RL = 10 kΩ,
AV = 0 dB
VDD = 5 V,
VO = 1 VRMS,
RL = 10 kΩ,
AV = 0 dB
−30
−40
1
−50
0.5
Crosstalk − dBV
THD+N − Total Harmonic Distortion Distortion + Noise − %
Figure 21
100 200 500 1 k 2 k
f − Frequency − Hz
0.2
0.1
0.05
f = 100 Hz
0.02
0.01
−80
−90
Left to Right
−100
0.002
0.0005
0.1m
Right to Left
−70
f = 20 kHz
0.005
0.001
−60
−110
f = 1 kHz
−120
0.2m
0.4m 0.6m 0.8m 1
VO − Output Voltage − V
2
20
50
100 200
500 1 k 2 k
5 k 10 k 20 k
f − Frequency − Hz
Figure 24
Figure 23
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13
SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
TYPICAL CHARACTERISTICS
HEADPHONE
HEADPHONE
SUPPLY CURRENT
vs
OUTPUT VOLTAGE
SUPPLY CURRENT
vs
OUTPUT POWER
60
60
VDD = 5 V,
RL = 10 kΩ,
AV = 0 dB
50
I DD − Supply Current − mA
I DD − Supply Current − mA
50
40
30
20
10
40
30
20
10
0
0
10
20
30
40
50
60
70
80
0
0
20
40
60
80
100 120 140 160 180
PO − Output Power − mW
VO − Output Voltage − mV
Figure 26
Figure 25
14
VDD = 5 V,
RL = 32 Ω,
AV = 0 dB
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APPLICATION INFORMATION
eliminating the output filter with the TPA2000D4
This section will focus on why the user can eliminate the output filter with the TPA2000D4.
effect on audio
The class-D amplifier outputs a pulse-width modulated (PWM) square wave, which is the sum of the switching
waveform and the amplified input audio signal. The human ear acts as a band-pass filter such that only the
frequencies between approximately 20 Hz and 20 kHz are passed. The switching frequency components are
much greater than 20 kHz, so the only signal heard is the amplified input audio signal.
traditional class-D modulation scheme
The traditional class-D modulation scheme, which is used in the TPA005Dxx family, has a differential output
where each output is 180 degrees out of phase and changes from ground to the supply voltage, VDD. Therefore,
the differential prefiltered output varies between positive and negative VDD, where filtered 50% duty cycle yields
0 V across the load. The traditional class-D modulation scheme with voltage and current waveforms is shown
in Figure 27. Note that even at an average of 0 V across the load (50% duty cycle), the current to the load is
high thus, causing a high supply current.
OUT+
OUT−
5V
Differential Voltage
Across Load
OV
−5 V
Current
Figure 27. Traditional Class-D Modulation Scheme’s Output Voltage and Current Waveforms Into an
Inductive Load With No Input
TPA2000D4 modulation scheme
The TPA2000D4 uses a modulation scheme that still has each output switching from 0 to the supply voltage.
However, OUT+ and OUT− are now in phase with each other with no input. The duty cycle of OUT+ is greater
than 50% and OUT− is less than 50% for positive voltages. The duty cycle of OUT+ is less than 50% and OUT−
is greater than 50% for negative voltages. The voltage across the load sits at 0 V throughout most of the
switching period greatly reducing the switching current, which reduces any I2R losses in the load.
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15
SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
APPLICATION INFORMATION
OUT+
OUT−
Differential
Voltage
Across
Load
Output = 0 V
5V
0V
−5 V
Current
OUT+
OUT−
Differential
Voltage
Output > 0 V
5V
0V
Across
Load
−5 V
Current
Figure 28. The TPA2000D4 Output Voltage and Current Waveforms Into an Inductive Load
efficiency: why you must use a filter with the traditional class-D modulation scheme
The main reason that the traditional class-D amplifier needs an output filter is that the switching waveform
results in maximum current flow. This causes more loss in the load, which causes lower efficiency. The ripple
current is large for the traditional modulation scheme because the ripple current is proportional to voltage
multiplied by the time at that voltage. The differential voltage swing is 2 × VDD and the time at each voltage is
half the period for the traditional modulation scheme. An ideal LC filter is needed to store the ripple current from
each half cycle for the next half cycle, while any resistance causes power dissipation. The speaker is both
resistive and reactive, whereas an LC filter is almost purely reactive.
The TPA2000D4 modulation scheme has very little loss in the load without a filter because the pulses are very
short and the change in voltage is VDD instead of 2 × VDD. As the output power increases, the pulses widen,
making the ripple current larger. Ripple current could be filtered with an LC filter for increased efficiency, but for
most applications the filter is not needed.
An LC filter with a cutoff frequency less than the class-D switching frequency allows the switching current to flow
through the filter instead of the load. The filter has less resistance than the speaker that results in less power
dissipated, which increases efficiency.
16
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SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
APPLICATION INFORMATION
effects of applying a square wave into a speaker
Audio specialists have said for years not to apply a square wave to speakers. If the amplitude of the waveform
is high enough and the frequency of the square wave is within the bandwidth of the speaker, the square wave
could cause the voice coil to jump out of the air gap and/or scar the voice coil. A 250-kHz switching frequency,
however, is not significant because the speaker cone movement is proportional to 1/f2 for frequencies beyond
the audio band. Therefore, the amount of cone movement at the switching frequency is very small. However,
damage could occur to the speaker if the voice coil is not designed to handle the additional power. To size the
speaker for added power, the ripple current dissipated in the load needs to be calculated by subtracting the
theoretical supplied power, PSUP THEORETICAL, from the actual supply power, PSUP, at maximum output power,
POUT. The switching power dissipated in the speaker is the inverse of the measured efficiency, ηMEASURED,
minus the theoretical efficiency, ηTHEORETICAL.
PSPKR = PSUP – PSUP THEORETICAL (at max output power)
(1)
PSPKR = PSUP / POUT – PSUP THEORETICAL / POUT (at max output power)
(2)
PSPKR = 1/ηMEASURED – 1/ηTHEORETICAL (at max output power)
(3)
The maximum efficiency of the TPA2000D4 with an 8-Ω load is 85%. Using equation 3 with the efficiency at
maximum power from Figure 2 (78%), we see that there is an additional 106 mW dissipated in the speaker. The
added power dissipated in the speaker is not an issue as long as it is taken into account when choosing the
speaker.
when to use an output filter
Design the TPA2000D4 without the filter if the traces from amplifier to speaker are short. The TPA2000D4
passed FCC and CE radiated emissions with no shielding with speaker wires 8 inches long or less. Notebook
PCs and powered speakers where the speaker is in the same enclosure as the amplifier are good applications
for class-D without a filter.
A ferrite bead filter can often be used if the design is failing radiated emissions without a filter, and the frequency
sensitive circuit is greater than 1 MHz. This is good for circuits that just have to pass FCC and CE because FCC
and CE only test radiated emissions greater than 30 MHz. If choosing a ferrite bead, choose one with high
impedance at high frequencies, but very low impedance at low frequencies.
Use an output filter if there are low frequency (< 1 MHz) EMI sensitive circuits and/or there are long leads from
amplifier to speaker.
gain setting via GAIN0 and GAIN1 inputs
The gain of the TPA2000D4 is set by two input terminals, GAIN0 and GAIN1.
The gains listed in Table 1 are realized by changing the taps on the input resistors inside the amplifier. This
causes the input impedance, ZI, to be dependent on the gain setting. The actual gain settings are controlled
by ratios of resistors, so the actual gain distribution from part-to-part is quite good. However, the input
impedance may shift by 30% due to shifts in the actual resistance of the input resistors.
For design purposes, the input network (discussed in the next section) should be designed assuming an input
impedance of 20 kΩ, which is the absolute minimum input impedance of the TPA2000D4. At the higher gain
settings, the input impedance could increase as high as 115 kΩ.
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17
SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
APPLICATION INFORMATION
Table 2. Gain Settings
AMPLIFIER GAIN
(dB)
INPUT IMPEDANC
(kΩ)
TYP
TYP
6
104
12
74
0
18
44
1
23.5
24
GAIN1
GAIN0
0
0
0
1
1
1
input resistance
Each gain setting is achieved by varying the input resistance of the amplifier, which can range from its smallest
value to over 6 times that value.
ZF
CI
Input
Signal
IN
ZI
The −3 dB frequency can be calculated using equation 4:
f *3 dB +
18
1
2p C I Z I
(4)
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APPLICATION INFORMATION
input capacitor, CI
In the typical application an input capacitor, CI, is required to allow the amplifier to bias the input signal to the
proper dc level for optimum operation. In this case, CI and the input impedance of the amplifier, ZI, form a
high-pass filter with the corner frequency determined in equation 5.
−3 dB
f c(highpass) +
(5)
1
2 p ZI CI
fc
The value of CI is important as it directly affects the bass (low frequency) performance of the circuit. Consider
the example where ZI is 20 kΩ and the specification calls for a flat bass response down to 80 Hz. Equation 5
is reconfigured as equation 6.
CI +
1
2p Z I f c
(6)
In this example, CI is 0.1 µF, so one would likely choose a value in the range of 0.1 µF to 1 µF. If the gain is known
and is constant, use ZI from Table 1 to calculate CI. A further consideration for this capacitor is the leakage path
from the input source through the input network (CI) and the feedback network to the load. This leakage current
creates a dc offset voltage at the input to the amplifier that reduces useful headroom, especially in high gain
applications. For this reason a low-leakage tantalum or ceramic capacitor is the best choice. When polarized
capacitors are used, the positive side of the capacitor should face the amplifier input in most applications as
the dc level there is held at VDD/2, which is likely higher than the source dc level. Note that it is important to
confirm the capacitor polarity in the application.
CI must be 10 times smaller than the bypass capacitor to reduce clicking and popping noise from power on/off
and entering and leaving shutdown. After sizing CI for a given cutoff frequency, size the bypass capacitor to 10
times that of the input capacitor.
CI ≤ CBYP / 10
(7)
switching frequency
The switching frequency is determined using the values of the components connected to ROSC (pin 18) and
COSC (pin 19) and is calculated with the following equation:
fs +
6.6
R OSC C OSC
(8)
The switching frequency was chosen to be centered on 250 kHz. This frequency represents the optimization
of audio fidelity due to oversampling and the maximization of efficiency by minimizing the switching losses of
the amplifier. The recommended values are a resistance of 120 kΩ and a capacitance of 220 pF. Using these
component values, the amplifier operates properly by using 5% tolerance resistors and 10% tolerance
capacitors. The tolerance of the components can be changed, as long as the switching frequency remains
between 200 kHz and 300 kHz. Within this range, the internal circuitry of the device provides stable operation.
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19
SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
APPLICATION INFORMATION
gain setting resistors, RF and RI for HP amplifier
The voltage gain for the TPA2000D4 headphone amplifier is set by resistors RF and RI according to equation 9.
Gain + *
ǒ Ǔ
RF
RI
or Gain (dB) + 20 log
ǒ Ǔ
RF
RI
(9)
Given that the TPA2000D4 is a MOS amplifier, the input impedance is very high. Consequently input leakage
currents are not generally a concern, although noise in the circuit increases as the value of RF increases. In
addition, a certain range of RF values is required for proper start-up operation of the amplifier. Taken together
it is recommended that the effective impedance seen by the inverting node of the amplifier be set between
5 kΩ and 20 kΩ. The effective impedance is calculated in equation 10.
Effective Impedance +
R FR I
(10)
RF ) RI
As an example, consider an input resistance of 20 kΩ and a feedback resistor of 20 kΩ. The gain of the amplifier
would be − 1 and the effective impedance at the inverting terminal would be 10 kΩ, which is within the
recommended range.
For high performance applications, metal film resistors are recommended because they tend to have lower
noise levels than carbon resistors. For values of RF above 50 kΩ, the amplifier tends to become unstable due
to a pole formed from RF and the inherent input capacitance of the MOS input structure. For this reason, a small
compensation capacitor of approximately 5 pF should be placed in parallel with RF. This, in effect, creates a
low-pass filter network with the cutoff frequency defined in equation 11.
fc +
1
2p R F C F
(11)
For example, if RF is 100 kΩ and CF is 5 pF then fc is 318 kHz, which is well outside the audio range.
For maximum signal swing and output power at low supply voltages like 1.6 V to 3.3 V, BYPASS is biased to
VDD/4. However, to allow the output to be biased at VDD/2, a resistor, R, equal to RF must be placed from the
negative input to ground.
input capacitor, CI for HP amplifier
In the typical application, an input capacitor, CI, is required to allow the amplifier to bias the input signal to the
proper dc level for optimum operation. In this case, CI and RI form a high-pass filter with the corner frequency
determined in equation 12.
fc +
1
2p R I C I
(12)
The value of CI is important to consider, as it directly affects the bass (low frequency) performance of the circuit.
Consider the example where RI is 20 kΩ and the specification calls for a flat bass response down to 20 Hz.
Equation 4 is reconfigured as equation 13.
CI +
1
2p R I f c
(13)
In this example, CI is 0.40 µF, so one would likely choose a value in the range of 0.47 µF to 1 µF. A further
consideration for this capacitor is the leakage path from the input source through the input network (RI, CI) and
the feedback resistor (RF) to the load. This leakage current creates a dc offset voltage at the input to the amplifier
that reduces useful headroom, especially in high-gain applications (>10). For this reason a low-leakage
tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the
capacitor should face the amplifier input in most applications, as the dc level there is held at VDD/4, which is
likely higher than the source dc level. It is important to confirm the capacitor polarity in the application.
20
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SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
APPLICATION INFORMATION
output coupling capacitor, CC for HP amplifier
In the typical single-supply single-ended (SE) configuration, an output coupling capacitor (CC) is required to
block the dc bias at the output of the amplifier, thus preventing dc currents in the load. As with the input coupling
capacitor, the output coupling capacitor and impedance of the load form a high-pass filter governed by
equation 14.
fc +
1
2p R L C C
(14)
The main disadvantage, from a performance standpoint, is that the typically small load impedances drive the
low-frequency corner higher. Large values of CC are required to pass low frequencies into the load. Consider
the example where a CC of 68 µF is chosen and loads vary from 32 Ω to 47 kΩ. Table 3 summarizes the
frequency response characteristics of each configuration.
Table 3. Common Load Impedances vs Low Frequency Output Characteristics in SE Mode
RL
CC
Lowest Frequency
32 Ω
68 µF
Ą73 Hz
10,000 Ω
68 µF
0.23 Hz
47,000 Ω
68 µF
0.05 Hz
As Table 3 indicates, headphone response is adequate and drive into line level inputs (a home stereo for
example) is very good.
The output coupling capacitor required in single-supply SE mode also places additional constraints on the
selection of other components in the amplifier circuit. With the rules described earlier still valid, add the following
relationship:
ǒC B
1
v 1 Ơ 1
ǒCI RIǓ RLCC
55 kΩǓ
(15)
power supply decoupling, CS
The TPA2000D4 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling
to ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also
prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is
achieved by using two capacitors of different types that target different types of noise on the power supply leads.
For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance
(ESR) ceramic capacitor, typically 0.1 µF, placed as close as possible to the device VDD lead works best. For
filtering lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater, placed near
the audio power amplifier is recommended.
midrail bypass capacitor, CBYP
The midrail bypass capacitor, CBYP, is the most critical capacitor and serves several important functions. During
start-up or recovery from shutdown mode, CBYP determines the rate at which the amplifier starts up. The second
function is to reduce noise produced by the power supply caused by coupling into the output drive signal. This
noise is from the midrail generation circuit internal to the amplifier, which appears as degraded PSRR and
THD+N.
Bypass capacitor (CBYP) values of 0.47-µF to 1-µF ceramic or tantalum, low-ESR capacitors are recommended
for the best THD and noise performance.
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21
SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
APPLICATION INFORMATION
midrail bypass capacitor, CBYP (continued)
Increasing the bypass capacitor reduces clicking and popping noise from power on/off and entering and leaving
shutdown. To have minimal pop, CBYP should be 10 times larger than CI.
CBYP ≥ 10 × CI
(16)
differential input
The differential input stage of the amplifier cancels any noise that appears on both input lines of a channel. To
use the TPA2000D4 EVM with a differential source, connect the positive lead of the audio source to the RINP
(LINP) input and the negative lead from the audio source to the RINN (LINN) input. To use the TPA2000D4 with
a single-ended source, ac ground the RINN and LINN inputs through a capacitor and apply the audio single to
the RINP and LINP inputs. In a single-ended input application, the RINN and LINN inputs should be ac-grounded
at the audio source instead of at the device inputs for best noise performance.
shutdown modes
The TPA2000D4 employs a shutdown mode of operation designed to reduce supply current, IDD, to the absolute
minimum level during periods of nonuse for battery-power conservation. The SHUTDOWN input terminal
should be held high during normal operation when the amplifier is in use. Pulling SHUTDOWN low causes the
outputs to mute and the amplifier to enter a low-current state, IDD(SD) = 0.05 µA. SHUTDOWN should never be
left unconnected because amplifier operation would be unpredictable.
using low-ESR capacitors
Low-ESR capacitors are recommended throughout this application section. A real (as opposed to ideal)
capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this
resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this
resistance the more the real capacitor behaves like an ideal capacitor.
22
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SLOS337B − DECEMBER 2000 − REVISED NOVEMBER 2005
APPLICATION INFORMATION
evaluation circuit
Right HP SE Input
Right Audio Input+
Right Audio Input−
C5
0.1 µF
C1
0.22 µF
C2
0.22 µF
C3
0.22 µF
1
C4
0.22 µF
2
C5
0.1 µF
R1 20 kΩ
TPA2000D4
Left Audio Input−
Left Audio Input+
Left HP SE Input
R2 20 kΩ
3
4
GAIN SELECT
5
GAIN SELECT
C15
10 µF
C10
0.1 µF
LOUTP
6
7
8
9
10
LOUTN
PVDD
11
C9
1 µF
R4 20 kΩ
12
13
14
15
16
C16
220 µF
R3
20 kΩ
RINN
LINP
RINP
HPLIN
HPRIN
GAIN0
BYPASS
GAIN1
32
31
30
29
C8
0.47 µF
28
To System Control
SHUTDOWN
PVDDL
PVDDR
LOUTP
ROUTP
PGNDL
PGNDR
PGNDL
PGNDR
LOUTN
ROUTN
PVDDL
PVDDR
HPLGAIN
HPLOUT
MODE
NC
VDD
COSC
HPRGAIN
ROSC
HPROUT
AGND
C17
+
R8
120 kΩ
R7
120 kΩ
LINN
220 µF
27
26
C11
1 µF
C14
10 µF
ROUTP
25
24
23
ROUTN
22
C12
1 µF
21
20 C13
0.1 µF
19
220 pF
C7
18
PVDD
R9 120 kΩ
17
R12 1 kΩ
VDD
R11 1 kΩ
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23
PACKAGE OPTION ADDENDUM
www.ti.com
15-Sep-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPA2000D4DAP
ACTIVE
HTSSOP
DAP
32
TPA2000D4DAPG4
ACTIVE
HTSSOP
DAP
32
TPA2000D4DAPR
ACTIVE
HTSSOP
DAP
32
46
2000
Lead/Ball Finish
TBD
CU NIPDAU
TBD
Call TI
TBD
CU NIPDAU
MSL Peak Temp (3)
Level-3-220C-168 HR
Call TI
Level-3-220C-168 HR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
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