TI TPS62730DRYR

TPS62730
SLVSAC3 – MAY 2011
www.ti.com
Step Down Converter with Bypass Mode for Ultra Low Power Wireless Applications
Check for Samples: TPS62730
FEATURES
DESCRIPTION
•
•
•
•
•
•
The TPS62730 is a high frequency synchronous step
down DC-DC converter optimized for ultra low power
wireless applications. The device is optimized to
supply TI's Low Power Wireless sub 1GHz and
2.4GHz
RF
transceivers
and
System-On-Chip-solutions. The TPS62730 reduces
the current consumption drawn from the battery
during TX and RX mode by a high efficient step down
voltage conversion. It provides up to 100mA output
current and allows the use of tiny and low cost chip
inductors and capacitors. With an input voltage range
of 1.9V to 3.9V the device supports Li-primary battery
chemistries such as Li-SOCl2, Li-SO2, Li-MnO2 and
also two cell alkaline batteries.
1
•
•
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Input Voltage Range VIN from 1.9V to 3.9V
Typ. 30nA Ultra Low Power Bypass Mode
Typ. 25 μA DC/DC Quiescent Current
Internal Feedback Divider Disconnect
Typ. 2.1Ω Bypass Switch between VIN and VOUT
Automatic Transition from DC/DC to Bypass
Mode
Up To 3MHz switch frequency
Up to 95% DC/DC Efficiency
Open Drain Status Output STAT
Output Peak Current up to 100mA
Fixed Output Voltage 2.1V
Small External Output Filter Components
2.2μH/ 2.2μF
Optimized For Low Output Ripple Voltage
Small 1 × 1.5 × 0.6mm3 SON Package
12 mm2 Minimum Solution Size
APPLICATIONS
•
•
•
In DC/DC operation mode the device provides a
regulated output voltage of 2.1V to the system. With a
switch frequency up to 3MHz, the TPS62730 features
low output ripple voltage and low noise even with a
small 2.2uF output capacitor. The automatic transition
into bypass mode during DC/DC operation prevents
an increase of output ripple voltage and noise once
the DC/DC converter operates close to 100% duty
cycle. The device automatically enters bypass mode
once the battery voltage falls below the transition
threshold VIT BYP . The TPS62730 is available in a 1 ×
1.5mm2 6 pin QFN package.
CC2540 Bluetooth Low Energy
System-On-Chip Solution
Low Power Wireless Applications
RF4CE, Metering
29
IBAT NO TPS62730
Battery Current - mA
27
25
Battery Current
Reduction @
CC2540
0dBm CW TX
Power
23
The TPS62730 features an Ultra Low Power bypass
mode with typical 30nA current consumption to
support sleep and low power modes of TI's CC2540
Bluetooth Low Energy and CC430 System-On-Chip
solutions. In this bypass mode, the output capacitor
of the DC/DC converter is connected via an
integrated typ. 2.1Ω Bypass switch to the battery.
VIN
2.2V - 3.9V*
21
TPS62730
VIN
IBAT With TPS62730
CIN
2.2µF
19
17
15
2
Battery Current Reduction of CC2540
2.4GHz Bluetooth Low Energy
System-On-Chip Solution
2.2
2.4
2.6
2.8
3
3.2
3.4
GND
SW
VOUT
ON
BYP
ON/BYP
L 2.2mH
VOUT
2.1V
COUT
2.2µF
Rpullup
STAT
* At VIN < 2.2V, VOUT tracks VIN
3.6
3.8
Battery Voltage - VBAT
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
TPS62730
SLVSAC3 – MAY 2011
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
TA
–40°C to
85°C
PART
NUMBER (1)
Automatic Bypass Mode Transition
Thresholds VIT BYP
VIT BYP [V]
rising VIN
VIT BYP [V]
falling VIN
VIT BYP [mV]
hysteresis
PACKAGE
MARKING
ORDERING
TPS62730
2.10
2.25
2.20
50
TPS62730DRY
RP
TPS62731 (2)
2.05
2.2
2.15
50
TPS62731DRY
RQ
TPS62732 (2)
1.90
2.10
2.05
50
TPS62732DRY
RR
(2)
2.10
2.28
2.23
50
TPS62734DRY
SL
TPS62735 (2)
2.10
2.33
2.23
100
TPS62735DRY
SM
TPS62734
(1)
(2)
OUTPUT VOLTAGE
[V] (2)
The DRY package is available in tape on reel. Add R suffix to order quantities of 3000 parts per reel, T suffix for 250 parts per reel.
Device status is product preview, contact TI for more details
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
Voltage range (2)
Temperature range
ESD rating (3)
MIN
MAX
UNIT
VIN, SW, VOUT
–0.3
4.2
V
ON/BYP, STAT
–0.3
VIN +0.3, ≤4.2
V
Operating junction temperature, TJ
–40
125
°C
Storage, Tstg
–65
150
°C
2
kV
Human Body Model - (HBM)
Machine Model (MM)
Charge Device Model - (CDM)
(1)
(2)
(3)
150
V
1
kV
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to network ground terminal.
ESD testing is performed according to the respective JESD22 JEDEC standard.
THERMAL INFORMATION
THERMAL METRIC (1)
DRY / 6 PINS
θJA
Junction-to-ambient thermal resistance
293.8
θJCtop
Junction-to-case (top) thermal resistance
165.1
θJB
Junction-to-board thermal resistance
160.8
ψJT
Junction-to-top characterization parameter
27.3
ψJB
Junction-to-board characterization parameter
159.6
θJCbot
Junction-to-case (bottom) thermal resistance
65.8
(1)
UNITS
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
RECOMMENDED OPERATING CONDITIONS
operating ambient temperature TA = –40 to 85°C (unless otherwise noted)
MIN
NOM
MAX
1.9
Effective inductance
1.5
3
μH
Effective output capacitance connected to VOUT
1.0
10
μF
Operating junction temperature range, TJ
–40
125
°C
TA Operating free air temperature range
-40
85
2
3.9
UNIT
Supply voltage VIN
2.2
V
Copyright © 2011, Texas Instruments Incorporated
TPS62730
SLVSAC3 – MAY 2011
www.ti.com
ELECTRICAL CHARACTERISTICS
VIN = 3.0V, VOUT = 2.1V, ON/BYP = VIN, TA = –40°C to 85°C typical values are at TA = 25°C (unless otherwise noted), CIN =
2.2μF, L = 2.2μH, COUT = 2.2μF, see parameter measurement information
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
1.9
3.9
UNIT
SUPPLY
VIN
Input voltage range
IQ
Operating quiescent current
ISD
Shutdown current, Bypass Switch Activated
ON/BYP = high, IOUT = 0mA. VIN = 3V
device not switching
25
IOUT = 0mA. device switching, VIN = 3.0V,
VOUT = 2.1V
34
ON/BYP = high, Bypass switch active, VIN =
VOUT = 2.1V
23
ON/BYP = GND, leakage current into VIN (1)
30
ON/BYP = GND, leakage current into VIN,
TA = 60°C (1)
V
40
μA
550
nA
110
ON/BYP
Threshold for detecting high ON/BYP
1.9 V ≤ VIN ≤ 3.9V , rising edge
VIL TH
Threshold for detecting low ON/BYP
1.9 V ≤ VIN ≤ 3.9V , falling edge
IIN
Input bias Current
VIH
TH
0.8
0.4
1
0.6
0
V
V
50
nA
POWER SWITCH
RDS(ON)
ILIMF
High side MOSFET on-resistance
600
VIN = 3.0V
Low Side MOSFET on-resistance
Forward current limit MOSFET high-side
VIN = 3.0V, open loop
Forward current limit MOSFET low side
mΩ
350
410
mA
410
mA
BYPASS SWITCH
RDS(ON) Bypass Switch on-resistance
VIT BYP
Automatic Bypass Switch Transition
Threshold (Activation / Deactivation)
VIN = 2.1V, IOUT = 20mA, TJmax = 85°C
2.9
VIN = 3V
2.1
ON/BYP = TPS62730 (2.1V)
high
TPS62731 (2.05V)
TPS62732 (1.9V)
TPS62734 (2.1V)
TPS62735 (2.3V)
3.8
ON / falling VIN
2.14
2.20
2.3
OFF/ rising VIN
2.19
2.25
2.35
ON / falling VIN
2.15
OFF / rising VIN
2.20
ON / falling VIN
2.05
OFF / rising VIN
2.10
ON / falling VIN
2.23
OFF / rising VIN
2.28
ON / falling VIN
2.23
OFF / rising VIN
2.33
Ω
V
STAT Status Output (Open Drain)
VTSTAT
Threshold level for STAT OUTPUT in % from VOUT
ON/BYP = high and regulator is ready, VIN
falling
95
ON/BYP = high and regulator is ready, VIN
rising
98
%
VOL
Output Low Voltage
Current into STAT pin I = 500μA, VIN = 2.3V
0.4
VOH
Output High Voltage
Open drain output, external pullup resistor
VIN
ILKG
Leakage into STAT pin
ON/BYP = GND, VIN = VOUT = 3V
0
50
V
nA
REGULATOR
tONmin
Minimum ON time
VIN = 3.0V, VOUT = 2.1V, IOUT = 0 mA
tOFFmin
Minimum OFF time
VIN = 2.3V
tStart
Regulator start up time from transition ON/BYP = high VIN = 3.0V, VOUT = 3.0V
to STAT = low
(1)
180
ns
50
ns
50
μs
Shutdown current into VIN pin, includes internal leakage
Copyright © 2011, Texas Instruments Incorporated
3
TPS62730
SLVSAC3 – MAY 2011
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
VIN = 3.0V, VOUT = 2.1V, ON/BYP = VIN, TA = –40°C to 85°C typical values are at TA = 25°C (unless otherwise noted), CIN =
2.2μF, L = 2.2μH, COUT = 2.2μF, see parameter measurement information
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
UNIT
OUTPUT
VREF
VVOUT
ILK_SW
(2)
Internal Reference Voltage
0.70
TA = 25°C
–1.5
TA = –40°C to 85°C
–2.5
VOUT Feedback Voltage Comparator Threshold
Accuracy
VIN = 3.0V
DC output voltage load regulation
IOUT = 1mA to 50mA VIN = 3.0V, VOUT = 2.1
V
DC output voltage line regulation
IOUT = 20 mA, 2.4V ≤ VIN ≤ 3.9V
Leakage current into SW pin
VIN = VOUT = VSW = 3.0 V, ON/Byp= GND
(2)
V
0
1.5
0
2.5
-0.01
%
%/mA
0.01
0.0
%/V
100
nA
The internal resistor divider network is disconnected from VOUT pin.
STAT
VOUT
ON/BYP
PIN FUNCTIONS
PIN
NAME
NO
I/O
DESCRIPTION
VIN
3
PWR
VIN power supply pin. Connect this pin close to the VIN terminal of the input capacitor. A ceramic capacitor
of 2.2µF is required.
GND
4
PWR
GND supply pin. Connect this pin close to the GND terminal of the input and output capacitor.
ON/BYP
5
IN
SW
2
OUT
VOUT
6
IN
STAT
1
OUT
4
This is the mode selection pin of the device. Pulling this pin to low forces the device into ultra low power
bypass mode. The output of the DC/DC converter is connected to VIN via an internal bypass switch.
Pulling this pin to high enables the DC/DC converter operation. This pin must be terminated and is
controlled by the system. In case of CC2540, connect this to the power down signal which is output on one
of the P1.x ports (see CC2540 user guide).
This is the switch pin and is connected to the internal MOSFET switches. Connect the inductor to this
terminal.
Feedback Pin for the internal feedback divider network and regulation loop. The internal bypass switch is
connected between this pin and VIN. Connect this pin directly to the output capacitor with short trace.
This is the open drain status output with active low level. An internal comparator drives this output. The pin
is high impedance with ON/BYP = low. With ON/BYP set to high the device and the internal VOUT
comparator becomes active. The STAT pin is set to low once the output voltage is higher than 93% of
nominal VOUT and high impedance once it is below this threshold. If not used, this pin can be left open.
Copyright © 2011, Texas Instruments Incorporated
TPS62730
SLVSAC3 – MAY 2011
www.ti.com
FUNCTIONAL BLOCK DIAGRAM
VIN
Automatic
Bypass
Transition
VIT BYP
VIN
+
VREF
0.70 V
Bandgap
Undervoltage
Lockout
Current
Limit Comparator
Limit
High Side
/BYPASS
/BYPASS
PMOS
VOUT
ON/BYP
Softstart
VIN
Min. On Time
Control
Logic
FB
Min. OFF Time
Gate Driver
Anti
Shoot-Through
VREF
NMOS
VOUT
Integrated
Feed Back
Network
SW
Limit
Low Side
Error
Comparator
Zero/Negative
Current Limit Comparator
VTSTAT
ON/BYP
Copyright © 2011, Texas Instruments Incorporated
GND
STAT
ON/BYP
+
5
TPS62730
SLVSAC3 – MAY 2011
www.ti.com
PARAMETER MEASUREMENT INFORMATION
VIN
1.9V - 3.9V
TPS6273x
VIN
GND
CIN
2.2µF
L 2.2mH
SW
VOUT
ON
BYP
ON/BYP
VOUT
COUT
2.2µF
STAT
Additional Decoupling
capacitor bank
4x100nF
1x 1uF
1x 2.2uF
RSTAT
10k
CDEC
,
CIN COUT: Murata GRM155R60J225ME15D 2.2 mF 0402 size
CLoad:
4 x Murata GRM155R61A104KA01D 100nF
1 x 2.2 mF GRM155R60J225ME15D
1 x 1mF GRM155R61A105KE15D
L: Murata LQM21PN2R2NGC 2.2 mH, FDK MIPSZ2012 2R2
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
η
Efficiency
vs Output current
1
η
Efficiency
vs Input voltage
2
Output voltage
vs Output current
3
Output Voltage
vs Input voltage
4
ISD
Shutdown current bypass mode
vs Input voltage
5
IQ
Operating quiescent current
vs Input voltage
6
Bypass Drain-source on-state resistance
vs Input voltage and ambient temperature
7
PMOS Static drain-source on-state resistance
vs Input voltage and ambient temperature
8
NMOS Static drain-source on-state resistance
vs Input voltage and ambient temperature
9
Automatic transition into bypass
Falling VIN
10
Automatic transition into bypass
Rising VIN
11
Switching frequency
vs IOUT vs VIN
12
Output ripple voltage
vs IOUT vs VIN
13
PSRR
vs Frequency
14
Noise Density
vs Frequency
15
IOUT = 10 mA
16
IOUT = 1 mA
17
IOUT = 18 mA
18
IOUT = 50 mA
19
VOUT
rDS(ON)
VOUT
DC/DC mode operation
DC/DC mode operation line and load transient
performance
20
Automatic bypass transition with falling/rising input
voltage
21
DC/DC mode VOUT AC load regulation performance
22
Bypass mode operation VOUT AC behavior ON/BYP
= GND
23
Startup behavior
24
Spurious output noise
Battery current reduction
Mode transition ON/BYP behavior
6
25
vs Battery voltage
26
27
Copyright © 2011, Texas Instruments Incorporated
TPS62730
SLVSAC3 – MAY 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
100
100
IOUT = 50 mA
95
VIN = 2.1 V
Bypass
95
90
75
Efficiency - %
Efficiency - %
85
VIN = 2.3 V
VIN = 2.7 V
VIN = 3 V
VIN = 3.6 V
80
70
65
55
1
10
IO - Output Current - mA
80
70
IOUT = 100 mA
TPS62730
VOUT = 2.1 V,
ON/BYP = High,
L = 2.2 mH,
COUT = 2.2 mF
60
55
50
2.1
100
2.3
2.5
2.7 2.9 3.1 3.3
VIN - Input Voltage - V
3.5
3.7
3.9
Figure 2. Efficiency vs Input Voltage
2.142
2.226
TPS62730
VOUT = 2.1 V,
ON/BYP = High,
L = 2.2 mH,
2.121 COUT = 2.2 mF
2.205
IOUT = 1 mA
VIN = 3.3 V
VOUT - Output Voltage DC - V
VOUT - Output Voltage DC - V
IOUT = 10 mA
75
Figure 1. Efficiency vs Output Current
VIN = 3 V
IOUT = 1 mA
65
TPS62730
VOUT = 2.1 V,
ON/BYP = High,
L = 2.2 mH,
COUT = 2.2 mF
60
VIN = 3.6 V
2.1
VIN = 2.3 V
VIN = 2.7 V
2.079
0.1
1
10
IOUT - Output Current - mA
Figure 3. Output Voltage vs Output Current
Copyright © 2011, Texas Instruments Incorporated
2.184
IOUT = 10 mA
IOUT = 19 mA
2.163
IOUT = 25 mA
TPS62730
VOUT = 2.1 V,
ON/BYP = High,
L = 2.2 mH,
COUT = 2.2 mF,
VIN rising
2.142
2.121
2.1
IOUT = 50 mA
2.079
IOUT = 100 mA
VIN = 2.1 V
2.058
0
IOUT = 100 mA
90
85
50
0.1
IOUT = 25 mA
2.058
100
2.037
1.9
2.1
2.3
2.5 2.7 2.9 3.1 3.3
VIN - Input Voltage - V
3.5
3.7
3.9
Figure 4. Output Voltage vs Input Voltage
7
TPS62730
SLVSAC3 – MAY 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
35
TA = 85°C
IQ - Operating Quiescent Current - mA
ISD - Shutdown Current Bypass Mode - nA
1k
TA = 70°C
TA = 60°C
100
TA = 50°C
TA = 25°C
TA = -40°C
10
1.9
2.1
2.3
2.5
2.7
2.9
3.1
3.3
3.5
3.7
TA = 50°C
25
20
TA = 25°C
15
TA = 0°C
5
2.1
2.3
2.5
2.7
2.9
3.1
3.3
3.5
3.7
3.9
Figure 6. Operating Quiescent Current vs Input Voltage
1.6
4
TA = 85°C
rDS(ON) - Drain-Source On-State Resistance - W
rDS(ON) - Drain-Source On-State Resistance - W
TA = -40°C
VIN - Input Voltage - V
Figure 5. Shutdown Current Bypass Mode vs Input
Voltage
TA = 70°C
3.5
TA = 60°C
3
TA = 50°C
TA = 25°C
2.5
2
TA = 0°C
TA = -20°C
1.5
TA = -40°C
1
0.5
2.1
2.3
2.5
2.7
2.9
3.1
3.3
3.5
3.7
VIN - Input Voltage - V
Figure 7. rDS(ON) Bypass vs Input Voltage
8
TA = -20°C
10
VIN - Input Voltage - V
0
1.9
TA = 85°C
TA = 70°C
30
0
1.9
3.9
TA = 60°C
3.9
TA = 85°C
TA = 70°C
1.4
TA = 60°C
1.2
TA = 50°C
TA = 25°C
1
TA = 0°C
0.8
0.6
TA = -20°C
TA = -40°C
0.4
0.2
0
1.9
2.1
2.3
2.5
2.7
2.9
3.1
3.3
3.5
3.7
3.9
VIN - Input Voltage - V
Figure 8. rDS(ON) PMOS vs Input Voltage
Copyright © 2011, Texas Instruments Incorporated
TPS62730
SLVSAC3 – MAY 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
2.3
TA = 85°C
0.6
2.25
TA = 60°C
TA = 50°C
0.5
TA = 25°C
0.4
0.3
ON/BYP = high
automatic transition
into bypass mode
falling VIN
TA = 70°C
VOUT - Output Voltage - V
rDS(ON) - Drain-Source On-State Resistance - W
0.7
TA = 0°C
TA = -20°C
TA = -40°C
0.2
IOUT = 1 mA 25ºC
2.2
IOUT = 1 mA 85ºC
IOUT = 20 mA -40ºC
2.15 IOUT = 20 mA 25ºC
IOUT = 20 mA 85ºC
2.1
2.05
0.1
bypass
mode
0
1.9
2.1
2.3
2.5
2.7
2.9
3.1
3.3
3.5 3.7
2
1.9
3.9
2
Figure 9. rDS(ON) NMOS vs Input Voltage
2.4
2.5
Figure 10. Automatic Transition into Bypass Mode Falling VIN
2.3
ON/BYP = high
automatic transition
into bypass mode
2.25 rising VIN
DC/DC
mode
2.1
2.2
2.3
VIN - Input Voltage - V
VIN - Input Voltage - V
3500
IOUT = 1 mA -40ºC
L = 2.2 mH Murata LQM21PN2R2,
COUT = 2.2 mF,
3000
ON/BYP = VIN
V =3V
IOUT = 1 mA 25ºC
IN
IOUT = 1 mA 85ºC
VIN = 2.7 V
2500
2.2 I
OUT = 20 mA -40ºC
f - Frequency - kHz
VOUT - Output Voltage - V
IOUT = 1 mA -40ºC
IOUT = 20 mA
2.15 I
OUT = 20 mA 85ºC
2.1
2000
VIN = 2.5 V
1500
1000
VIN = 3.6 V
2.05
bypass mode
2
1.9
2
2.1
2.2
2.3
VIN - Input Voltage - V
2.4
2.5
Figure 11. Automatic Transition into Bypass Mode - Rising
VIN
Copyright © 2011, Texas Instruments Incorporated
VIN = 3.3 V
500
DC/DC mode
0
0
10
VIN = 2.3 V
20
30
40
IOUT - Output Current - mA
50
Figure 12. Switching Frequency vs IOUT vs VIN
9
TPS62730
SLVSAC3 – MAY 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
100
TPS62730
VOUT = 2.1V
ON/BYP = VIN
L = 2.2mH
COUT = 2.2mF
VIN = 3.6 V
25
VIN = 3.3 V
VIN = 3 V
VOUT - pktopk - mV
PSRR - Power Supply Rejection Ratio - dB
30
20
15
10
VIN = 2.3 V
VIN = 2.5 V
VIN = 2.7 V
5
90
VIN = 2.7 V,
IOUT = 25 mA,
80
COUT = 2.2 mF,
L = 2.2 mH
70
60
50
40
30
20
10
0
0
0
10
20
30
40
IOUT - Output Current - mA
50
10
Figure 13. VOUT vs IOUT vs VIN
100
1k
10k
100k
f - Frequency - Hz
1M
10M
Figure 14. PSRR vs Frequency
5
4.5
4
VIN = 2.7 V,
TPS62730
VOUT = 2.1 V
ON/BYP = VIN
IOUT = 25 mA (RLOAD = 84W),
IOUT = 10mA
L = 2.2 mH
COUT = 2.2 mF
COUT = 2.2 mF,
L = 2.2 mF
Noise Density [mV/√Hz]
3.5
3
2.5
2
1.5
1
0.5
0
100
1k
10k
100k
1M
f - Frequency - Hz
Figure 15. Noise Density vs Frequency
10
Figure 16. DC/DC Mode Operation IOUT = 10mA
Copyright © 2011, Texas Instruments Incorporated
TPS62730
SLVSAC3 – MAY 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
VOUT
TPS62730
VOUT = 2.1 V
VIN = 3.0 V
ON/BYP = VIN
IOUT = 1mA
L = 2.2 mH
COUT = 2.2 mF
CLoad = 3.6mF
VOUT
TPS62730
VOUT = 2.1 V
VIN = 3.0 V
ON/BYP = VIN
IOUT = 18mA
L = 2.2 mH
COUT = 2.2 mF
CLoad = 3.6mF
SW
SW
IL
IL
Figure 17. DC/DC Mode Operation IOUT = 1mA
VOUT
TPS62730
VOUT = 2.1 V
VIN = 3.0 V
ON/BYP = VIN
IOUT = 50mA
L = 2.2 mH
COUT = 2.2 mF
CLoad = 3.6mF
Figure 18. DC/DC Mode Operation IOUT = 18mA
TPS62730
VOUT = 2.1 V
VIN = 2.3V to 2.7V
ON/BYP = VIN
SW
IOUT = 20mA to1mA
L = 2.2 mH
COUT = 2.2 mF
CLoad = 3.6mF
IL
Figure 19. DC/DC Mode Operation IOUT = 50mA
Copyright © 2011, Texas Instruments Incorporated
Figure 20. DC/DC Mode Operation Line and Load
Transient Performance
11
TPS62730
SLVSAC3 – MAY 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
IOUT = 1mA to 50mA
L = 2.2 mH
COUT = 2.2 mF
CLoad = 3.6mF
TPS62730
VOUT = 2.1 V
VIN = 3.0V
ON/BYP = VIN
Automatic Bypass Mode
2.1V
TPS62730
VOUT = 2.1 V
VIN = 1.9V to 2.6V
ON/BYP = VIN
1.9V
Status Output
IOUT = 30mA
L = 2.2 mH
COUT = 2.2 mF
CLoad = 3.6mF
50mA/Div
Status Output
Figure 21. Automatic Bypass Transition with Falling /
Rising Input Voltage VIN
Figure 22. DC/DC Mode VOUT AC Load Regulation
Performance
TPS62730
VOUT = 2.1 V
VIN = 0V to 3.0 V
ON/BYP = VIN
RLoad = 120W
L = 2.2 mH
COUT = 2.2 mF
CLoad = 3.6mF
Source resistance = 1W
50mA/Div
IBAT 1A/Div
Status Output
IOUT = 1mA to 50mA
TPS62730
VIN = 3.0V
L = 2.2 mH
ON/BYP = GND COUT = 2.2 mF
CLoad = 3.6mF
Figure 23. Bypass Mode Operation VOUT AC Behavior
ON/BYP = GND
12
Figure 24. Startup Behavior
Copyright © 2011, Texas Instruments Incorporated
TPS62730
SLVSAC3 – MAY 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
1m
29
800m
700m
600m
IBAT NO TPS62730
27
Battery Current - mA
900m
Output noise [V]
Ref. Lev. 1mV
RBW 30kHz
VBW 20kHz
SWT 42ms
TPS62730
VOUT = 2.1 V
ON/BYP = VIN
RLoad = 82W
IOUT = 26mA
L = 2.2 mH
COUT = 2.2 mF
VIN = 2.3V
500m
VIN = 3.6V
400m
VIN = 3.0V
300m
25
Battery Current
Reduction @
CC2540
0dBm CW TX
Power
23
21
IBAT With TPS62730
19
VIN = 2.7V
200m
17
100m
10n
Start 0Hz
Stop 10 MHz
1MHz/Div
Frequency
15
2
Battery Current Reduction of CC2540
2.4GHz Bluetooth Low Energy
System-On-Chip Solution
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
3.8
Battery Voltage - VBAT
Figure 25. Spurious Output Noise TPS62730 IOUT 26mA
Figure 26. Battery Current Reduction vs Battery Voltage
DC/DC Operation
Bypass Operation
ON/BYP
TPS62730
VIN = 2.3V
IOUT = 1mA to 50mA
L = 2.2 mH
COUT = 2.2 mF
CLoad = 3.6mF
50mA/Div
Status Output
Figure 27. Mode Transition ON/BYP Behavior
Copyright © 2011, Texas Instruments Incorporated
13
TPS62730
SLVSAC3 – MAY 2011
www.ti.com
DETAILED DESCRIPTION
The TPS62730 combines a synchronous buck converter for high efficient voltage conversion and an integrated
ultra low power bypass switch to support low power modes of modern micro controllers and RF IC's. The
synchronous buck converter includes TI's DCS-Control™, an advanced regulation topology, that combines the
advantages of hysteretic and voltage mode control architectures. While a comparator stage provides excellent
load transient response, an additional voltage feedback loop ensures high DC accuracy as well. The
DCS-Control™ enables switch frequencies up to 3MHz, excellent transient and AC load regulation as well as
operation with small and cost competitive external components. The TPS6273x devices offer fixed output voltage
options featuring smallest solution size by using only three external components. Furthermore this step down
converter provides excellent low output voltage ripple over the entire load range which makes this part ideal for
RF applications. In the ultra low power bypass mode, the output of the device VOUT is directly connected to the
input VIN via the internal bypass switch. In this mode, the buck converter is shut down and consumes only 30nA
typical input current. Once the device is turned from ultra low power bypass mode into buck converter operation
for a RF transmission, all the internal circuits of the regulator are activated within a start up time tStart of typ.
50µs. During this time the bypass switch is still turned on and maintains the output VOUT connected to the input
VIN. Once the DC/DC converter is settled and ready to operate, the internal bypass switch is turned off and the
system is supplied by the output capacitor and the other decoupling capacitors. The buck converter kicks in once
the capacitors connected to VOUT are discharged to the level of the nominal buck converter output voltage.
Once the output voltage falls below the threshold of the internal error comparator, a switch pulse is initiated, and
the high side switch of the DC/DC converter is turned on. It remains turned on until a minimum on time of tONmin
expires and the output voltage trips the threshold of the error comparator or the inductor current reaches the high
side switch current limit. Once the high side switch turns off, the low side switch rectifier is turned on and the
inductor current ramps down until the high side switch turns on again or the inductor current reaches zero. The
converter operates in the PFM (Pulse Frequency Modulation) mode during light loads, which maintains high
efficiency over a wide load current range. In PFM Mode, the device starts to skip switch pulses and generates
only single pulses with an on time of tONmin. The PFM mode of TPS62730 is optimized for low output ripple
voltage if small external components are used.
The on time tONmin can be estimated to:
V
t ONmin = OUT ´ 260 ns
VIN
(1)
Therefore, the peak inductor current in PFM mode is approximately:
(V - VOUT )
´ t ONmin
ILPFMpeak = IN
L
(2)
With
tONmin: High side switch on time [ns]
VIN: Input voltage [V]
VOUT: Output voltage [V]
L : Inductance [μH]
ILPFMpeak : PFM inductor peak current [mA]
ON/BYP MODE SELECTION
The DC/DC converter is activated when ON/BYP is set high. For proper operation, the ON/BYP pin must be
terminated and may not be left floating. This pin is controlled by the RF transceiver or micro controller for proper
mode selection. Pulling the ON/BYP pin low activates the Ultra Low Power Bypass Mode with typical 30nA
current consumption. In this mode, the internal bypass switch is turned on and the output of the DC/DC converter
is connected to the battery VIN. All other circuits like the entire internal-control circuitry, the High Side and Low
Side MOSFET's of the DC/DC output stage are turned off as well the internal resistor feedback divider is
disconnected. The ON/BYP need to be controlled by a Micro controller for proper mode selection.
14
Copyright © 2011, Texas Instruments Incorporated
TPS62730
SLVSAC3 – MAY 2011
www.ti.com
START UP
Once the device is supplied with a battery voltage, the bypass switch is activated. If the ON/BYP pin is set to
high, the device operates in bypass mode until the DC/DC converter has settled and can kick in. During start up,
high peak currents can flow over the bypass switch to charge up the output capacitor and the additional
decoupling capacitors in the system.
AUTOMATIC TRANSITION FROM DC/DC TO BYPASS OPERATION
With pin ON/BYP set to high, the TPS62730 features an automatic transition between DC/DC and bypass mode
to reduce the output ripple voltage to zero. Once the input voltage comes close to the output voltage of the
DC/DC converter, the DC/DC converters operates close to 100% duty cycle operation. At this operating
condition, the switch frequency would start to drop and would lead to increased output ripple voltage. The internal
bypass switch is turned on once the battery voltage at VIN trips the Automatic Bypass Transition Threshold VIT
BYP for falling VIN. The DC/DC regulator is turned off and therefore it generates no output ripple voltage. Due to
the output is connected via the bypass switch to the input, the output voltage follows the input voltage minus the
voltage drop across the internal bypass switch. In this mode the current consumption of the DC/DC converter is
reduced to typically 23µA. Once the input voltage increases and trips the bypass deactivation threshold VIT BYP
for rising VIN, the DC/DC regulator turns on and the bypass switch is turned off.
INTERNAL CURRENT LIMIT
The TPS62730 integrates a High Side and Low Side MOSFET current limit to protect the device against heavy
load or short circuit when the DC/DC converter is active. The current in the switches is monitored by current limit
comparators. When the current in the High Side MOSFET reaches its current limit, the High Side MOSFET is
turned off and the Low Side MOSFET is turned on to ramp down the current in the inductor. The High Side
MOSFET switch can only turn on again, once the current in the Low Side MOSFET switch has decreased below
the threshold of its current limit comparator. The bypass switch doesn't feature a current limit to support lowest
current consumption.
Battery
Voltage
VIT BYP rising
VIT BYP falling
ON/BYP
DC/DC
Stepdown
Mode
Bypass
Operation
Figure 28. Operation Mode Diagram with ON/BYP = High
Copyright © 2011, Texas Instruments Incorporated
15
TPS62730
SLVSAC3 – MAY 2011
www.ti.com
ON/BYP
VOUT
VTSTAT
VBAT
VOUT DC/DC bypass mode
Discharge
COUT
by system
DC/DC
kick in
STAT
tStart
Figure 29. Signal Status Diagram ON/BYP, VOUT, STAT
16
Copyright © 2011, Texas Instruments Incorporated
TPS62730
SLVSAC3 – MAY 2011
www.ti.com
APPLICATION INFORMATION
VIN
2.2V - 3.9V*
CIN
2.2µF
TPS62730
VIN
GND
SW
VOUT
COUT
2.2µF
ON
BYP
ON/BYP
VOUT
2.1V
L 2.2mH
Rpullup
STAT
* At VIN < 2.2V, VOUT tracks VIN
Figure 30. Typical Application
TPS62730
3V
Battery
CIN
2.2µF
CBUF
VIN
GND
ON/BYP
L 2.2mH
SW
VOUT
VCC2540
COUT
2.2µF
2.1V
STAT
Power Down Signal
L BEAD
VCC2540 1000W
@100MHz
P1.2 PMUX
DVDD 1
DVDD 2
AVDD 6
AVDD 5
AVDD 3
AVDD 1,2,4
DCOUPL
2.2µF 1µF
5x 100nF
1µF
CC2540
CC2540 power supply decoupling capacitors
Figure 31. Application Example CC2540
Copyright © 2011, Texas Instruments Incorporated
17
TPS62730
SLVSAC3 – MAY 2011
www.ti.com
TPS62730
3V
Battery
CBUF
CIN
2.2µF
VIN
L 2.2mH
SW
VOUT
GND
ON/BYP
VCC430
COUT
2.2µF
2.1V
STAT
CC430
P1.1
Power Down Signal
VCC430
2x
1µF
VCC430
P1.2
DVCC 1,2,3
3x
100nF
L BEAD
12nH
2x
2pF
5x
100nF
AVCC_RF/Guard
1,2,3,4
AVCC
VCC430
1x
1µF
1x
100nF
CC430 power supply decoupling capacitors
Figure 32. Application Example CC430
18
Copyright © 2011, Texas Instruments Incorporated
TPS62730
SLVSAC3 – MAY 2011
www.ti.com
OUTPUT FILTER DESIGN (INDUCTOR AND OUTPUT CAPACITOR)
The TPS62730 is optimized to operate with effective inductance values in the range of 1.5μH to 3μH and with
effective output capacitance in the range of 1.0μF to 10μF. The internal compensation is optimized to operate
with an output filter of L = 2.2μH and COUT = 2.2μF, which gives and LC output filter corner frequency of:
fC =
1
2 ´ p ´ (2.2 mH ´ 2.2 mF )
= 72kHz
(3)
INDUCTOR SELECTION
The inductor value affects its peak-to-peak ripple current, the PWM-to-PFM transition point, the output voltage
ripple and the efficiency. The selected inductor has to be rated for its dc resistance and saturation current. The
inductor ripple current (ΔIL) decreases with higher inductance and increases with higher VI N or VO UT. Equation 4
calculates the maximum inductor current under static load conditions. The saturation current of the inductor
should be rated higher than the maximum inductor current as calculated with Equation 5
Vout
1Vin
D IL = Vout ´
L ´ ¦
(4)
ILmax = Ioutmax +
DIL
2
(5)
With:
f = Switching Frequency
L = Inductor Value
ΔIL= Peak to Peak inductor ripple current
ILmax = Maximum Inductor current
In high-frequency converter applications, the efficiency is essentially affected by the inductor AC resistance (i.e.,
quality factor) and to a smaller extent by the inductor DCR value. To achieve high efficiency operation, care
should be taken in selecting inductors featuring a quality factor above 25 at the switching frequency. Increasing
the inductor value produces lower RMS currents, but degrades transient response. For a given physical inductor
size, increased inductance usually results in an inductor with lower saturation current.
The total losses of the coil consist of both the losses in the DC resistance, R(DC), and the following
frequency-dependent components:
• The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies)
• Additional losses in the conductor from the skin effect (current displacement at high frequencies)
• Magnetic field losses of the neighboring windings (proximity effect)
• Radiation losses
The following inductor series from different suppliers have been used with the TPS62730 converters.
Table 1. List of inductors
INDUCTANCE
[μH]
DIMENSIONS
[mm3]
INDUCTOR TYPE
SUPPLIER
2.2
2.0 × 1.2 × 1.0
LQM21PN2R2NGC
Murata
2.2
2.0 × 1.2 × 1.0
MIPSZ2012
FDK
DC/DC OUTPUT CAPACITOR SELECTION
The DCS-Control™ scheme of the TPS62730 allows the use of tiny ceramic capacitors. Ceramic capacitors with
low ESR values have the lowest output voltage ripple and are recommended. The output capacitor requires
either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors, aside from their wide variation in capacitance
over temperature, become resistive at high frequencies. At light load currents the converter operate in Power
Save Mode and the output voltage ripple is dependent on the output capacitor value and the PFM peak inductor
current.
Copyright © 2011, Texas Instruments Incorporated
19
TPS62730
SLVSAC3 – MAY 2011
www.ti.com
ADDITIONAL DECOUPLING CAPACITORS
In addition to the output capacitor there are further decoupling capacitors connected to the output of the
TPS62730. These decoupling capacitor are placed closely at the RF transmitter or micro controller. The total
capacitance of these decoupling capacitors should be kept to a minimum and should not exceed the values given
in the reference designs, see Figure 31 and Figure 32. During mode transition from DC/DC operation to bypass
mode the capacitors on the output VOUT are charged up to the battery voltage VIN via the internal bypass
switch. During mode transition from bypass mode to DC/DC operation, these capacitors need to be discharged
by the system supply current to the nominal output voltage threshold until the DC/DC will kick in. The charge
change in the output and decoupling capacitors can be calculated according to Equation 6. The energy loss due
to charge/discharge of the output and decoupling capacitors can be calculated according to Equation 7
dQCOUT _ CDEC = C COUT _ CDEC ´ (VIN - VOUT _ DC _ DC )
(
2
ECh arg e _ Loss = 12 ´ C COUT _ CDEC ´ V IN - VOUT _ DC _ DC
(6)
2
)
(7)
with
dQCOUT_CDEC : Charge change needed to charge up / discharge the output and decoupling capacitors from
VOUT_DC_DC to VIN and vice versa
CCOUT_CDEC: Total capacitance on the VOUT pin of the device, includes output and decoupling capacitors
VIN: Input (battery) voltage
VOUT_DC_DC: nominal DC/DC output voltage VOUT
INPUT CAPACITOR SELECTION
Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is
required for best input voltage filtering to ensure proper function of the device and to minimize input voltage
spikes. For most applications a 2.2µF to 4.7µF ceramic capacitor is recommended. The input capacitor can be
increased without any limit for better input voltage filtering.
Table 2 shows a list of tested input/output capacitors.
INPUT BUFFER CAPACITOR SELECTION
In addition to the small ceramic input capacitor a larger buffer capacitor CBuf is recommended to reduce voltage
drops and ripple voltage. When using battery chemistries like Li-SOCl2, Li-SO2, Li-MnO2, the impedance of the
battery has to be considered. These battery types tend to increase their impedance depending on discharge
status and often can support output currents of only a few mA. Therefore a buffer capacitor is recommended to
stabilize the battery voltage during DC/DC operations e.g. for a RF transmission. A voltage drop on the input of
the TPS62730 during DC/DC operation impacts the advantage of the step down conversion for system power
reduction. Furthermore the voltage drops can fall below the minimum recommended operating voltage of the
device and leads to an early system cut off. Both impacts effects reduce the battery life time. To achieve best
performance and to extract most energy out of the battery a good procedure is to design the select the buffer
capacitor value for an voltage drop below 50mVpp during DC/DC operation. The capacitor value strongly
depends on the used battery type, as well the current consumption during a RF transmission as well the duration
of the transmission.
Table 2. List of Capacitor
CAPACITANCE [μF]
SIZE
CAPACITOR TYPE
SUPPLIER
2.2
0402
GRM155R60J225
Murata
CHECKING LOOP STABILITY
The first step of circuit and stability evaluation is to look from a steady-state perspective at the following signals:
• Switching node, SW
• Inductor current, IL
• Output ripple voltage, VOUT(AC)
20
Copyright © 2011, Texas Instruments Incorporated
TPS62730
SLVSAC3 – MAY 2011
www.ti.com
These are the basic signals that need to be measured when evaluating a switching converter. When the
switching waveform shows large duty cycle jitter or the output voltage or inductor current shows oscillations, the
regulation loop may be unstable. This is often a result of board layout and/or L-C combination.
As a next step in the evaluation of the regulation loop, the load transient response is tested. The time between
the application of the load transient and the turn on of the High Side MOSFET, the output capacitor must supply
all of the current required by the load. VOUT immediately shifts by an amount equal to ΔI(LOAD) x ESR, where ESR
is the effective series resistance of COUT. ΔI(LOAD) begins to charge or discharge CO generating a feedback error
signal used by the regulator to return VOUT to its steady-state value. The results are most easily interpreted when
the device operates in PWM mode.
During this recovery time, VOUT can be monitored for settling time, overshoot or ringing that helps judge the
converter’s stability. Without any ringing, the loop has usually more than 45° of phase margin.
Because the damping factor of the circuitry is directly related to several resistive parameters (e.g., MOSFET
rDS(on)) that are temperature dependant, the loop stability analysis has to be done over the input voltage range,
load current range, and temperature range.
LAYOUT CONSIDERATIONS
As for all switching power supplies, the layout is an important step in the design. Especially RF designs demand
careful attention to the PCB layout. Care must be taken in board layout to get the specified performance. If the
layout is not carefully done, the regulator could show poor line and/or load regulation, stability issues as well as
EMI problems and interference with RF circuits. It is critical to provide a low inductance, impedance ground path.
Therefore, use wide and short traces for the main current paths. The input capacitor should be placed as close
as possible to the IC pins as well as the inductor and output capacitor. Use a common Power GND node and a
different node for the Signal GND to minimize the effects of ground noise. Keep the common path to the GND
PIN, which returns the small signal components and the high current of the output capacitors as short as
possible to avoid ground noise. The VOUT line should be connected to the output capacitor and routed away
from noisy components and traces (e.g. SW line).
L1
V IN
Total area
is less than
12mm²
C1
C2
GND
V OUT
Figure 33. Recommended PCB Layout for TPS62730
Copyright © 2011, Texas Instruments Incorporated
21
PACKAGE OPTION ADDENDUM
www.ti.com
9-Jun-2011
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
TPS62730DRYR
ACTIVE
SON
DRY
6
5000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TPS62730DRYT
ACTIVE
SON
DRY
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
(3)
Samples
(Requires Login)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
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