TI TPS62242-Q1

TPS62242-Q1
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SLVSB38A – MARCH 2011 – REVISED MARCH 2012
2.25-MHz 300-mA Step-Down Converter in DDC/TSOT23 Package
Check for Samples: TPS62242-Q1
FEATURES
1
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Qualified for Automotive Applications
AEC-Q100 Qualified With the Following
Results:
– Device Temperature Grade 2
– Device HBM ESD Classification Level H2
– Device CDM ESD Classification Level C3B
High Efficiency – Greater than 94%
Output Current up to 300 mA
VIN Range From 2 V to 6 V
2.25-MHz Fixed-Frequency Operation
Power-Save Mode at Light Load Currents
Output Voltage Accuracy in PWM Mode ±1.5%
Adjustable Output Voltage from 0.6 V to VIN
Typical 15 μA Quiescent Current
100% Duty Cycle for Lowest Dropout
Available in a TSOT23 Package
Allows < 1-mm Solution Height
APPLICATIONS
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DESCRIPTION
The TPS62242-Q1 device is a high-efficiency
synchronous step-down dc-dc converter optimized for
battery-powered portable applications. It provides up
to 300 mA of output current from a single Li-Ion cell
and is ideal to power portable applications like mobile
phones and other portable equipment.
With an input voltage range of 2 V to 6 V, the device
supports applications powered by Li-Ion batteries with
extended voltage range, two- and three-cell alkaline,
3.3-V and 5-V input voltage rails.
The TPS62242-Q1 operates at 2.25-MHz fixed
switching frequency and enters the power-save mode
of operation at light load currents to maintain high
efficiency over the entire load current range.
The power-save mode is optimized for low outputvoltage ripple. In the shutdown mode, the current
consumption is reduced to less than 1 μA.
TPS62242-Q1 allows the use of small inductors and
capacitors to achieve a small solution size.
The TPS62242-Q1 is available in a 5-pin TSOT23
package.
Automotive Applications
Bluetooth™ Headset
Cell Phones, Smart-Phones
WLAN
Low-Power DSP Supply
Portable Media Players
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
Bluetooth is a trademark of Bluetooth SIG, Inc..
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011–2012, Texas Instruments Incorporated
TPS62242-Q1
SLVSB38A – MARCH 2011 – REVISED MARCH 2012
VIN 2.0V to 6.3V
TPS62242-Q1
VIN
100
VOUT 1.2V
90
Up to 300mA
80
EN
GND
FB
COUT
10 µF
Efficiency - %
CIN
4.7 µF
SW
L1
2.2 µH
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VI = 2 V
VI = 2 V
VI = 2.7
VI = 4.5
VI = 3 V
70
VI = 3.6
60
50
VI = 4.5
40
30
VO = 1.8 V,
MODE = GND,
L = 2.2 mH,
DCR 110 mΩ
20
10
0
0.01
0.1
1
10
100
1000
IO - Output Current - mA
2
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION (1)
TA
–40°C to 115°C
(1)
PACKAGE
TSOT23-5 – DDC
Reel of 3000
ORDERABLE PART NUMBER
TOP-SIDE MARKING
TPS62242QDDCRQ1
SAW
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
VI
VALUE
UNIT
Input voltage range (2)
–0.3 to 7
V
Voltage range at EN
–0.3 to VIN +0.3, ≤7
V
–0.3 to 7
V
Internally limited
A
Voltage on SW
Peak output current
Human Body Model (HBM) AEC-Q100
Classification Level H2
ESD rating (3)
2
Charged Device Model (CDM) AEC-Q100
Classification Level C3B
kV
750
V
TJ
Maximum operating junction temperature
–40 to 150
°C
Tstg
Storage temperature range
-65 to 150
°C
(1)
(2)
(3)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
The human body model is a 100-pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200-pF
capacitor discharged directly into each pin.
DISSIPATION RATINGS
PACKAGE
RθJA
POWER RATING
FOR TA ≤ 25°C
DERATING FACTOR
ABOVE TA = 25°C
DDC
250°C/W
400 mW
4 mW/°C
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
VI
Supply voltage, VIN
NOM
MAX
UNIT
2
6
Output voltage range for adjustable voltage
0.6
VIN
V
TA
Operating ambient temperature
–40
115
°C
TJ
Operating junction temperature
–40
125
°C
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ELECTRICAL CHARACTERISTICS
Over full operating ambient temperature range, typical values are at TA = 25°C. Unless otherwise noted, specifications apply
for condition VIN = EN = 3.6V. External components CIN = 4,7μF 0603, COUT = 10μF 0603, L = 2.2μH, refer to parameter
measurement information.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
VIN
Input voltage range
IOUT
Output current
2
2.3 V ≤ VIN ≤ 6 V
300
2 V ≤ VIN ≤ 2.3 V
150
IOUT = 0 mA. PFM mode enabled, device not
switching
IQ
Operating quiescent current
ISD
Shutdown current
UVLO
Undervoltage lockout threshold
6
V
mA
15
μA
IOUT = 0 mA. PFM mode enabled, device switching,
VOUT = 1.8 V, (1)
18.5
IOUT = 0 mA, switching with no load , PWM
operation , VOUT = 1.8 V, VIN = 3 V
3.8
EN = GND
0.1
TA = 115°C
Falling
1.85
Rising
1.95
mA
1
μA
5
µA
V
ENABLE, MODE
VIH
High level input voltage, EN
VIL
Low level input voltage, EN
IIN
Input bias current, EN
2 V ≤ VIN ≤ 6 V
1
2 V ≤ VIN ≤ 6 V
0
TA = 115°C
EN
VIN
V
0.4
V
0.35
V
0.01
1
μA
240
480
180
380
0.7
0.84
POWER SWITCH
High side MOSFET on-resistance
RDS(on)
Low side MOSFET on-resistance
VIN = VGS = 3.6 V, TA = 25°C
mΩ
ILIMF
Forward current limit MOSFET highside and low side
VIN = VGS = 3.6 V, TA= 25°C
0.56
TA = –40°C to 115°C
0.54
TSD
Thermal shutdown
Increasing junction temperature
135
150
165
°C
Thermal shutdown hysteresis
Decreasing junction temperature
12
14
16
°C
2
2.25
2.5
MHz
0.594
600
0.606
mV
0%
1.5%
0.95
A
OSCILLATOR
fSW
Oscillator frequency
2 V ≤ VIN ≤ 6 V
OUTPUT
VOUT
Output voltage
Vref
Reference voltage
TA = 25°C
Feedback voltage
PWM operation, 2 V ≤ VIN ≤ 6 V, in fixed output
voltage versions VFB = VOUT, See (2)
–1.5%
TA = 115°C
–1.5%
VFB
Feedback voltage PFM mode
1.2
Device in PFM mode
2.5%
0%
Load regulation
-0.5
%/A
μs
tStart Up
Start-up Time
Time from active EN to reach 95% of VOUT nominal
500
tRamp
VOUT ramp UP time
Time to ramp from 5% to 95% of VOUT
250
VIN = 3.6 V, VIN = VOUT = VSW, EN = GND, (3)
0.1
Ilkg
(1)
(2)
(3)
4
Leakage current into SW pin
V
TA = 115°C
μs
1
10
μA
See the parameter measurement information.
for VIN = VO + 0.6
In fixed output voltage versions, the internal resistor divider network is disconnected from FB pin.
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PIN ASSIGNMENTS
DDC PACKAGE
(TOP VIEW)
VIN
1
GND
2
EN
3
5
SW
4
FB
TERMINAL FUNCTIONS
TERMINAL
NAME
I/O
NO.
DESCRIPTION
VIN
1
PWR
VIN power supply pin.
GND
2
PWR
GND supply pin
EN
3
I
SW
5
OUT
FB
4
I
This is the enable pin of the device. Pulling this pin to low forces the device into shutdown mode. Pulling
this pin to high enables the device. This pin must be terminated.
This is the switch pin and is connected to the internal MOSFET switches. Connect the inductor to this
terminal.
Feedback Pin for the internal regulation loop. Connect the external resistor divider to this pin. In case of
fixed output voltage option, connect this pin directly to the output capacitor.
FUNCTIONAL BLOCK DIAGRAM
VIN
Current
Limit Comparator
Thermal
Shutdown
VIN
Undervoltage
Lockout 1.8V
Limit
High Side
EN
PFM Comparator
Reference
0.6V VREF
FB
VREF
Control
Stage
Softstart
VOUT RAMP
CONTROL
Error Amp .
SW1
VREF
Integrator
FB
FB
PWM
Comp.
Zero-Pole
AMP.
Limit
Low Side
RI 1
RI3
RI..N
Gate Driver
AntiShoot-Through
Sawtooth
Generator
Int. Resistor
Network
GND
Current
Limit Comparator
2.25 MHz
Oscillator
GND
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PARAMETER MEASUREMENT INFORMATION
VIN 2.0V to 6.3V
TPS62242-Q1
VIN
CIN
4.7 µF
L1
2.2 µH
VOUT 1.2V
SW
Up to 300mA
EN
GND
COUT
10 µF
FB
TYPICAL CHARACTERISTICS
Table 1. Table of Graphs
FIGURE
vs Output current, Power Save Mode
Efficiency
Figure 1
vs Output current, Forced PWM Mode
vs Output current
vs Output current
Output voltage accuracy
vs Output current, TA = 25°C
Figure 3
vs Output current, TA = –40°C
Figure 4
vs Output current, TA = 85°C
Figure 5
vs Output current, TA = 25°C
vs Output current, TA = 85°C
vs Output current, TA = –40°C
Startup timing
Typical operation
PFM load transient
Figure 6
PWM Mode with VO = 1.8V
Figure 7
PFM Mode with VO = 1.8V
Figure 8
PFM Mode Ripple
Figure 9
1 mA to 50 mA with VO = 1.8V
Figure 10
20 mA to 200 mA with VO = 1.8V
Figure 11
50 mA to 200 mA with VO = 1.8V
PFM line transient
Mode transition
6
IO = 50 mA, 3.6V to 4.2V
Figure 12
IO= 250 mA, 3.6V to 4.2V
Figure 13
PFM to PWM
Figure 14
PWM to PFM
Figure 15
Shutdown Current into VIN
vs Input Voltage, (TA = 85°C, TA = 25°C, TA = -40°C)
Figure 16
Quiescent Current
vs Input Voltage, (TA = 85°C, TA = 25°C, TA = -40°C)
Figure 17
Static Drain-Source On-State
Resistance
vs Input Voltage, (TA = 85°C, TA = 25°C, TA = -40°C)
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Figure 18
Figure 19
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EFFICIENCY (Power Save Mode)
vs
OUTPUT CURRENT
EFFICIENCY
vs
OUTPUT CURRENT
100
100
90
80
VI = 2 V
VI = 2 V
VI = 2.7 V
90 VI = 2.3 V
80
VI = 4.5 V
VI = 3 V
VI = 4.5 V
70
Efficiency − %
Efficiency - %
70
VI = 3.6 V
60
50
VI = 4.5 V
40
30
10
VI = 2.7 V
50
40
30
VO = 1.8 V,
MODE = GND,
L = 2.2 mH,
DCR 110 mΩ
20
VI = 3.6 V
60
VO = 1.2 V,
MODE = GND,
L = 2 mH,
MIPSA2520
CO = 10 mF 0603
20
10
0
0.01
0.1
1
10
100
0
0.01
1000
0.1
IO - Output Current - mA
VO - Output Voltage DC - V
1.86
1.84
OUTPUT VOLTAGE ACCURACY
vs
OUTPUT CURRENT
OUTPUT VOLTAGE ACCURACY
vs
OUTPUT CURRENT
1.88
1.86
PFM
1.82
PWM
1.8
VI = 2.3 V
1.76
1.74
0.01
100
Figure 2.
TA = 25°C,
VO = 1.8 V,
MODE = GND,
L = 2.2 mH,
CO = 10 mF
1.78
10
Figure 1.
VI = 2.7 V
VI = 3 V
VI = 3.6 V
VO - Output Voltage DC - V
1.88
1
1.84
TA = -40°C,
VO = 1.8 V,
MODE = GND,
L = 2.2 mH,
CO = 10 mF
PFM
1.82
1.80
PWM
VI = 2.3 V
1.78
VI = 2.7 V
VI = 3 V
VI = 3.6 V
1.76
VI = 4.5 V
VI = 4.5 V
1.74
0.01
0.1
1
10
100
IO - Output Current - mA
1000
IO − Output Current − mA
1000
Figure 3.
0.1
1
10
100
IO - Output Current - mA
1000
Figure 4.
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OUTPUT VOLTAGE ACCURACY
vs
OUTPUT CURRENT
STARTUP TIMING
1.88
VO - Output Voltage DC - V
1.86
1.84
TA = 85°C,
VO = 1.8 V,
MODE = GND,
L = 2.2 mH,
CO = 10 mF
EN 2V/Div
VIN = 3.6V
RLoad = 10R
VOUT = 1.8V
IIN into CIN
MODE = GND
SW 2V/Div
PFM
1.82
PWM
1.8
1.78
1.76
VOUT 2V/Div
VI = 2.3 V
VI = 2.7 V
VI = 3 V
VI = 3.6 V
VI = 4.5 V
1.74
0.01
0.1
IIN 100mA/Div
1
10
100
IO - Output Current - mA
1000
Time Base - 100ms/Div
Figure 5.
Figure 6.
TYPICAL OPERATION
vs
PWM MODE
TYPICAL OPERATION
vs
PFM MODE
VIN 3.6V
VOUT 1.8V, IOUT 150mA
L 2.2mH, COUT 10mF 0603
VOUT 20mV/Div
VOUT 10mV/Div
VIN 3.6V
VOUT 1.8V, IOUT 10mA
L 2.2mH, COUT 10mF 0603
SW 2V/Div
SW 2V/Div
Icoil 200mA/Div
Icoil 200mA/Div
Time Base - 10ms/Div
Time Base - 10ms/Div
Figure 7.
8
Figure 8.
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PFM MODE RIPPLE
PFM LOAD TRANSIENT
VIN 3.6V; VOUT 1.8V, IOUT 10mA;
L = 4.7mH, COUT = 10mF 0603,
MODE = GND
VOUT 20mV/Div
VOUT 50mV/Div
SW 2V/Div
IOUT 50mA/Div
50mA
VIN 3.6V
VOUT 1.8V
IOUT 1mA to 50mA
MODE = GND
1mA
Icoil 200mA/Div
Icoil 200mA/Div
Time Base - 2ms/Div
Time Base - 100ms/Div
Figure 9.
Figure 10.
PFM LOAD TRANSIENT
PFM LINE TRANSIENT
VIN 3.6V to 4.2V
500mV/Div
VOUT 50mV/Div
IOUT 200mA/Div
200mA
VIN 3.6V
VOUT 1.8V
IOUT 20mA to 200mA
MODE = GND
20mA
VOUT = 1.8V
50mV/Div
IOUT = 50mA
MODE = GND
Icoil 200mA/Div
Time base - 40ms/Div
Time Base - 100ms/Div
Figure 11.
Figure 12.
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MODE TRANSITION
PFM to PWM
PFM LINE TRANSIENT
VIN 3.6V to 4.2V
500mV/Div
VIN = 3.6
VOUT = 1.8V
IOUT = 10mA
MODE
2V/Div
SW
2V/Div
PFM Mode
VOUT = 1.8V
50mV/Div
IOUT = 250mA
MODE = GND
Forced PWM Mode
Icoil
200mA/Div
Time Base - 100ms/Div
Time Base - 1ms/Div
Figure 13.
Figure 14.
MODE TRANSITION
PWM to PFM
SHUTDOWN CURRENT INTO VIN
vs
INPUT VOLTAGE
0.8
VIN = 3.6
VOUT = 1.8V
IOUT = 10mA
SW
2V/Div
PFM Mode
Forced PWM Mode
Icoil
200mA/Div
EN = GND
ISD - Shutdown Current Into VIN − mA
MODE
2V/Div
0.7
0.6
o
TA = 85 C
0.5
0.4
0.3
0.2
o
o
TA = 25 C
TA = -40 C
0.1
0
2
3
3.5
4
4.5
5
5.5
6
VIN − Input Voltage − V
Time Base - 2.5ms/Div
Figure 15.
10
2.5
Figure 16.
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STATIC DRAIN-SOURCE ON-STATE RESISTANCE
vs
INPUT VOLTAGE
20
o
TTAA == 85
85°C
IQ - Quiescent Current − mA
IQ – Quiescent Current – mA
18
MODE == GND,
GND
MODE
EN == VIN,
VIN
EN
Device Not
Not Switching
Switching
Device
16
o
C
TTAA = 25 °C
14
12
C
TTAA == –40
-40o°C
10
8
8 222
2.5
3
3.5
55
4.5
4.5
44
66
5.5
5.5
V
VIN
InputVoltage
Voltage–−VV
IN–−Input
RDS(on) - Static Drain-Source On-State Resistance − W
QUIESCENT CURRENT
vs
INPUT VOLTAGE
0.8
High Side Switching
0.7
0.6
o
TA = 85 C
0.5
o
TA = 25 C
0.4
0.3
0.2
o
TA = -40 C
0.1
0
2
2.5
3
Figure 17.
RDS(on) - Static Drain-Source On-State Resistance − W
3.5
4
4.5
5
VIN − Input Voltage − V
Figure 18.
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
vs
INPUT VOLTAGE
0.4
Low Side Switching
0.35
0.3
o
TA = 85 C
0.25
o
TA = 25 C
0.2
0.15
0.1
o
TA = -40 C
0.05
0
2
2.5
3
3.5
4
4.5
5
VIN − Input Voltage − V
Figure 19.
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DETAILED DESCRIPTION
OPERATION
The TPS62242-Q1 step down converter operates with typically 2.25MHz fixed frequency pulse width modulation
(PWM) at moderate to heavy load currents. At light load currents, the converter can automatically enter Power
Save Mode and operates then in PFM mode.
During PWM operation, the converter uses a unique fast response voltage mode control scheme with input
voltage feed-forward to achieve good line and load regulation, allowing the use of small ceramic input and output
capacitors. At the beginning of each clock cycle initiated by the clock signal, the High Side MOSFET switch is
turned on. The current then flows from the input capacitor via the High Side MOSFET switch through the inductor
to the output capacitor and load. During this phase, the current ramps up until the PWM comparator trips and the
control logic turns off the switch. The current limit comparator also turns off the switch if the current limit of the
High Side MOSFET switch is exceeded. After a dead time preventing shoot through current, the Low Side
MOSFET rectifier is turned on and the inductor current ramps down. The current then flows from the inductor to
the output capacitor and to the load. It returns back to the inductor through the Low Side MOSFET rectifier.
The next cycle is initiated by the clock signal again turning off the Low Side MOSFET rectifier and turning on the
High Side MOSFET switch.
POWER SAVE MODE
The Power Save Mode is enabled. If the load current decreases, the converter will enter Power Save Mode
operation automatically. During Power Save Mode, the converter skips switching and operates with reduced
frequency in PFM mode with a minimum quiescent current to maintain high efficiency.
The transition from PWM mode to PFM mode occurs once the inductor current in the Low Side MOSFET switch
becomes zero, which indicates discontinuous conduction mode.
During the Power Save Mode, the output voltage is monitored with a PFM comparator. As the output voltage falls
below the PFM comparator threshold of VOUT nominal, the device starts a PFM current pulse. The High Side
MOSFET switch will turn on, and the inductor current ramps up. After the On-time expires, the switch is turned
off and the Low Side MOSFET switch is turned on until the inductor current becomes zero.
The converter effectively delivers a current to the output capacitor and the load. If the load is below the delivered
current, the output voltage will rise. If the output voltage is equal to or greater than the PFM comparator
threshold, the device stops switching and enters a sleep mode with typical 15-μA current consumption.
If the output voltage is still below the PFM comparator threshold, a sequence of further PFM current pulses are
generated until the PFM comparator threshold is reached. The converter starts switching again once the output
voltage drops below the PFM comparator threshold.
With a fast single-threshold comparator, the output voltage ripple during PFM mode operation can be kept to a
minimum. The PFM Pulse is time controlled, allowing the user to modify the charge transferred to the output
capacitor by the value of the inductor. The resulting PFM output voltage ripple and PFM frequency both depend
on the size of the output capacitor and the inductor value. Increasing output capacitor values and inductor values
will minimize the output ripple. The PFM frequency decreases with smaller inductor values and increases with
larger values.
If the output current cannot be supported in PFM mode, the device exits PFM mode and enters PWM mode.
Output voltage
VOUT nominal
PWM + PFM
Light load
PFM Mode
moderate to heavy load
PWM Mode
Figure 20. Power Save Mode
12
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100% Duty Cycle Low Dropout Operation
The device starts to enter 100% duty cycle mode once the input voltage comes close to the nominal output
voltage. In order to maintain the output voltage, the High Side MOSFET switch is turned on 100% for one or
more cycles.
With further decreasing VIN the High Side MOSFET switch is turned on completely. In this case the converter
offers a low input-to-output voltage difference. This is particularly useful in battery-powered applications to
achieve longest operation time by taking full advantage of the entire battery voltage range.
The minimum input voltage to maintain regulation depends on the load current and output voltage, and can be
calculated as:
VINmin = VOmax + IOmax × ®DSo(n)max + RL)
With:
IOmax = maximum output current plus inductor ripple current
RDS(on)max = maximum P-channel switch RDS(on).
RL = DC resistance of the inductor
VOmax = nominal output voltage plus maximum output voltage tolerance
UNDERVOLTAGE LOCKOUT
The undervoltage lockout circuit prevents the device from malfunctioning at low input voltages and from
excessive discharge of the battery and disables the output stage of the converter. The undervoltage lockout
threshold is typically 1.85V with falling VIN.
ENABLE
The device is enabled by setting the EN pin to high. During the start up time t Start Up, the internal circuits are
settled and the soft start circuit is activated. The EN input can be used to control power sequencing in a system
with various dc/dc converters. The EN pin can be connected to the output of another converter, to drive the EN
pin high and getting a sequencing of supply rails. With EN pin = GND, the device enters shutdown mode in which
all circuits are disabled. In fixed output voltage versions, the internal resistor divider network is then disconnected
from FB pin.
SOFT START
The TPS62242-Q1 has an internal soft start circuit that controls the ramp up of the output voltage. The output
voltage ramps up from 5% to 95% of its nominal value within typical 250μs. This limits the inrush current in the
converter during ramp up and prevents possible input voltage drops when a battery or high impedance power
source is used. The soft start circuit is enabled within the start up time, tStart up.
SHORT-CIRCUIT PROTECTION
The High Side and Low Side MOSFET switches are short-circuit protected with maximum switch current equal to
ILIMF. The current in the switches is monitored by current limit comparators. Once the current in the High Side
MOSFET switch exceeds the threshold of it's current limit comparator, it turns off and the Low Side MOSFET
switch is activated to ramp down the current in the inductor and High Side MOSFET switch. The High Side
MOSFET switch can only turn on again, once the current in the Low Side MOSFET switch has decreased below
the threshold of its current limit comparator.
THERMAL SHUTDOWN
As soon as the junction temperature, TJ, exceeds TBD( typical) the device goes into thermal shutdown. In this
mode, the High Side and Low Side MOSFETs are turned off. The device continues its operation when the
junctiontemperature falls below the thermal shutdown hysteresis.
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13
TPS62242-Q1
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APPLICATION INFORMATION
VIN 2.0V to 6.3V
TPS62242-Q1
VIN
L1
2.2 µH
VOUT 1.2V
SW
Up to 300mA
CIN
4.7 µF
EN
GND
FB
COUT
10 µF
Figure 21. Fixed 1.2 V
OUTPUT FILTER DESIGN (INDUCTOR AND OUTPUT CAPACITOR)
The TPS62242-Q1 is designed to operate with inductors in the range of 1.5μH to 4.7μH and with output
capacitors in the range of 4.7μF to 22μF. The part is optimized for operation with a 2.2μH inductor and 10μF
output capacitor.
Larger or smaller inductor values can be used to optimize the performance of the device for specific operation
conditions. For stable operation, the L and C values of the output filter may not fall below 1μH effective
Inductance and 3.5μF effective capacitance. Selecting larger capacitors is less critical because the corner
frequency of the L-C filter moves to lower frequencies with fewer stability problems.
Inductor Selection
The inductor value has a direct effect on the ripple current. The selected inductor must be rated for its dc
resistance and saturation current. The inductor ripple current (ΔIL) decreases with higher inductance and
increases with higher VI or VO.
The inductor selection also has an impact on the output voltage ripple in the PFM mode. Higher inductor values
will lead to lower output voltage ripple and higher PFM frequency, and lower inductor values will lead to a higher
output voltage ripple but lower PFM frequency.
Equation 1 calculates the maximum inductor current in PWM mode under static load conditions. The saturation
current of the inductor should be rated higher than the maximum inductor current as calculated with Equation 2.
This is recommended because during heavy load transients the inductor current will rise above the calculated
value.
DI L + Vout
1 * Vout
Vin
L
I Lmax + I outmax )
ƒ
(1)
DI L
2
(2)
With:
f = Switching Frequency (2.25 MHz typical)
L = Inductor Value
ΔIL = Peak to Peak inductor ripple current
ILmax = Maximum Inductor current
A more conservative approach is to select the inductor current rating just for the maximum switch current limit
ILIMF of the converter.
Accepting larger values of ripple current allows the use of low inductance values, but results in higher output
voltage ripple, greater core losses, and lower output current capability.
14
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TPS62242-Q1
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SLVSB38A – MARCH 2011 – REVISED MARCH 2012
The total losses of the coil have a strong impact on the efficiency of the dc/dc conversion and consist of both the
losses in the dc resistance (R(DC)) and the following frequency-dependent components:
• The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies)
• Additional losses in the conductor from the skin effect (current displacement at high frequencies)
• Magnetic field losses of the neighboring windings (proximity effect)
• Radiation losses
Table 2. List of Inductors
3
DIMENSIONS [mm ]
INDUCTANCE μH
INDUCTOR TYPE
SUPPLIER
2.5 × 2.0 × 1.0
2.0
MIPS2520D2R2
FDK
2.5 × 2.0 × 1.2
2.0
MIPSA2520D2R2
FDK
2.5x2.0x1.0
2.2
KSLI-252010AG2R2
Hitachi Metals
2.5x2.0x1.2
2.2
LQM2HPN2R2MJ0L
Murata
3 × 3 × 1.4
2.2
LPS3015
Coilcraft
Output Capacitor Selection
The advanced fast-response voltage mode control scheme of the TPS62242-Q1 allows the use of tiny ceramic
capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are
recommended. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors,
aside from their wide variation in capacitance over temperature, become resistive at high frequencies.
At nominal load current, the device operates in PWM mode and the RMS ripple current is calculated as:
1 * Vout
1
Vin
I RMSCout + Vout
ƒ
L
2
Ǹ3
(3)
At nominal load current, the device operates in PWM mode and the overall output voltage ripple is the sum of the
voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and discharging the
output capacitor:
DVout + Vout
1 * Vout
Vin
L
ƒ
ǒ8
1
Cout
ƒ
Ǔ
) ESR
(4)
At light load currents, the converter operates in Power Save Mode and the output voltage ripple depends on the
output capacitor and inductor value. Larger output capacitor and inductor values minimize the voltage ripple in
PFM mode and tighten dc output accuracy in PFM mode.
Input Capacitor Selection
The buck converter has a natural pulsating input current; therefore, a low ESR input capacitor is required for best
input voltage filtering, and minimizing the interference with other circuits caused by high input voltage spikes. For
most applications, a 4.7-μF to 10-μF ceramic capacitor is recommended. Because ceramic capacitors lose up to
80% of their initial capacitance at 5V, it is recommended that a 10-μF input capacitor be used for input voltages
greater than 4.5V. The input capacitor can be increased without any limit for better input voltage filtering.
Take care when using only small ceramic input capacitors. When a ceramic capacitor is used at the input, and
the power is being supplied through long wires, such as from a wall adapter, a load step at the output, or VIN
step on the input, can induce ringing at the VIN pin. The ringing can couple to the output and be mistaken as
loop instability, or could even damage the part by exceeding the maximum ratings
Table 3. List of Capacitors
CAPACITANCE
TYPE
SIZE
SUPPLIER
4.7μF
GRM188R60J475K
0603: 1.6x0.8x0.8mm3
Murata
10μF
GRM188R60J106M69D
0603: 1.6x0.8x0.8mm3
Murata
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TPS62242-Q1
SLVSB38A – MARCH 2011 – REVISED MARCH 2012
www.ti.com
LAYOUT CONSIDERATIONS
As for all switching power supplies, the layout is an important step in the design. Proper function of the device
demands careful attention to PCB layout. Care must be taken in board layout to get the specified performance. If
the layout is not carefully done, the regulator could show poor line and/or load regulation, and additional stability
issues as well as EMI problems. It is critical to provide a low inductance, impedance ground path. Therefore, use
wide and short traces for the main current paths. The input capacitor should be placed as close as possible to
the IC pins as well as the inductor and output capacitor.
Connect the GND pin of the device to the PowerPAD™ land of the PCB and use this pad as a star point. Use a
common Power GND node and a different node for the Signal GND to minimize the effects of ground noise.
Connect these ground nodes together to the PowerPAD land (star point) underneath the IC. Keep the common
path to the GND pin, which returns the small signal components, and the high current of the output capacitors as
short as possible to avoid ground noise. The FB line should be connected right to the output capacitor and routed
away from noisy components and traces (for example, the SW line).
16
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PACKAGE OPTION ADDENDUM
www.ti.com
4-Apr-2012
PACKAGING INFORMATION
Orderable Device
TPS62242QDDCRQ1
Status
(1)
Package Type Package
Drawing
ACTIVE
SOT
DDC
Pins
Package Qty
5
3000
Eco Plan
(2)
Green (RoHS
& no Sb/Br)
Lead/
Ball Finish
MSL Peak Temp
(3)
Samples
(Requires Login)
CU NIPDAU Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS62242-Q1 :
• Catalog: TPS62242
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Apr-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
TPS62242QDDCRQ1
Package Package Pins
Type Drawing
SOT
DDC
5
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
3000
179.0
8.4
Pack Materials-Page 1
3.2
B0
(mm)
K0
(mm)
P1
(mm)
3.2
1.4
4.0
W
Pin1
(mm) Quadrant
8.0
Q3
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Apr-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPS62242QDDCRQ1
SOT
DDC
5
3000
203.0
203.0
35.0
Pack Materials-Page 2
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